Blob Blame Raw
From c22f2592addb5fdd998feefc802395cf59095497 Mon Sep 17 00:00:00 2001
Message-Id: <c22f2592addb5fdd998feefc802395cf59095497.1387298827.git.minovotn@redhat.com>
In-Reply-To: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
References: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
From: "Michael S. Tsirkin" <mst@redhat.com>
Date: Tue, 17 Dec 2013 15:18:06 +0100
Subject: [PATCH 30/56] q35: use macro for MCFG property name

RH-Author: Michael S. Tsirkin <mst@redhat.com>
Message-id: <1387293161-4085-31-git-send-email-mst@redhat.com>
Patchwork-id: 56336
O-Subject: [PATCH qemu-kvm RHEL7.0 v2 30/57] q35: use macro for MCFG property name
Bugzilla: 1034876
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
RH-Acked-by: Marcel Apfelbaum <marcel.a@redhat.com>
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>

Useful to make it accessible through QOM.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
(cherry picked from commit 87f65245db4665edff22242c17546954d9d59c82)

Conflicts:
	hw/pci-host/q35.c
---
 include/hw/pci/pcie_host.h | 2 ++
 hw/pci-host/q35.c          | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

Signed-off-by: Michal Novotny <minovotn@redhat.com>
---
 hw/pci-host/q35.c          | 4 ++--
 include/hw/pci/pcie_host.h | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 05779b8..72d97c8 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -109,8 +109,8 @@ static void q35_host_get_pci_hole64_end(Object *obj, Visitor *v,
 }
 
 static Property mch_props[] = {
-    DEFINE_PROP_UINT64("MCFG", Q35PCIHost, host.base_addr,
-                        MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT),
+    DEFINE_PROP_UINT64(PCIE_HOST_MCFG_BASE, Q35PCIHost, host.base_addr,
+                       MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT),
     DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, Q35PCIHost,
                      mch.pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE),
     DEFINE_PROP_END_OF_LIST(),
diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h
index da0f275..33d75bd 100644
--- a/include/hw/pci/pcie_host.h
+++ b/include/hw/pci/pcie_host.h
@@ -28,6 +28,8 @@
 #define PCIE_HOST_BRIDGE(obj) \
     OBJECT_CHECK(PCIExpressHost, (obj), TYPE_PCIE_HOST_BRIDGE)
 
+#define PCIE_HOST_MCFG_BASE "MCFG"
+
 /* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */
 #define PCIE_BASE_ADDR_UNMAPPED  ((hwaddr)-1ULL)
 
-- 
1.7.11.7