| From 655e723a5190206302f6cc4f2e794563b8e1c226 Mon Sep 17 00:00:00 2001 |
| From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> |
| Date: Wed, 24 Feb 2021 11:30:36 -0500 |
| Subject: [PATCH 3/4] x86/cpu: Populate SVM CPUID feature bits |
| |
| RH-Author: Dr. David Alan Gilbert <dgilbert@redhat.com> |
| Message-id: <20210224113037.15599-4-dgilbert@redhat.com> |
| Patchwork-id: 101200 |
| O-Subject: [RHEL-8.4.0 qemu-kvm PATCH 3/4] x86/cpu: Populate SVM CPUID feature bits |
| Bugzilla: 1790620 |
| RH-Acked-by: Cornelia Huck <cohuck@redhat.com> |
| RH-Acked-by: Sergio Lopez Pascual <slp@redhat.com> |
| RH-Acked-by: Peter Xu <peterx@redhat.com> |
| |
| From: Wei Huang <wei.huang2@amd.com> |
| |
| Newer AMD CPUs will add CPUID_0x8000000A_EDX[28] bit, which indicates |
| that SVM instructions (VMRUN/VMSAVE/VMLOAD) will trigger #VMEXIT before |
| CPU checking their EAX against reserved memory regions. This change will |
| allow the hypervisor to avoid intercepting #GP and emulating SVM |
| instructions. KVM turns on this CPUID bit for nested VMs. In order to |
| support it, let us populate this bit, along with other SVM feature bits, |
| in FEAT_SVM. |
| |
| Signed-off-by: Wei Huang <wei.huang2@amd.com> |
| Message-Id: <20210126202456.589932-1-wei.huang2@amd.com> |
| Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
| (cherry picked from commit 5447089c2b3b084b51670af36fc86ee3979e04be) |
| Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com> |
| |
| target/i386/cpu.c | 6 +++--- |
| target/i386/cpu.h | 24 ++++++++++++++---------- |
| 2 files changed, 17 insertions(+), 13 deletions(-) |
| |
| diff --git a/target/i386/cpu.c b/target/i386/cpu.c |
| index f6a9ed84b3..7227c803c3 100644 |
| |
| |
| @@ -1026,11 +1026,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { |
| "npt", "lbrv", "svm-lock", "nrip-save", |
| "tsc-scale", "vmcb-clean", "flushbyasid", "decodeassists", |
| NULL, NULL, "pause-filter", NULL, |
| - "pfthreshold", NULL, NULL, NULL, |
| - NULL, NULL, NULL, NULL, |
| - NULL, NULL, NULL, NULL, |
| + "pfthreshold", "avic", NULL, "v-vmsave-vmload", |
| + "vgif", NULL, NULL, NULL, |
| NULL, NULL, NULL, NULL, |
| NULL, NULL, NULL, NULL, |
| + "svme-addr-chk", NULL, NULL, NULL, |
| }, |
| .cpuid = { .eax = 0x8000000A, .reg = R_EDX, }, |
| .tcg_features = TCG_SVM_FEATURES, |
| diff --git a/target/i386/cpu.h b/target/i386/cpu.h |
| index f5a4efcec6..e1b67910c2 100644 |
| |
| |
| @@ -667,16 +667,20 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; |
| #define CPUID_EXT3_PERFCORE (1U << 23) |
| #define CPUID_EXT3_PERFNB (1U << 24) |
| |
| -#define CPUID_SVM_NPT (1U << 0) |
| -#define CPUID_SVM_LBRV (1U << 1) |
| -#define CPUID_SVM_SVMLOCK (1U << 2) |
| -#define CPUID_SVM_NRIPSAVE (1U << 3) |
| -#define CPUID_SVM_TSCSCALE (1U << 4) |
| -#define CPUID_SVM_VMCBCLEAN (1U << 5) |
| -#define CPUID_SVM_FLUSHASID (1U << 6) |
| -#define CPUID_SVM_DECODEASSIST (1U << 7) |
| -#define CPUID_SVM_PAUSEFILTER (1U << 10) |
| -#define CPUID_SVM_PFTHRESHOLD (1U << 12) |
| +#define CPUID_SVM_NPT (1U << 0) |
| +#define CPUID_SVM_LBRV (1U << 1) |
| +#define CPUID_SVM_SVMLOCK (1U << 2) |
| +#define CPUID_SVM_NRIPSAVE (1U << 3) |
| +#define CPUID_SVM_TSCSCALE (1U << 4) |
| +#define CPUID_SVM_VMCBCLEAN (1U << 5) |
| +#define CPUID_SVM_FLUSHASID (1U << 6) |
| +#define CPUID_SVM_DECODEASSIST (1U << 7) |
| +#define CPUID_SVM_PAUSEFILTER (1U << 10) |
| +#define CPUID_SVM_PFTHRESHOLD (1U << 12) |
| +#define CPUID_SVM_AVIC (1U << 13) |
| +#define CPUID_SVM_V_VMSAVE_VMLOAD (1U << 15) |
| +#define CPUID_SVM_VGIF (1U << 16) |
| +#define CPUID_SVM_SVME_ADDR_CHK (1U << 28) |
| |
| /* Support RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE */ |
| #define CPUID_7_0_EBX_FSGSBASE (1U << 0) |
| -- |
| 2.27.0 |
| |