From 9d53600d84c407efde9e186b814badca245cc6ab Mon Sep 17 00:00:00 2001
From: Suraj Jitindar Singh <sursingh@redhat.com>
Date: Thu, 21 Jun 2018 06:56:48 +0200
Subject: [PATCH 53/54] target/ppc: Don't require private l1d cache on POWER8
 for cap_ppc_safe_cache

RH-Author: Suraj Jitindar Singh <sursingh@redhat.com>
Message-id: <1529564209-30369-3-git-send-email-sursingh@redhat.com>
Patchwork-id: 80930
O-Subject: [RHEL-7.6 qemu-kvm-rhev PATCH 2/3] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache
Bugzilla: 1560847
RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
RH-Acked-by: David Gibson <dgibson@redhat.com>
RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>

From: Suraj Jitindar Singh <sjitindarsingh@gmail.com>

For cap_ppc_safe_cache to be set to workaround, we require both a l1d
cache flush instruction and private l1d cache.

On POWER8 don't require private l1d cache. This means a guest on a
POWER8 machine can make use of the cache flush workarounds.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
(cherry picked from commit 072f416a53ead5211c987cb2068ee9dbd7ba06cc)

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1560847

Signed-off-by: Suraj Jitindar Singh <sursingh@redhat.com>
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
---
 target/ppc/kvm.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index d787032..192c40d 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2461,11 +2461,28 @@ bool kvmppc_has_cap_mmu_hash_v3(void)
     return cap_mmu_hash_v3;
 }
 
+static bool kvmppc_power8_host(void)
+{
+    bool ret = false;
+#ifdef TARGET_PPC64
+    {
+        uint32_t base_pvr = CPU_POWERPC_POWER_SERVER_MASK & mfpvr();
+        ret = (base_pvr == CPU_POWERPC_POWER8E_BASE) ||
+              (base_pvr == CPU_POWERPC_POWER8NVL_BASE) ||
+              (base_pvr == CPU_POWERPC_POWER8_BASE);
+    }
+#endif /* TARGET_PPC64 */
+    return ret;
+}
+
 static int parse_cap_ppc_safe_cache(struct kvm_ppc_cpu_char c)
 {
+    bool l1d_thread_priv_req = !kvmppc_power8_host();
+
     if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_L1D_FLUSH_PR) {
         return 2;
-    } else if ((c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) &&
+    } else if ((!l1d_thread_priv_req ||
+                c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) &&
                (c.character & c.character_mask
                 & (H_CPU_CHAR_L1D_FLUSH_ORI30 | H_CPU_CHAR_L1D_FLUSH_TRIG2))) {
         return 1;
-- 
1.8.3.1