From ec50cd73f6e0630939f924836ca18414a1f3f72c Mon Sep 17 00:00:00 2001
From: Lyonel Vincent <lyonel@ezix.org>
Date: Sat, 10 Mar 2018 15:12:28 +0100
Subject: [PATCH 02/10] merge Github PR36
cf. https://github.com/lyonel/lshw/pull/36
---
src/core/cpuinfo.cc | 57 ++++++++++++++++++++++-----------------------
1 file changed, 28 insertions(+), 29 deletions(-)
diff --git a/src/core/cpuinfo.cc b/src/core/cpuinfo.cc
index 7f5d4b9..4ad3376 100644
--- a/src/core/cpuinfo.cc
+++ b/src/core/cpuinfo.cc
@@ -241,37 +241,36 @@ static void cpuinfo_aarch64(hwNode & node,
if (id == "Features")
{
- while (value.length() > 0)
- {
- size_t pos = value.find(' ');
- string capability = (pos==string::npos)?value:value.substr(0, pos);
- aarch64_features.push_back(capability);
- if (pos == string::npos)
- value = "";
- else
- value = hw::strip(value.substr(pos));
- }
- for(int i=0; i<=currentcpu; i++)
+ hwNode *cpu = getcpu(node, currentcpu);
+ if (cpu)
{
- hwNode *cpu = getcpu(node, i);
- if (cpu)
+ cpu->addHint("logo", string("aarch64"));
+ if (node.getDescription() == "")
+ node.setDescription(aarch64_processor_name);
+ cpu->claim(true);
+
+ while (value.length() > 0)
+ {
+ size_t pos = value.find(' ');
+ string capability = (pos==string::npos)?value:value.substr(0, pos);
+ aarch64_features.push_back(capability);
+ if (pos == string::npos)
+ value = "";
+ else
+ value = hw::strip(value.substr(pos));
+ }
+
+ for(size_t i=0; i < aarch64_features.size(); i++)
{
- cpu->addHint("logo", string("aarch64"));
- if (node.getDescription() == "")
- node.setDescription(aarch64_processor_name);
- cpu->claim(true);
- for(size_t i=0; i < aarch64_features.size(); i++)
- {
- cpu->addCapability(aarch64_features[i]);
- cpu->describeCapability("fp", "Floating point instructions");
- cpu->describeCapability("asimd", "Advanced SIMD");
- cpu->describeCapability("evtstrm", "Event stream");
- cpu->describeCapability("aes", "AES instructions");
- cpu->describeCapability("pmull", "PMULL instruction");
- cpu->describeCapability("sha1", "SHA1 instructions");
- cpu->describeCapability("sha2", "SHA2 instructions");
- cpu->describeCapability("crc32", "CRC extension");
- }
+ cpu->addCapability(aarch64_features[i]);
+ cpu->describeCapability("fp", "Floating point instructions");
+ cpu->describeCapability("asimd", "Advanced SIMD");
+ cpu->describeCapability("evtstrm", "Event stream");
+ cpu->describeCapability("aes", "AES instructions");
+ cpu->describeCapability("pmull", "PMULL instruction");
+ cpu->describeCapability("sha1", "SHA1 instructions");
+ cpu->describeCapability("sha2", "SHA2 instructions");
+ cpu->describeCapability("crc32", "CRC extension");
}
}
}
--
2.17.1