From 175416715561964226c5c75eaeb7c2fa55395f65 Mon Sep 17 00:00:00 2001
Message-Id: <175416715561964226c5c75eaeb7c2fa55395f65@dist-git>
From: Jiri Denemark <jdenemar@redhat.com>
Date: Fri, 13 Dec 2019 14:28:08 +0100
Subject: [PATCH] cpu_map: Add TSX_CTRL bit for IA32_ARCH_CAPABILITIES MSR
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CVE-2019-11135
When TSX_CTRL bit of IA32_ARCH_CAPABILITIES MSR is set to 1, the CPU
supports IA32_TSX_CTRL MSR which can be used to disable and/or mask TSX.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
(cherry picked from commit f411b7ef68221e82dec0129aaf2f2a26a8987504)
Conflicts:
src/cpu_map/x86_features.xml
- cpu_map is still monolithic downstream
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Message-Id: <cb4f05c8c84ed910bcd4bceae58f6fd090684031.1576243094.git.jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
---
src/cpu/cpu_map.xml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index c2b3fca47a..9609ce71a7 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -501,6 +501,9 @@
<feature name='mds-no'>
<msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
</feature>
+ <feature name='tsx-ctrl'>
+ <msr index='0x10a' edx='0x00000000' eax='0x00000080'/>
+ </feature>
<feature name='taa-no'>
<msr index='0x10a' edx='0x00000000' eax='0x00000100'/>
</feature>
--
2.24.0