From 58553ad03187f0cf208d6c4a0dc026c6338e5edd Mon Sep 17 00:00:00 2001
From: "Daisuke Hatayama (Fujitsu)" <d.hatayama@fujitsu.com>
Date: Wed, 29 Mar 2023 12:44:10 +0000
Subject: [PATCH 5/7] [PATCH] sadump: fix failure of reading memory when
 5-level paging is enabled

makedumpfile fails as follows for memory dumps collected by sadump
when 5-level paging is enabled on the corresponding systems:

    # makedumpfile -l -d 31 -x ./vmlinux ./dump.sadump dump.sadump-ld31
    __vtop4_x86_64: Can't get a valid pgd.
    ...snip...
    __vtop4_x86_64: Can't get a valid pgd.
    calc_kaslr_offset: failed to calculate kaslr_offset and phys_base; default to 0
    __vtop4_x86_64: Can't get a valid pgd.
    readmem: Can't convert a virtual address(ffffffff82fce960) to physical address.
    readmem: type_addr: 0, addr:ffffffff82fce960, size:1024
    cpu_online_mask_init: Can't read cpu_online_mask memory.

    makedumpfile Failed.

This is because 5-level paging support has not been done yet for
sadump; the work of the 5-level paging support was done by the commit
30a3214a7193e94c551c0cebda5918a72a35c589 (PATCH 4/4 arch/x86_64: Add
5-level paging support) but that was focused on the core part only.

Having said that, most of things has already been finished in the
commit. What needs to be newly added for sadump is just how to check
if 5-level paging is enabled for a given memory dump.

For that purpose, let's refer to CR4.LA57, bit 12 of CR4, representing
whether 5-level paging is enabled or not. We can do this because
memory dumps collected by sadump have SMRAM as note information and
they include CR4 together with the other control registers.

Signed-off-by: HATAYAMA Daisuke <d.hatayama@fujitsu.com>
---
 sadump_info.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/makedumpfile-1.7.2/sadump_info.c b/makedumpfile-1.7.2/sadump_info.c
index adfa8dc..2c44068 100644
--- a/makedumpfile-1.7.2/sadump_info.c
+++ b/makedumpfile-1.7.2/sadump_info.c
@@ -1362,6 +1362,7 @@ static int linux_banner_sanity_check(ulong cr3)
 #define PTI_USER_PGTABLE_BIT		(info->page_shift)
 #define PTI_USER_PGTABLE_MASK		(1 << PTI_USER_PGTABLE_BIT)
 #define CR3_PCID_MASK			0xFFFull
+#define CR4_LA57			(1 << 12)
 int
 calc_kaslr_offset(void)
 {
@@ -1397,6 +1398,8 @@ calc_kaslr_offset(void)
 		else
 			cr3 = smram.Cr3 & ~CR3_PCID_MASK;
 
+		NUMBER(pgtable_l5_enabled) = !!(smram.Cr4 & CR4_LA57);
+
 		/* Convert virtual address of IDT table to physical address */
 		idtr_paddr = vtop4_x86_64_pagetable(idtr, cr3);
 		if (idtr_paddr == NOT_PADDR) {
@@ -1417,6 +1420,7 @@ calc_kaslr_offset(void)
 
 		DEBUG_MSG("sadump: idtr=%" PRIx64 "\n", idtr);
 		DEBUG_MSG("sadump: cr3=%" PRIx64 "\n", cr3);
+		DEBUG_MSG("sadump: cr4=%" PRIx32 "\n", smram.Cr4);
 		DEBUG_MSG("sadump: idtr(phys)=%" PRIx64 "\n", idtr_paddr);
 		DEBUG_MSG("sadump: devide_error(vmlinux)=%lx\n",
 			  divide_error_vmlinux);
-- 
2.33.1