2014-03-12 Aldy Hernandez <aldyh@redhat.com>
Copy the following files from upsbinutils-2.24:
gas/config/tc-ppc.c
gas/testsuite/gas/ppc/vsx2.d
ld/testsuite/ld-powerpc/relbrlt.d
ld/testsuite/ld-powerpc/symtocbase.d
ld/testsuite/ld-powerpc/tls.d
ld/testsuite/ld-powerpc/tls.t
ld/testsuite/ld-powerpc/tlstoc.d
ld/testsuite/ld-powerpc/tlstoc.t
ld/testsuite/ld-powerpc/tocopt.d
ld/testsuite/ld-powerpc/tocopt2.d
ld/testsuite/ld-powerpc/tocopt3.d
ld/testsuite/ld-powerpc/tocopt4.d
ld/testsuite/ld-powerpc/tocopt5.d
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 99e893d..7c99e43 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -65,40 +65,14 @@ static int set_target_endian = 0;
/* #lo(value) denotes the least significant 16 bits of the indicated. */
#define PPC_LO(v) ((v) & 0xffff)
-/* Split the indicated value with the msbs in bits 11-15
- and the lsbs in bits 21-31. */
-#define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
-
-/* Split the indicated value with the msbs in bits 6-10
- and the lsbs in bits 21-31. */
-#define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
-
-/* #lo(value) denotes the lsb 16 bits in split16a format. */
-#define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
-
-/* #lo(value) denotes the lsb 16 bits in split16d format. */
-#define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
-
/* #hi(value) denotes bits 16 through 31 of the indicated value. */
#define PPC_HI(v) (((v) >> 16) & 0xffff)
-/* #lo(value) denotes the msb 16 bits in split16a format. */
-#define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
-
-/* #lo(value) denotes the msb 16 bits in split16d format. */
-#define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
-
/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
the indicated value, compensating for #lo() being treated as a
signed number. */
#define PPC_HA(v) PPC_HI ((v) + 0x8000)
-/* #ha(value) denotes the high adjusted value in split16a format. */
-#define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
-
-/* #ha(value) denotes the high adjusted value in split16d format. */
-#define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
-
/* #higher(value) denotes bits 32 through 47 of the indicated value. */
#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
@@ -2094,8 +2068,7 @@ ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
do
{
expression (&exp);
- if (exp.X_op == O_symbol
- && *input_line_pointer == '@'
+ if (*input_line_pointer == '@'
&& (reloc = ppc_elf_suffix (&input_line_pointer,
&exp)) != BFD_RELOC_UNUSED)
{
@@ -2240,7 +2213,7 @@ ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
align2 = 0;
record_alignment (bss_section, align2);
- subseg_set (bss_section, 0);
+ subseg_set (bss_section, 1);
if (align2)
frag_align (align2, 0, 0);
if (S_GET_SEGMENT (symbolP) == bss_section)
@@ -2296,7 +2269,7 @@ ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
{
unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
- if (exp.X_add_number != PPC64_LOCAL_ENTRY_OFFSET (encoded))
+ if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
as_bad (_(".localentry expression for `%s' "
"is not a valid power of 2"), S_GET_NAME (sym));
else
@@ -2457,8 +2430,6 @@ ppc_elf_adjust_symtab (void)
asymbol *bsym = symbol_get_bfdsym (symp);
if ((bsym->flags & BSF_KEEP) == 0)
symbol_remove (symp, &symbol_rootP, &symbol_lastP);
- else
- S_SET_WEAK (symp);
}
}
}
@@ -2567,7 +2538,8 @@ static int
ppc_is_toc_sym (symbolS *sym)
{
#ifdef OBJ_XCOFF
- return symbol_get_tc (sym)->symbol_class == XMC_TC;
+ return (symbol_get_tc (sym)->symbol_class == XMC_TC
+ || symbol_get_tc (sym)->symbol_class == XMC_TC0);
#endif
#ifdef OBJ_ELF
const char *sname = segment_name (S_GET_SEGMENT (sym));
@@ -3308,6 +3280,7 @@ md_assemble (char *str)
&& (operand->bitm & 0xfff0) == 0xfff0
&& operand->shift == 0)
{
+ /* Note: the symbol may be not yet defined. */
if (ppc_is_toc_sym (ex.X_add_symbol))
{
reloc = BFD_RELOC_PPC_TOC16;
@@ -3687,11 +3660,6 @@ ppc_comm (int lcomm)
char *lcomm_name;
char lcomm_endc;
- if (size <= 4)
- align = 2;
- else
- align = 3;
-
/* The third argument to .lcomm appears to be the real local
common symbol to create. References to the symbol named in
the first argument are turned into references to the third
@@ -3710,6 +3678,25 @@ ppc_comm (int lcomm)
lcomm_sym = symbol_find_or_make (lcomm_name);
*input_line_pointer = lcomm_endc;
+
+ /* The fourth argument to .lcomm is the alignment. */
+ if (*input_line_pointer != ',')
+ {
+ if (size <= 4)
+ align = 2;
+ else
+ align = 3;
+ }
+ else
+ {
+ ++input_line_pointer;
+ align = get_absolute_expression ();
+ if (align <= 0)
+ {
+ as_warn (_("ignoring bad alignment"));
+ align = 2;
+ }
+ }
}
*end_name = '\0';
@@ -6488,6 +6475,8 @@ void
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
{
valueT value = * valP;
+ offsetT fieldval;
+ const struct powerpc_operand *operand;
#ifdef OBJ_ELF
if (fixP->fx_addsy != NULL)
@@ -6526,16 +6515,13 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
}
+ operand = NULL;
if (fixP->fx_pcrel_adjust != 0)
{
- /* Handle relocs in an insn. */
-
+ /* This is a fixup on an instruction. */
int opindex = fixP->fx_pcrel_adjust & 0xff;
- const struct powerpc_operand *operand = &powerpc_operands[opindex];
- char *where;
- unsigned long insn;
- offsetT fieldval;
+ operand = &powerpc_operands[opindex];
#ifdef OBJ_XCOFF
/* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
does not generate a reloc. It uses the offset of `sym' within its
@@ -6554,65 +6540,111 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
value = fixP->fx_offset;
fixP->fx_done = 1;
}
+
+ /* During parsing of instructions, a TOC16 reloc is generated for
+ instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
+ in the toc. But at parse time, SYM may be not yet defined, so
+ check again here. */
+ if (fixP->fx_r_type == BFD_RELOC_16
+ && fixP->fx_addsy != NULL
+ && ppc_is_toc_sym (fixP->fx_addsy))
+ fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
#endif
- fieldval = value;
- switch (fixP->fx_r_type)
- {
+ }
+
+ /* Calculate value to be stored in field. */
+ fieldval = value;
+ switch (fixP->fx_r_type)
+ {
#ifdef OBJ_ELF
- case BFD_RELOC_PPC64_ADDR16_LO_DS:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- /* fall through */
+ case BFD_RELOC_PPC64_ADDR16_LO_DS:
+ case BFD_RELOC_PPC_VLE_LO16A:
+ case BFD_RELOC_PPC_VLE_LO16D:
#endif
- case BFD_RELOC_LO16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
- /* fall through */
- case BFD_RELOC_LO16_PCREL:
- fieldval = SEX16 (value);
- break;
+ case BFD_RELOC_LO16:
+ case BFD_RELOC_LO16_PCREL:
+ fieldval = value & 0xffff;
+ sign_extend_16:
+ if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
+ fieldval = SEX16 (fieldval);
+ fixP->fx_no_overflow = 1;
+ break;
- case BFD_RELOC_HI16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
- /* fall through */
- case BFD_RELOC_HI16_PCREL:
- fieldval = SEX16 (PPC_HI (value));
+ case BFD_RELOC_HI16:
+ case BFD_RELOC_HI16_PCREL:
+#ifdef OBJ_ELF
+ if (REPORT_OVERFLOW_HI && ppc_obj64)
+ {
+ fieldval = value >> 16;
+ if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
+ {
+ valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
+ fieldval = ((valueT) fieldval ^ sign) - sign;
+ }
break;
+ }
+ /* Fall thru */
- case BFD_RELOC_HI16_S:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
- /* fall through */
- case BFD_RELOC_HI16_S_PCREL:
- fieldval = SEX16 (PPC_HA (value));
- break;
+ case BFD_RELOC_PPC_VLE_HI16A:
+ case BFD_RELOC_PPC_VLE_HI16D:
+ case BFD_RELOC_PPC64_ADDR16_HIGH:
+#endif
+ fieldval = PPC_HI (value);
+ goto sign_extend_16;
+ case BFD_RELOC_HI16_S:
+ case BFD_RELOC_HI16_S_PCREL:
#ifdef OBJ_ELF
- case BFD_RELOC_PPC64_HIGHER:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHER (value));
+ if (REPORT_OVERFLOW_HI && ppc_obj64)
+ {
+ fieldval = (value + 0x8000) >> 16;
+ if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
+ {
+ valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
+ fieldval = ((valueT) fieldval ^ sign) - sign;
+ }
break;
+ }
+ /* Fall thru */
- case BFD_RELOC_PPC64_HIGHER_S:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHERA (value));
- break;
+ case BFD_RELOC_PPC_VLE_HA16A:
+ case BFD_RELOC_PPC_VLE_HA16D:
+ case BFD_RELOC_PPC64_ADDR16_HIGHA:
+#endif
+ fieldval = PPC_HA (value);
+ goto sign_extend_16;
- case BFD_RELOC_PPC64_HIGHEST:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHEST (value));
- break;
+#ifdef OBJ_ELF
+ case BFD_RELOC_PPC64_HIGHER:
+ fieldval = PPC_HIGHER (value);
+ goto sign_extend_16;
- case BFD_RELOC_PPC64_HIGHEST_S:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHESTA (value));
- break;
+ case BFD_RELOC_PPC64_HIGHER_S:
+ fieldval = PPC_HIGHERA (value);
+ goto sign_extend_16;
+
+ case BFD_RELOC_PPC64_HIGHEST:
+ fieldval = PPC_HIGHEST (value);
+ goto sign_extend_16;
+
+ case BFD_RELOC_PPC64_HIGHEST_S:
+ fieldval = PPC_HIGHESTA (value);
+ goto sign_extend_16;
+#endif
+ default:
+ break;
+ }
+
+ if (operand != NULL)
+ {
+ /* Handle relocs in an insn. */
+ char *where;
+ unsigned long insn;
+
+ switch (fixP->fx_r_type)
+ {
+#ifdef OBJ_ELF
/* The following relocs can't be calculated by the assembler.
Leave the field zero. */
case BFD_RELOC_PPC_TPREL16:
@@ -6658,8 +6690,6 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
gas_assert (fixP->fx_addsy != NULL);
S_SET_THREAD_LOCAL (fixP->fx_addsy);
fieldval = 0;
- if (fixP->fx_pcrel)
- goto bad_pcrel;
break;
/* These also should leave the field zero for the same
@@ -6726,8 +6756,13 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
case BFD_RELOC_PPC_TLSGD:
case BFD_RELOC_PPC_TLSLD:
fieldval = 0;
- if (fixP->fx_pcrel)
- goto bad_pcrel;
+ break;
+#endif
+
+#ifdef OBJ_XCOFF
+ case BFD_RELOC_PPC_B16:
+ /* Adjust the offset to the instruction boundary. */
+ fieldval += 2;
break;
#endif
@@ -6805,79 +6840,9 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
}
else
{
- int size = 0;
- offsetT fieldval = value;
-
/* Handle relocs in data. */
switch (fixP->fx_r_type)
{
- case BFD_RELOC_CTOR:
- if (ppc_obj64)
- goto ctor64;
- /* fall through */
-
- case BFD_RELOC_32:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_32_PCREL;
- /* fall through */
-
- case BFD_RELOC_32_PCREL:
- case BFD_RELOC_RVA:
- size = 4;
- break;
-
- case BFD_RELOC_64:
- ctor64:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_64_PCREL;
- /* fall through */
-
- case BFD_RELOC_64_PCREL:
- size = 8;
- break;
-
- case BFD_RELOC_16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_16_PCREL;
- /* fall through */
-
- case BFD_RELOC_16_PCREL:
- size = 2;
- break;
-
- case BFD_RELOC_8:
- if (fixP->fx_pcrel)
- {
-#ifdef OBJ_ELF
- bad_pcrel:
-#endif
- if (fixP->fx_addsy)
- {
- char *sfile;
- unsigned int sline;
-
- /* Use expr_symbol_where to see if this is an
- expression symbol. */
- if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("unresolved expression that must"
- " be resolved"));
- else
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("cannot emit PC relative %s relocation"
- " against %s"),
- bfd_get_reloc_code_name (fixP->fx_r_type),
- S_GET_NAME (fixP->fx_addsy));
- }
- else
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("unable to resolve expression"));
- fixP->fx_done = 1;
- }
- else
- size = 1;
- break;
-
case BFD_RELOC_VTABLE_INHERIT:
if (fixP->fx_addsy
&& !S_IS_DEFINED (fixP->fx_addsy)
@@ -6892,54 +6857,17 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
#ifdef OBJ_ELF
/* These can appear with @l etc. in data. */
case BFD_RELOC_LO16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
case BFD_RELOC_LO16_PCREL:
- size = 2;
- break;
-
case BFD_RELOC_HI16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
case BFD_RELOC_HI16_PCREL:
- size = 2;
- fieldval = PPC_HI (value);
- break;
-
case BFD_RELOC_HI16_S:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
case BFD_RELOC_HI16_S_PCREL:
- size = 2;
- fieldval = PPC_HA (value);
- break;
-
case BFD_RELOC_PPC64_HIGHER:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- size = 2;
- fieldval = PPC_HIGHER (value);
- break;
-
case BFD_RELOC_PPC64_HIGHER_S:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- size = 2;
- fieldval = PPC_HIGHERA (value);
- break;
-
case BFD_RELOC_PPC64_HIGHEST:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- size = 2;
- fieldval = PPC_HIGHEST (value);
- break;
-
case BFD_RELOC_PPC64_HIGHEST_S:
- if (fixP->fx_pcrel)
- goto bad_pcrel;
- size = 2;
- fieldval = PPC_HIGHESTA (value);
+ case BFD_RELOC_PPC64_ADDR16_HIGH:
+ case BFD_RELOC_PPC64_ADDR16_HIGHA:
break;
case BFD_RELOC_PPC_DTPMOD:
@@ -7034,8 +6962,17 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
#ifdef OBJ_XCOFF
case BFD_RELOC_NONE:
- break;
#endif
+ case BFD_RELOC_CTOR:
+ case BFD_RELOC_32:
+ case BFD_RELOC_32_PCREL:
+ case BFD_RELOC_RVA:
+ case BFD_RELOC_64:
+ case BFD_RELOC_64_PCREL:
+ case BFD_RELOC_16:
+ case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_8:
+ break;
default:
fprintf (stderr,
@@ -7044,9 +6981,85 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
abort ();
}
- if (size && APPLY_RELOC)
+ if (fixP->fx_size && APPLY_RELOC)
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- fieldval, size);
+ fieldval, fixP->fx_size);
+ }
+
+ /* We are only able to convert some relocs to pc-relative. */
+ if (!fixP->fx_done && fixP->fx_pcrel)
+ {
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_LO16:
+ fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
+ break;
+
+ case BFD_RELOC_HI16:
+ fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
+ break;
+
+ case BFD_RELOC_HI16_S:
+ fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
+ break;
+
+ case BFD_RELOC_64:
+ fixP->fx_r_type = BFD_RELOC_64_PCREL;
+ break;
+
+ case BFD_RELOC_32:
+ fixP->fx_r_type = BFD_RELOC_32_PCREL;
+ break;
+
+ case BFD_RELOC_16:
+ fixP->fx_r_type = BFD_RELOC_16_PCREL;
+ break;
+
+ /* Some of course are already pc-relative. */
+ case BFD_RELOC_LO16_PCREL:
+ case BFD_RELOC_HI16_PCREL:
+ case BFD_RELOC_HI16_S_PCREL:
+ case BFD_RELOC_64_PCREL:
+ case BFD_RELOC_32_PCREL:
+ case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_PPC_B16:
+ case BFD_RELOC_PPC_B16_BRTAKEN:
+ case BFD_RELOC_PPC_B16_BRNTAKEN:
+ case BFD_RELOC_PPC_B26:
+ case BFD_RELOC_PPC_LOCAL24PC:
+ case BFD_RELOC_24_PLT_PCREL:
+ case BFD_RELOC_32_PLT_PCREL:
+ case BFD_RELOC_64_PLT_PCREL:
+ case BFD_RELOC_PPC_VLE_REL8:
+ case BFD_RELOC_PPC_VLE_REL15:
+ case BFD_RELOC_PPC_VLE_REL24:
+ break;
+
+ default:
+ if (fixP->fx_addsy)
+ {
+ char *sfile;
+ unsigned int sline;
+
+ /* Use expr_symbol_where to see if this is an
+ expression symbol. */
+ if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("unresolved expression that must"
+ " be resolved"));
+ else
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("cannot emit PC relative %s relocation"
+ " against %s"),
+ bfd_get_reloc_code_name (fixP->fx_r_type),
+ S_GET_NAME (fixP->fx_addsy));
+ }
+ else
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("unable to resolve expression"));
+ fixP->fx_done = 1;
+ break;
+ }
}
#ifdef OBJ_ELF
@@ -7082,6 +7095,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
fixP->fx_addnumber =
- bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
- S_GET_VALUE (ppc_toc_csect);
+ /* Set *valP to avoid errors. */
+ *valP = value;
#endif
}
#endif
diff --git a/gas/testsuite/gas/ppc/vsx2.d b/gas/testsuite/gas/ppc/vsx2.d
index 0fc1cfa..04e4294 100644
--- a/gas/testsuite/gas/ppc/vsx2.d
+++ b/gas/testsuite/gas/ppc/vsx2.d
@@ -7,59 +7,59 @@
Disassembly of section \.text:
0+00 <vsx2>:
- 0: 7f ce d0 19 lxsiwzx vs62,r14,r26
- 4: 7d 00 c8 19 lxsiwzx vs40,0,r25
- 8: 7f 20 d0 98 lxsiwax vs25,0,r26
- c: 7c 60 18 98 lxsiwax vs3,0,r3
- 10: 7f cc 00 66 mfvsrd r12,vs30
- 14: 7f cc 00 66 mfvsrd r12,vs30
- 18: 7f cc 00 67 mfvsrd r12,vs62
- 1c: 7f cc 00 67 mfvsrd r12,vs62
- 20: 7d 94 00 e6 mffprwz r20,f12
- 24: 7d 94 00 e6 mffprwz r20,f12
- 28: 7d 95 00 e7 mfvrwz r21,v12
- 2c: 7d 95 00 e7 mfvrwz r21,v12
- 30: 7d c9 71 18 stxsiwx vs14,r9,r14
- 34: 7e a0 41 18 stxsiwx vs21,0,r8
- 38: 7d 7c 01 66 mtvsrd vs11,r28
- 3c: 7d 7c 01 66 mtvsrd vs11,r28
- 40: 7d 7d 01 67 mtvsrd vs43,r29
- 44: 7d 7d 01 67 mtvsrd vs43,r29
- 48: 7f 16 01 a6 mtfprwa f24,r22
- 4c: 7f 16 01 a6 mtfprwa f24,r22
- 50: 7f 37 01 a7 mtvrwa v25,r23
- 54: 7f 37 01 a7 mtvrwa v25,r23
- 58: 7f 5b 01 e6 mtfprwz f26,r27
- 5c: 7f 5b 01 e6 mtfprwz f26,r27
- 60: 7f 7c 01 e7 mtvrwz v27,r28
- 64: 7f 7c 01 e7 mtvrwz v27,r28
- 68: 7d b3 6c 18 lxsspx vs13,r19,r13
- 6c: 7e 40 6c 18 lxsspx vs18,0,r13
- 70: 7d 62 25 19 stxsspx vs43,r2,r4
- 74: 7e e0 5d 19 stxsspx vs55,0,r11
- 78: f2 d0 c8 05 xsaddsp vs54,vs48,vs25
- 7c: f1 d2 08 0c xsmaddasp vs14,vs50,vs1
- 80: f3 56 50 42 xssubsp vs26,vs22,vs42
- 84: f3 75 a0 4e xsmaddmsp vs27,vs53,vs52
- 88: f1 00 d8 2a xsrsqrtesp vs8,vs59
- 8c: f1 80 48 2e xssqrtsp vs12,vs41
- 90: f3 2b 00 83 xsmulsp vs57,vs11,vs32
- 94: f0 d4 d0 89 xsmsubasp vs38,vs20,vs26
- 98: f3 53 30 c0 xsdivsp vs26,vs19,vs6
- 9c: f0 65 b8 cf xsmsubmsp vs35,vs37,vs55
- a0: f3 60 40 69 xsresp vs59,vs8
- a4: f1 81 0c 0f xsnmaddasp vs44,vs33,vs33
- a8: f2 3e f4 4c xsnmaddmsp vs17,vs62,vs30
- ac: f2 d4 fc 8d xsnmsubasp vs54,vs52,vs31
- b0: f0 a5 d4 cb xsnmsubmsp vs37,vs5,vs58
- b4: f3 d6 65 56 xxlorc vs30,vs54,vs44
- b8: f2 2e ed 91 xxlnand vs49,vs14,vs29
- bc: f3 d6 f5 d1 xxleqv vs62,vs22,vs30
- c0: f3 80 b4 2f xscvdpspn vs60,vs54
- c4: f2 c0 6c 66 xsrsp vs22,vs45
- c8: f3 40 dc a2 xscvuxdsp vs26,vs59
- cc: f0 c0 8c e3 xscvsxdsp vs38,vs49
- d0: f3 60 d5 2d xscvspdpn vs59,vs26
- d4: ff 0e 16 8c fmrgow f24,f14,f2
- d8: fe c7 2f 8c fmrgew f22,f7,f5
+ 0: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
+ 4: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
+ 8: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
+ c: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
+ 10: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
+ 14: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
+ 18: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
+ 1c: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
+ 20: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
+ 24: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
+ 28: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
+ 2c: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
+ 30: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
+ 34: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
+ 38: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
+ 3c: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
+ 40: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
+ 44: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
+ 48: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
+ 4c: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
+ 50: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
+ 54: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
+ 58: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
+ 5c: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
+ 60: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
+ 64: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
+ 68: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
+ 6c: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
+ 70: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
+ 74: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
+ 78: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
+ 7c: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
+ 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
+ 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
+ 88: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
+ 8c: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
+ 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
+ 94: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
+ 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
+ 9c: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
+ a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
+ a4: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
+ a8: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
+ ac: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
+ b0: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
+ b4: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
+ b8: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
+ bc: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
+ c0: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
+ c4: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
+ c8: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
+ cc: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
+ d0: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
+ d4: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
+ d8: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
#pass
diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d
index 689373c..b04ae7d 100644
--- a/ld/testsuite/ld-powerpc/relbrlt.d
+++ b/ld/testsuite/ld-powerpc/relbrlt.d
@@ -3,58 +3,58 @@
#ld: -melf64ppc --no-ld-generated-unwind-info --emit-relocs
#objdump: -Dr
-.*: file format elf64-powerpc
+.*
Disassembly of section \.text:
0*100000c0 <_start>:
-[0-9a-f ]*: 49 bf 00 2d bl .*
+[0-9a-f ]*: (49 bf 00 2d|2d 00 bf 49) bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c
-[0-9a-f ]*: 60 00 00 00 nop
-[0-9a-f ]*: 49 bf 00 19 bl .*
+[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
+[0-9a-f ]*: (49 bf 00 19|19 00 bf 49) bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf0020
-[0-9a-f ]*: 60 00 00 00 nop
-[0-9a-f ]*: 49 bf 00 21 bl .*
+[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
+[0-9a-f ]*: (49 bf 00 21|21 00 bf 49) bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0024
-[0-9a-f ]*: 60 00 00 00 nop
+[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
[0-9a-f ]*: 00 00 00 00 \.long 0x0
-[0-9a-f ]*: 4b ff ff e4 b .* <_start>
+[0-9a-f ]*: (4b ff ff e4|e4 ff ff 4b) b .* <_start>
\.\.\.
[0-9a-f ]*<.*plt_branch.*>:
-[0-9a-f ]*: e9 62 80 00 ld r11,-32768\(r2\)
+[0-9a-f ]*: (e9 82 80 00|00 80 82 e9) ld r12,-32768\(r2\)
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8
-[0-9a-f ]*: 7d 69 03 a6 mtctr r11
-[0-9a-f ]*: 4e 80 04 20 bctr
+[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
+[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
[0-9a-f ]*<.*long_branch.*>:
-[0-9a-f ]*: 49 bf 00 10 b .* <far>
+[0-9a-f ]*: (49 bf 00 10|10 00 bf 49) b .* <far>
[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc
[0-9a-f ]*<.*plt_branch.*>:
-[0-9a-f ]*: e9 62 80 08 ld r11,-32760\(r2\)
+[0-9a-f ]*: (e9 82 80 08|08 80 82 e9) ld r12,-32760\(r2\)
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0
-[0-9a-f ]*: 7d 69 03 a6 mtctr r11
-[0-9a-f ]*: 4e 80 04 20 bctr
+[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
+[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
\.\.\.
0*137e00fc <far>:
-[0-9a-f ]*: 4e 80 00 20 blr
+[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
\.\.\.
0*13bf00e0 <far2far>:
-[0-9a-f ]*: 4e 80 00 20 blr
+[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
\.\.\.
0*157e00e4 <huge>:
-[0-9a-f ]*: 4e 80 00 20 blr
+[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
Disassembly of section \.branch_lt:
0*157f00e8 .*:
-[0-9a-f ]*: 00 00 00 00 .*
+[0-9a-f ]*: (00 00 00 00|e0 00 bf 13) .*
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0
-[0-9a-f ]*: 13 bf 00 e0 .*
-[0-9a-f ]*: 00 00 00 00 .*
+[0-9a-f ]*: (13 bf 00 e0|00 00 00 00) .*
+[0-9a-f ]*: (00 00 00 00|e4 00 7e 15) .*
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4
-[0-9a-f ]*: 15 7e 00 e4 .*
+[0-9a-f ]*: (15 7e 00 e4|00 00 00 00) .*
diff --git a/ld/testsuite/ld-powerpc/symtocbase.d b/ld/testsuite/ld-powerpc/symtocbase.d
index 5ffab72..118885f 100644
--- a/ld/testsuite/ld-powerpc/symtocbase.d
+++ b/ld/testsuite/ld-powerpc/symtocbase.d
@@ -2,23 +2,24 @@
#source: symtocbase-2.s
#as: -a64
#ld: -shared -melf64ppc
-#objdump: -dj.data
+#objdump: -dj.data -z
#target: powerpc64*-*-*
-.*: file format elf64-powerpc
+.*
Disassembly of section \.data:
.* <i>:
- \.\.\.
-.*: 00 02 80 00 \.long 0x28000
-.*: 00 00 00 00 \.long 0x0
-.*: 00 02 80 00 \.long 0x28000
-.*: 00 00 00 00 \.long 0x0
-.*: 00 03 80 00 \.long 0x38000
-.*: 00 00 00 00 \.long 0x0
-.*: 00 03 80 00 \.long 0x38000
-.*: 00 00 00 00 \.long 0x0
-.*: 00 02 80 00 \.long 0x28000
-.*: 00 00 00 00 \.long 0x0
-.*: 00 03 80 00 \.long 0x38000
+#...
+.* \.long 0x28000
+.* \.long 0x0
+.* \.long 0x28000
+.* \.long 0x0
+.* \.long 0x38000
+.* \.long 0x0
+.* \.long 0x38000
+.* \.long 0x0
+.* \.long 0x28000
+.* \.long 0x0
+.* \.long 0x38000
+#pass
diff --git a/ld/testsuite/ld-powerpc/tls.d b/ld/testsuite/ld-powerpc/tls.d
index eb4be24..7082028 100644
--- a/ld/testsuite/ld-powerpc/tls.d
+++ b/ld/testsuite/ld-powerpc/tls.d
@@ -1,7 +1,7 @@
#source: tls.s
#source: tlslib.s
#as: -a64
-#ld:
+#ld:
#objdump: -dr
#target: powerpc64*-*-*
diff --git a/ld/testsuite/ld-powerpc/tls.t b/ld/testsuite/ld-powerpc/tls.t
index 77ba632..d54f25e 100644
--- a/ld/testsuite/ld-powerpc/tls.t
+++ b/ld/testsuite/ld-powerpc/tls.t
@@ -5,7 +5,7 @@
#objdump: -sj.tdata
#target: powerpc64*-*-*
-.*: +file format elf64-powerpc
+.*
Contents of section \.tdata:
.* (12345678|f0debc9a) (9abcdef0|78563412) (23456789|01efcdab) (abcdef01|89674523) .*
diff --git a/ld/testsuite/ld-powerpc/tlstoc.d b/ld/testsuite/ld-powerpc/tlstoc.d
index 05f61af..dccf82e 100644
--- a/ld/testsuite/ld-powerpc/tlstoc.d
+++ b/ld/testsuite/ld-powerpc/tlstoc.d
@@ -1,7 +1,7 @@
#source: tlslib.s
#source: tlstoc.s
#as: -a64
-#ld:
+#ld:
#objdump: -dr
#target: powerpc64*-*-*
diff --git a/ld/testsuite/ld-powerpc/tlstoc.t b/ld/testsuite/ld-powerpc/tlstoc.t
index 8d25622..cdf43e7 100644
--- a/ld/testsuite/ld-powerpc/tlstoc.t
+++ b/ld/testsuite/ld-powerpc/tlstoc.t
@@ -8,7 +8,7 @@
.*
Contents of section \.tdata:
- 10010148 (00c0ffee|eeffc000) 00000000 (12345678|78563412) (9abcdef0|f0debc9a) .*
- 10010158 (23456789|89674523) (abcdef01|01efcdab) (3456789a|9a785634) (bcdef012|12f0debc) .*
- 10010168 (456789ab|ab896745) (cdef0123|2301efcd) (56789abc|bc9a7856) (def01234|3412f0de) .*
- 10010178 (6789abcd|cdab8967) (ef012345|452301ef) (789abcde|debc9a78) (f0123456|563412f0) .*
+ 10010148 (00c0ffee|eeffc000) 00000000 (12345678|f0debc9a) (9abcdef0|78563412) .*
+ 10010158 (23456789|01efcdab) (abcdef01|89674523) (3456789a|12f0debc) (bcdef012|9a785634) .*
+ 10010168 (456789ab|2301efcd) (cdef0123|ab896745) (56789abc|3412f0de) (def01234|bc9a7856) .*
+ 10010178 (6789abcd|452301ef) (ef012345|cdab8967) (789abcde|563412f0) (f0123456|debc9a78) .*
diff --git a/ld/testsuite/ld-powerpc/tocopt.d b/ld/testsuite/ld-powerpc/tocopt.d
index f447f70..161f00d 100644
--- a/ld/testsuite/ld-powerpc/tocopt.d
+++ b/ld/testsuite/ld-powerpc/tocopt.d
@@ -2,13 +2,13 @@
.*: file format .*
Contents of section \.text:
- 100000b0 3d220000 e9298018 3c820000 38a48020 .*
- 100000c0 e8c50000 3fa00000 3bbd8028 7c62e82a .*
- 100000d0 3d220000 39298033 3c820000 38a48008 .*
- 100000e0 e8c50000 3fa00000 3bbd8010 7c62e82a .*
+ 100000b0 (3d220000|0000223d) (e9298018|188029e9) (3c820000|0000823c) (38a48020|2080a438) .*
+ 100000c0 (e8c50000|0000c5e8) (3fa00000|0000a03f) (3bbd8028|2880bd3b) (7c62e82a|2ae8627c) .*
+ 100000d0 (3d220000|0000223d) (39298033|33802939) (3c820000|0000823c) (38a48008|0880a438) .*
+ 100000e0 (e8c50000|0000c5e8) (3fa00000|0000a03f) (3bbd8010|1080bd3b) (7c62e82a|2ae8627c) .*
Contents of section \.got:
- 100100f0 00000000 100180f0 00000000 10010124 .*
- 10010100 00000000 10010125 00000000 10010120 .*
- 10010110 00000000 10010121 00000000 10010122 .*
+ 100100f0 (00000000|f0800110) (100180f0|00000000) (00000000|24010110) (10010124|00000000) .*
+ 10010100 (00000000|25010110) (10010125|00000000) (00000000|20010110) (10010120|00000000) .*
+ 10010110 (00000000|21010110) (10010121|00000000) (00000000|22010110) (10010122|00000000) .*
Contents of section \.sdata:
10010120 01020304 0506 .*
diff --git a/ld/testsuite/ld-powerpc/tocopt2.d b/ld/testsuite/ld-powerpc/tocopt2.d
index 174af27..a3e4aa7 100644
--- a/ld/testsuite/ld-powerpc/tocopt2.d
+++ b/ld/testsuite/ld-powerpc/tocopt2.d
@@ -2,4 +2,4 @@
.*: file format .*
Contents of section \.text:
- 100000b0 3d22effe 39297f4a .*
+ 100000b0 (3d22effe|feef223d) (39297f4a|4a7f2939) .*
diff --git a/ld/testsuite/ld-powerpc/tocopt3.d b/ld/testsuite/ld-powerpc/tocopt3.d
index 174af27..a3e4aa7 100644
--- a/ld/testsuite/ld-powerpc/tocopt3.d
+++ b/ld/testsuite/ld-powerpc/tocopt3.d
@@ -2,4 +2,4 @@
.*: file format .*
Contents of section \.text:
- 100000b0 3d22effe 39297f4a .*
+ 100000b0 (3d22effe|feef223d) (39297f4a|4a7f2939) .*
diff --git a/ld/testsuite/ld-powerpc/tocopt4.d b/ld/testsuite/ld-powerpc/tocopt4.d
index 4f450e4..1e0ccc5 100644
--- a/ld/testsuite/ld-powerpc/tocopt4.d
+++ b/ld/testsuite/ld-powerpc/tocopt4.d
@@ -2,6 +2,6 @@
.*: file format .*
Contents of section \.text:
- 100000b0 e9298000 .*
+ 100000b0 (e9298000|008029e9) .*
Contents of section \.got:
- 100100b8 00000000 00000002 .*
+ 100100b8 (00000000|02000000) (00000002|00000000) .*
diff --git a/ld/testsuite/ld-powerpc/tocopt5.d b/ld/testsuite/ld-powerpc/tocopt5.d
index 8f03c07..758b7fc 100644
--- a/ld/testsuite/ld-powerpc/tocopt5.d
+++ b/ld/testsuite/ld-powerpc/tocopt5.d
@@ -2,12 +2,12 @@
.*: file format .*
Contents of section \.text:
- 100000b0 60000000 e9228018 60000000 38a28020 .*
- 100000c0 e8c50000 60000000 3922802b 60000000 .*
- 100000d0 38a28008 e8c50000 .*
+ 100000b0 (60000000|00000060) (e9228018|188022e9) (60000000|00000060) (38a28020|2080a238) .*
+ 100000c0 (e8c50000|0000c5e8) (60000000|00000060) (3922802b|2b802239) (60000000|00000060) .*
+ 100000d0 (38a28008|0880a238) (e8c50000|0000c5e8) .*
Contents of section \.got:
- 100100d8 00000000 100180d8 00000000 10010104 .*
- 100100e8 00000000 10010105 00000000 10010100 .*
- 100100f8 00000000 10010101 .*
+ 100100d8 (00000000|d8800110) (100180d8|00000000) (00000000|04010110) (10010104|00000000) .*
+ 100100e8 (00000000|05010110) (10010105|00000000) (00000000|00010110) (10010100|00000000) .*
+ 100100f8 (00000000|01010110) (10010101|00000000) .*
Contents of section \.sdata:
10010100 01020304 0506 .*