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From 15a2a3aa1c4eb2c3abac569a120714425b64864d Mon Sep 17 00:00:00 2001
From: Eduardo Habkost <ehabkost@redhat.com>
Date: Thu, 26 Jul 2018 17:18:56 +0100
Subject: [PATCH 06/14] i386: Initialize cache information for EPYC family
processors
RH-Author: Eduardo Habkost <ehabkost@redhat.com>
Message-id: <20180726171904.27418-4-ehabkost@redhat.com>
Patchwork-id: 81527
O-Subject: [qemu-kvm RHEL8/virt212 PATCH v2 03/11] i386: Initialize cache information for EPYC family processors
Bugzilla: 1597739
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
From: Babu Moger <babu.moger@amd.com>
Initialize pre-determined cache information for EPYC processors.
Signed-off-by: Babu Moger <babu.moger@amd.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Message-Id: <20180510204148.11687-5-babu.moger@amd.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
(cherry picked from commit fe52acd2a054b97765963a42037f2f886545e30c)
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
---
target/i386/cpu.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 50af741..bd0abc2 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1108,6 +1108,56 @@ struct X86CPUDefinition {
CPUCaches *cache_info;
};
+static CPUCaches epyc_cache_info = {
+ .l1d_cache = {
+ .type = DCACHE,
+ .level = 1,
+ .size = 32 * KiB,
+ .line_size = 64,
+ .associativity = 8,
+ .partitions = 1,
+ .sets = 64,
+ .lines_per_tag = 1,
+ .self_init = 1,
+ .no_invd_sharing = true,
+ },
+ .l1i_cache = {
+ .type = ICACHE,
+ .level = 1,
+ .size = 64 * KiB,
+ .line_size = 64,
+ .associativity = 4,
+ .partitions = 1,
+ .sets = 256,
+ .lines_per_tag = 1,
+ .self_init = 1,
+ .no_invd_sharing = true,
+ },
+ .l2_cache = {
+ .type = UNIFIED_CACHE,
+ .level = 2,
+ .size = 512 * KiB,
+ .line_size = 64,
+ .associativity = 8,
+ .partitions = 1,
+ .sets = 1024,
+ .lines_per_tag = 1,
+ },
+ .l3_cache = {
+ .type = UNIFIED_CACHE,
+ .level = 3,
+ .size = 8 * MiB,
+ .line_size = 64,
+ .associativity = 16,
+ .partitions = 1,
+ .sets = 8192,
+ .lines_per_tag = 1,
+ .self_init = true,
+ .inclusive = true,
+ .complex_indexing = true,
+ },
+};
+
static X86CPUDefinition builtin_x86_defs[] = {
{
/* qemu64 is the default CPU model for all *-rhel7.* machine-types.
@@ -2327,6 +2377,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x8000000A,
.model_id = "AMD EPYC Processor",
+ .cache_info = &epyc_cache_info,
},
{
.name = "EPYC-IBPB",
@@ -2373,6 +2424,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x8000000A,
.model_id = "AMD EPYC Processor (with IBPB)",
+ .cache_info = &epyc_cache_info,
},
};
--
1.8.3.1