From 7fa8107debfd4c659b77a8ba12b96144dfbdc113 Mon Sep 17 00:00:00 2001
From: "plai@redhat.com" <plai@redhat.com>
Date: Mon, 4 Feb 2019 17:29:44 +0100
Subject: [PATCH 1/3] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu feature
RH-Author: plai@redhat.com
Message-id: <1549301384-19698-1-git-send-email-plai@redhat.com>
Patchwork-id: 84205
O-Subject: [RHEL7.7 qemu-kvm PATCH BZ 1537773 RESEND] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu feature
Bugzilla: 1537773
RH-Acked-by: Bandan Das <bsd@redhat.com>
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
From: Jingqi Liu <jingqi.liu@intel.com>
The CLDEMOTE instruction hints to hardware that the cache line that
contains the linear address should be moved("demoted") from
the cache(s) closest to the processor core to a level more distant
from the processor core. This may accelerate subsequent accesses
to the line by other cores in the same coherence domain,
especially if the line was written by the core that demotes the line.
Intel Snow Ridge has added new cpu feature, CLDEMOTE.
The new cpu feature needs to be exposed to guest VM.
The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 25] CLDEMOTE
The release document ref below link:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf
Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
Message-Id: <1525406253-54846-1-git-send-email-jingqi.liu@intel.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
(cherry picked from commit 0da0fb062841d0dcd8ba47e4a989d2e952cdf0ff)
Signed-off-by: Paul Lai <plai@redhat.com>
Resolved Conflicts:
target/i386/cpu.c [doesn't exist]
changes made to target-i386/cpu.c
target/i386/cpu.h [doesn't exist]
changes made to target-i386/cpu.h
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
---
target-i386/cpu.c | 2 +-
target-i386/cpu.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index a36483e..c9603df 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -162,7 +162,7 @@ static const char *cpuid_7_0_ecx_feature_name[] = {
"avx512bitalg", NULL, "avx512-vpopcntdq", NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, "rdpid", NULL,
- NULL, NULL, NULL, NULL,
+ NULL, "cldemote", NULL, NULL,
NULL, NULL, NULL, NULL,
};
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 73437f1..5d47ab8 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -593,6 +593,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_ECX_AVX512BITALG (1U << 12)
#define CPUID_7_0_ECX_AVX512_VPOPCNTDQ (1U << 14) /* POPCNT for vectors of DW/QW */
#define CPUID_7_0_ECX_RDPID (1U << 22)
+#define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */
#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
--
1.8.3.1