From 781a1f8449afb55280f6327e6b495c2d324db6bf Mon Sep 17 00:00:00 2001
From: Mark Wielaard <mark@klomp.org>
Date: Nov 17 2021 15:09:01 +0000
Subject: Add valgrind-3.18.1-ppc-pstq.patch


---

diff --git a/valgrind-3.18.1-ppc-pstq.patch b/valgrind-3.18.1-ppc-pstq.patch
new file mode 100644
index 0000000..2e23d18
--- /dev/null
+++ b/valgrind-3.18.1-ppc-pstq.patch
@@ -0,0 +1,47 @@
+commit ae8c6de01417023e78763de145b1c0e6ddd87277
+Author: Carl Love <cel@us.ibm.com>
+Date:   Wed Oct 20 20:40:13 2021 +0000
+
+    Fix for the prefixed stq instruction in PC relative mode.
+    
+    The pstq instruction for R=1, was not using the correct effective address.
+    The EA_hi and EA_lo should have been based on the value of EA as calculated
+    by the function calculate_prefix_EA.  Unfortuanely, the EA_hi and EA_lo
+    addresses were still using the previous code (not PC relative) to calculate
+    the address from the contants of RA plus the offset.
+
+diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
+index 8afd77490..543fa9574 100644
+--- a/VEX/priv/guest_ppc_toIR.c
++++ b/VEX/priv/guest_ppc_toIR.c
+@@ -9838,23 +9838,24 @@ static Bool dis_int_store_ds_prefix ( UInt prefix,
+             if (host_endness == VexEndnessBE) {
+ 
+                /* upper 64-bits */
+-               assign( EA_hi, ea_rAor0_simm( rA_addr, immediate_val ) );
++               assign( EA_hi, mkexpr(EA));
+ 
+                /* lower 64-bits */
+-               assign( EA_lo, ea_rAor0_simm( rA_addr, immediate_val+8 ) );
++               assign( EA_lo, binop(Iop_Add64, mkexpr(EA), mkU64(8)));
++
+             } else {
+                /* upper 64-bits */
+-               assign( EA_hi, ea_rAor0_simm( rA_addr, immediate_val+8 ) );
++               assign( EA_hi, binop(Iop_Add64, mkexpr(EA), mkU64(8)));
+ 
+                /* lower 64-bits */
+-               assign( EA_lo, ea_rAor0_simm( rA_addr, immediate_val ) );
++               assign( EA_lo, mkexpr(EA));
+             }
+          } else {
+             /* upper half of upper 64-bits */
+-            assign( EA_hi, ea_rAor0_simm( rA_addr, immediate_val+4 ) );
++            assign( EA_hi, binop(Iop_Add32, mkexpr(EA), mkU32(4)));
+ 
+             /* lower half of upper 64-bits */
+-            assign( EA_lo, ea_rAor0_simm( rA_addr, immediate_val+12 ) );
++            assign( EA_lo, binop(Iop_Add32, mkexpr(EA), mkU32(12)));
+          }
+ 
+          /* Note, the store order for stq instruction is the same for BE
diff --git a/valgrind.spec b/valgrind.spec
index 96a5c39..a9f0e5e 100644
--- a/valgrind.spec
+++ b/valgrind.spec
@@ -94,6 +94,10 @@ Patch7: valgrind-3.18.1-s390x-EXRL.patch
 # KDE#444571 - PPC, fix lxsibzx and lxsihzx
 Patch8: valgrind-3.18.1-ppc64-lxsibzx-lxsihzx.patch
 
+# commit ae8c6de01417023e78763de145b1c0e6ddd87277
+# Fix for the prefixed stq instruction in PC relative mode.
+Patch9: valgrind-3.18.1-ppc-pstq.patch
+
 BuildRequires: make
 BuildRequires: glibc-devel
 
@@ -234,6 +238,7 @@ Valgrind User Manual for details.
 %patch6 -p1
 %patch7 -p1
 %patch8 -p1
+%patch9 -p1
 
 %build
 # LTO triggers undefined symbols in valgrind.  Valgrind has a --enable-lto
@@ -463,6 +468,9 @@ fi
 %endif
 
 %changelog
+* Wed Nov 17 2021 Mark Wielaard <mjw@fedoraproject.org>
+- Add valgrind-3.18.1-ppc-pstq.patch
+
 * Mon Nov  1 2021 Mark Wielaard <mjw@fedoraproject.org> - 3.18.1-2
 - Add valgrind-3.18.1-dhat-tests-copy.patch
 - Add valgrind-3.18.1-s390x-EXRL.patch