commit 6f472ff11be7fa4a1114b2e3d321609717325311

Author: tom <tom@8f6e269a-dfd6-0310-a8e1-e2731360e62c>

Date:   Wed Feb 3 10:14:18 2016 +0000

    Handle missing FCOM case on amd64.

    Patch from Mark Harris on BZ#212352.

    git-svn-id: svn://svn.valgrind.org/vex/trunk@3207 8f6e269a-dfd6-0310-a8e1-e2731360e62c

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c

index af4817f..936d16f 100644

--- a/VEX/priv/guest_amd64_toIR.c

+++ b/VEX/priv/guest_amd64_toIR.c

@@ -6401,19 +6401,20 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok,

                fp_do_op_mem_ST_0 ( addr, "mul", dis_buf, Iop_MulF64, True );

                break;

-//..             case 2: /* FCOM double-real */

-//..                DIP("fcoml %s\n", dis_buf);

-//..                /* This forces C1 to zero, which isn't right. */

-//..                put_C3210( 

-//..                    binop( Iop_And32,

-//..                           binop(Iop_Shl32, 

-//..                                 binop(Iop_CmpF64, 

-//..                                       get_ST(0),

-//..                                       loadLE(Ity_F64,mkexpr(addr))),

-//..                                 mkU8(8)),

-//..                           mkU32(0x4500)

-//..                    ));

-//..                break;  

+            case 2: /* FCOM double-real */

+               DIP("fcoml %s\n", dis_buf);

+               /* This forces C1 to zero, which isn't right. */

+               put_C3210(

+                   unop(Iop_32Uto64,

+                   binop( Iop_And32,

+                          binop(Iop_Shl32,

+                                binop(Iop_CmpF64,

+                                      get_ST(0),

+                                      loadLE(Ity_F64,mkexpr(addr))),

+                                mkU8(8)),

+                          mkU32(0x4500)

+                   )));

+               break;

             case 3: /* FCOMP double-real */

                DIP("fcompl %s\n", dis_buf);