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commit 595341b150312d2407bd43304449bf39ec3e1fa8
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Author: Julian Seward <jseward@acm.org>
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Date: Sat Nov 13 19:59:07 2021 +0100
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amd64 front end: add more spec rules:
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S after SHRQ
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Z after SHLQ
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NZ after SHLQ
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Z after SHLL
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S after SHLL
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The lack of at least one of these was observed to cause occasional false
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positives in Memcheck.
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Plus add commented-out cases so as to complete the set of 12 rules
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{Z,NZ,S,NS} after {SHRQ,SHLQ,SHLL}. The commented-out ones are commented
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out because I so far didn't find any use cases for them.
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diff --git a/VEX/priv/guest_amd64_helpers.c b/VEX/priv/guest_amd64_helpers.c
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index 9d61e7a0f..ba71c1b62 100644
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--- a/VEX/priv/guest_amd64_helpers.c
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+++ b/VEX/priv/guest_amd64_helpers.c
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@@ -1823,16 +1823,26 @@ IRExpr* guest_amd64_spechelper ( const HChar* function_name,
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/*---------------- SHRQ ----------------*/
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if (isU64(cc_op, AMD64G_CC_OP_SHRQ) && isU64(cond, AMD64CondZ)) {
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- /* SHRQ, then Z --> test dep1 == 0 */
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+ /* SHRQ, then Z --> test result[63:0] == 0 */
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return unop(Iop_1Uto64,
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binop(Iop_CmpEQ64, cc_dep1, mkU64(0)));
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}
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if (isU64(cc_op, AMD64G_CC_OP_SHRQ) && isU64(cond, AMD64CondNZ)) {
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- /* SHRQ, then NZ --> test dep1 != 0 */
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+ /* SHRQ, then NZ --> test result[63:0] != 0 */
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return unop(Iop_1Uto64,
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binop(Iop_CmpNE64, cc_dep1, mkU64(0)));
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}
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+ if (isU64(cc_op, AMD64G_CC_OP_SHRQ) && isU64(cond, AMD64CondS)) {
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+ /* SHRQ, then S --> (ULong)result[63] (result is in dep1) */
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+ return binop(Iop_Shr64, cc_dep1, mkU8(63));
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+ }
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+ // No known test case for this, hence disabled:
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+ //if (isU64(cc_op, AMD64G_CC_OP_SHRQ) && isU64(cond, AMD64CondNS)) {
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+ // /* SHRQ, then NS --> (ULong) ~ result[63] */
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+ // vassert(0);
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+ //}
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+
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/*---------------- SHRL ----------------*/
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if (isU64(cc_op, AMD64G_CC_OP_SHRL) && isU64(cond, AMD64CondZ)) {
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@@ -1881,6 +1891,52 @@ IRExpr* guest_amd64_spechelper ( const HChar* function_name,
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// mkU32(0)));
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//}
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+ /*---------------- SHLQ ----------------*/
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+
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+ if (isU64(cc_op, AMD64G_CC_OP_SHLQ) && isU64(cond, AMD64CondZ)) {
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+ /* SHLQ, then Z --> test dep1 == 0 */
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+ return unop(Iop_1Uto64,
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+ binop(Iop_CmpEQ64, cc_dep1, mkU64(0)));
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+ }
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+ if (isU64(cc_op, AMD64G_CC_OP_SHLQ) && isU64(cond, AMD64CondNZ)) {
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+ /* SHLQ, then NZ --> test dep1 != 0 */
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+ return unop(Iop_1Uto64,
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+ binop(Iop_CmpNE64, cc_dep1, mkU64(0)));
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+ }
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+
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+ //if (isU64(cc_op, AMD64G_CC_OP_SHLQ) && isU64(cond, AMD64CondS)) {
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+ // /* SHLQ, then S --> (ULong)result[63] */
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+ // vassert(0);
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+ //}
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+ //if (isU64(cc_op, AMD64G_CC_OP_SHLQ) && isU64(cond, AMD64CondNS)) {
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+ // /* SHLQ, then NS --> (ULong) ~ result[63] */
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+ // vassert(0);
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+ //}
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+
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+ /*---------------- SHLL ----------------*/
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+
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+ if (isU64(cc_op, AMD64G_CC_OP_SHLL) && isU64(cond, AMD64CondZ)) {
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+ /* SHLL, then Z --> test result[31:0] == 0 */
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+ return unop(Iop_1Uto64,
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+ binop(Iop_CmpEQ32, unop(Iop_64to32, cc_dep1),
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+ mkU32(0)));
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+ }
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+ //if (isU64(cc_op, AMD64G_CC_OP_SHLL) && isU64(cond, AMD64CondNZ)) {
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+ // /* SHLL, then NZ --> test dep1 != 0 */
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+ // vassert(0);
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+ //}
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+
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+ if (isU64(cc_op, AMD64G_CC_OP_SHLL) && isU64(cond, AMD64CondS)) {
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+ /* SHLL, then S --> (ULong)result[31] */
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+ return binop(Iop_And64,
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+ binop(Iop_Shr64, cc_dep1, mkU8(31)),
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+ mkU64(1));
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+ }
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+ //if (isU64(cc_op, AMD64G_CC_OP_SHLL) && isU64(cond, AMD64CondNS)) {
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+ // /* SHLL, then NS --> (ULong) ~ result[31] */
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+ // vassert(0);
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+ //}
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+
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/*---------------- COPY ----------------*/
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/* This can happen, as a result of amd64 FP compares: "comisd ... ;
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jbe" for example. */
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