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commit 6f472ff11be7fa4a1114b2e3d321609717325311
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Author: tom <tom@8f6e269a-dfd6-0310-a8e1-e2731360e62c>
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Date: Wed Feb 3 10:14:18 2016 +0000
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Handle missing FCOM case on amd64.
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Patch from Mark Harris on BZ#212352.
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git-svn-id: svn://svn.valgrind.org/vex/trunk@3207 8f6e269a-dfd6-0310-a8e1-e2731360e62c
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diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
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index af4817f..936d16f 100644
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--- a/VEX/priv/guest_amd64_toIR.c
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+++ b/VEX/priv/guest_amd64_toIR.c
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@@ -6401,19 +6401,20 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok,
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fp_do_op_mem_ST_0 ( addr, "mul", dis_buf, Iop_MulF64, True );
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break;
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-//.. case 2: /* FCOM double-real */
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-//.. DIP("fcoml %s\n", dis_buf);
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-//.. /* This forces C1 to zero, which isn't right. */
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-//.. put_C3210(
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-//.. binop( Iop_And32,
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-//.. binop(Iop_Shl32,
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-//.. binop(Iop_CmpF64,
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-//.. get_ST(0),
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-//.. loadLE(Ity_F64,mkexpr(addr))),
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-//.. mkU8(8)),
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-//.. mkU32(0x4500)
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-//.. ));
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-//.. break;
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+ case 2: /* FCOM double-real */
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+ DIP("fcoml %s\n", dis_buf);
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+ /* This forces C1 to zero, which isn't right. */
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+ put_C3210(
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+ unop(Iop_32Uto64,
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+ binop( Iop_And32,
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+ binop(Iop_Shl32,
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+ binop(Iop_CmpF64,
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+ get_ST(0),
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+ loadLE(Ity_F64,mkexpr(addr))),
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+ mkU8(8)),
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+ mkU32(0x4500)
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+ )));
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+ break;
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case 3: /* FCOMP double-real */
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DIP("fcompl %s\n", dis_buf);
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