Blame 0001-hw-pci-reserve-IO-and-mem-for-pci-express-downstream.patch

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From 3aa31d7d6375303fc88438021aad485f50bb1e39 Mon Sep 17 00:00:00 2001
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Message-Id: <3aa31d7d6375303fc88438021aad485f50bb1e39.1404919343.git.crobinso@redhat.com>
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From: Marcel Apfelbaum <marcel.a@redhat.com>
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Date: Mon, 23 Jun 2014 18:29:51 +0300
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Subject: [PATCH] hw/pci: reserve IO and mem for pci express downstream ports
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 with no devices attached
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Commit c6e298e1f12e0f4ca02b6da5e42919ae055f6830
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    hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached
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introduced support for hot-plugging devices behind pci-2-pci bridges.
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Extend hotplug support also for pci express downstream ports.
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Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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---
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 src/fw/pciinit.c | 34 ++++++++++++++++++++++++++++++++--
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 1 file changed, 32 insertions(+), 2 deletions(-)
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diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
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index 0ad548f..fd5dfb9 100644
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--- a/src/fw/pciinit.c
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+++ b/src/fw/pciinit.c
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@@ -636,6 +636,36 @@ pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev,
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     return entry;
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 }
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+static int pci_bus_hotplug_support(struct pci_bus *bus)
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+{
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+    u8 pcie_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_EXP);
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+    u8 shpc_cap;
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+
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+    if (pcie_cap) {
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+        u16 pcie_flags = pci_config_readw(bus->bus_dev->bdf,
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+                                          pcie_cap + PCI_EXP_FLAGS);
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+        u8 port_type = ((pcie_flags & PCI_EXP_FLAGS_TYPE) >>
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+                       (__builtin_ffs(PCI_EXP_FLAGS_TYPE) - 1));
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+        u8 downstream_port = (port_type == PCI_EXP_TYPE_DOWNSTREAM) ||
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+                             (port_type == PCI_EXP_TYPE_ROOT_PORT);
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+        /*
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+         * PCI Express SPEC, 7.8.2:
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+         *   Slot Implemented – When Set, this bit indicates that the Link
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+         *   HwInit associated with this Port is connected to a slot (as
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+         *   compared to being connected to a system-integrated device or
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+         *   being disabled).
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+         *   This bit is valid for Downstream Ports. This bit is undefined
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+         *   for Upstream Ports.
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+         */
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+        u16 slot_implemented = pcie_flags & PCI_EXP_FLAGS_SLOT;
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+
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+        return downstream_port && slot_implemented;
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+    }
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+
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+    shpc_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_SHPC);
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+    return !!shpc_cap;
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+}
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+
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 static int pci_bios_check_devices(struct pci_bus *busses)
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 {
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     dprintf(1, "PCI: check devices\n");
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@@ -678,7 +708,7 @@ static int pci_bios_check_devices(struct pci_bus *busses)
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             continue;
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         struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)];
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         int type;
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-        u8 shpc_cap = pci_find_capability(s->bus_dev, PCI_CAP_ID_SHPC);
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+        int hotplug_support = pci_bus_hotplug_support(s);
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         for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
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             u64 align = (type == PCI_REGION_TYPE_IO) ?
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                 PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
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@@ -687,7 +717,7 @@ static int pci_bios_check_devices(struct pci_bus *busses)
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             if (pci_region_align(&s->r[type]) > align)
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                  align = pci_region_align(&s->r[type]);
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             u64 sum = pci_region_sum(&s->r[type]);
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-            if (!sum && shpc_cap)
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+            if (!sum && hotplug_support)
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                 sum = align; /* reserve min size for hot-plug */
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             u64 size = ALIGN(sum, align);
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             int is64 = pci_bios_bridge_region_is64(&s->r[type],
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-- 
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1.9.3
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