From 868a69e7de67e10fc96436ec41dd9e0343053581 Mon Sep 17 00:00:00 2001

From: Noa Osherovich <noaos@mellanox.com>

Date: Thu, 3 Aug 2017 10:00:14 +0300

Subject: [PATCH rdma-core 2/3] mlx5: Report Multi-Packet RQ capabilities

 through mlx5 direct verbs

A Multi-Packet RQ is a receive queue where multiple packets are

written to the same WQE. Each message starts in the beginning of a

stride. The total size of the scatter elements of each WQE is

determined upon RQ creation and all the posted WQEs should meet the

determined size.

A Multi-Packet RQ reduces the number of needed post-recv operations

thus increasing performance.

It reduces memory footprint by allowing each packet to consume a

different number of strides instead of the whole WR.

Signed-off-by: Noa Osherovich <noaos@mellanox.com>

Reviewed-by: Yishai Hadas <yishaih@mellanox.com>

(cherry picked from commit ec8ec52698c7cbd6d06bd8f3e54b673a52cb4d30)

---

 providers/mlx5/man/mlx5dv_query_device.3 | 19 +++++++++++++++++++

 providers/mlx5/mlx5-abi.h                | 11 +++++++++++

 providers/mlx5/mlx5.c                    |  5 +++++

 providers/mlx5/mlx5.h                    |  1 +

 providers/mlx5/mlx5dv.h                  | 13 ++++++++++++-

 providers/mlx5/verbs.c                   |  1 +

 6 files changed, 49 insertions(+), 1 deletion(-)

diff --git a/providers/mlx5/man/mlx5dv_query_device.3 b/providers/mlx5/man/mlx5dv_query_device.3

index c2fe9a3e..bb047454 100644

--- a/providers/mlx5/man/mlx5dv_query_device.3

+++ b/providers/mlx5/man/mlx5dv_query_device.3

@@ -21,6 +21,25 @@ of the internal hardware structures that mlx5dv.h represents. Additions of new f

 structures are handled by comp_mask field.

 .PP

 .nf

+struct mlx5dv_sw_parsing_caps {

+.in +8

+uint32_t sw_parsing_offloads; /* Use enum mlx5dv_sw_parsing_offloads */

+uint32_t supported_qpts;

+.in -8

+};

+.PP

+.nf

+struct mlx5dv_striding_rq_caps {

+.in +8

+uint32_t min_single_stride_log_num_of_bytes; /* min log size of each stride */

+uint32_t max_single_stride_log_num_of_bytes; /* max log size of each stride */

+uint32_t min_single_wqe_log_num_of_strides; /* min log number of strides per WQE */

+uint32_t max_single_wqe_log_num_of_strides; /* max log number of strides per WQE */

+uint32_t supported_qpts;

+.in -8

+};

+.PP

+.nf

 struct mlx5dv_context {

 .in +8

 uint8_t         version;

diff --git a/providers/mlx5/mlx5-abi.h b/providers/mlx5/mlx5-abi.h

index bce9e559..da7d54f2 100644

--- a/providers/mlx5/mlx5-abi.h

+++ b/providers/mlx5/mlx5-abi.h

@@ -279,6 +279,16 @@ enum mlx5_mpw_caps {

 	MLX5_SUPPORT_EMPW	= 1 << 2,

 };

+enum mlx5_query_dev_resp_flags {

+	MLX5_QUERY_DEV_RESP_FLAGS_CQE_128B_COMP	= 1 << 0,

+	MLX5_QUERY_DEV_RESP_FLAGS_CQE_128B_PAD	= 1 << 1,

+};

+

+struct mlx5_striding_rq_caps {

+	struct mlx5dv_striding_rq_caps	caps;

+	__u32				reserved;

+};

+

 struct mlx5_query_device_ex_resp {

 	struct ibv_query_device_resp_ex ibv_resp;

 	__u32				comp_mask;

@@ -289,6 +299,7 @@ struct mlx5_query_device_ex_resp {

 	struct mlx5_packet_pacing_caps	packet_pacing_caps;

 	__u32				support_multi_pkt_send_wqe;

 	__u32				reserved;

+	struct mlx5_striding_rq_caps	striding_rq_caps;

 };

 #endif /* MLX5_ABI_H */

diff --git a/providers/mlx5/mlx5.c b/providers/mlx5/mlx5.c

index e7adf148..88287536 100644

--- a/providers/mlx5/mlx5.c

+++ b/providers/mlx5/mlx5.c

@@ -636,6 +636,11 @@ int mlx5dv_query_device(struct ibv_context *ctx_in,

 	if (mctx->vendor_cap_flags & MLX5_VENDOR_CAP_FLAGS_ENHANCED_MPW)

 		attrs_out->flags |= MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW;

+	if (attrs_out->comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {

+		attrs_out->striding_rq_caps = mctx->striding_rq_caps;

+		comp_mask_out |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;

+	}

+

 	attrs_out->comp_mask = comp_mask_out;

 	return 0;

diff --git a/providers/mlx5/mlx5.h b/providers/mlx5/mlx5.h

index 46fce282..1e8b45be 100644

--- a/providers/mlx5/mlx5.h

+++ b/providers/mlx5/mlx5.h

@@ -272,6 +272,7 @@ struct mlx5_context {

 	uint64_t			vendor_cap_flags; /* Use enum mlx5_vendor_cap_flags */

 	struct mlx5dv_cqe_comp_caps	cqe_comp_caps;

 	struct mlx5dv_ctx_allocators	extern_alloc;

+	struct mlx5dv_striding_rq_caps	striding_rq_caps;

 };

 struct mlx5_bitmap {

diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h

index ffe2c555..0a7fe4d6 100644

--- a/providers/mlx5/mlx5dv.h

+++ b/providers/mlx5/mlx5dv.h

@@ -58,7 +58,9 @@ enum {

 enum mlx5dv_context_comp_mask {

 	MLX5DV_CONTEXT_MASK_CQE_COMPRESION	= 1 << 0,

-	MLX5DV_CONTEXT_MASK_RESERVED		= 1 << 1,

+	MLX5DV_CONTEXT_MASK_SWP			= 1 << 1,

+	MLX5DV_CONTEXT_MASK_STRIDING_RQ		= 1 << 2,

+	MLX5DV_CONTEXT_MASK_RESERVED		= 1 << 3,

 };

 struct mlx5dv_cqe_comp_caps {

@@ -66,6 +68,14 @@ struct mlx5dv_cqe_comp_caps {

 	uint32_t supported_format; /* enum mlx5dv_cqe_comp_res_format */

 };

+struct mlx5dv_striding_rq_caps {

+	uint32_t min_single_stride_log_num_of_bytes;

+	uint32_t max_single_stride_log_num_of_bytes;

+	uint32_t min_single_wqe_log_num_of_strides;

+	uint32_t max_single_wqe_log_num_of_strides;

+	uint32_t supported_qpts;

+};

+

 /*

  * Direct verbs device-specific attributes

  */

@@ -74,6 +84,7 @@ struct mlx5dv_context {

 	uint64_t	flags;

 	uint64_t	comp_mask;

 	struct mlx5dv_cqe_comp_caps	cqe_comp_caps;

+	struct mlx5dv_striding_rq_caps striding_rq_caps;

 };

 enum mlx5dv_context_flags {

diff --git a/providers/mlx5/verbs.c b/providers/mlx5/verbs.c

index 6506bc36..e9414c64 100644

--- a/providers/mlx5/verbs.c

+++ b/providers/mlx5/verbs.c

@@ -2003,6 +2003,7 @@ int mlx5_query_device_ex(struct ibv_context *context,

 		mctx->vendor_cap_flags |= MLX5_VENDOR_CAP_FLAGS_ENHANCED_MPW;

 	mctx->cqe_comp_caps = resp.cqe_comp_caps;

+	mctx->striding_rq_caps = resp.striding_rq_caps.caps;

 	major     = (raw_fw_ver >> 32) & 0xffff;

 	minor     = (raw_fw_ver >> 16) & 0xffff;

-- 

2.12.1