Blame SOURCES/0001-mlx5-Consider-single-threaded-mode-for-shared-UAR.patch

3bcb62
From 0d9ed0f09b92f730ae3a755415c4e68e62c4cf99 Mon Sep 17 00:00:00 2001
3bcb62
From: Yishai Hadas <yishaih@nvidia.com>
3bcb62
Date: Wed, 9 Dec 2020 09:15:39 +0200
3bcb62
Subject: [PATCH] mlx5: Consider single threaded mode for shared UAR
3bcb62
3bcb62
[ Upstream commit 9d6cbd2858d237d1d56bada430eca032074204c8 ]
3bcb62
3bcb62
In case application uses a single threaded mode even a UAR that is
3bcb62
shared between QPs doesn't need to take a lock.
3bcb62
3bcb62
Fixes: 7fdcd258bc5f ("mlx5: Move to fully dynamic UAR mode including QPs")
3bcb62
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
3bcb62
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
3bcb62
---
3bcb62
 providers/mlx5/verbs.c | 2 +-
3bcb62
 1 file changed, 1 insertion(+), 1 deletion(-)
3bcb62
3bcb62
diff --git a/providers/mlx5/verbs.c b/providers/mlx5/verbs.c
3bcb62
index 7907218295f6..cc93dc4c366e 100644
3bcb62
--- a/providers/mlx5/verbs.c
3bcb62
+++ b/providers/mlx5/verbs.c
3bcb62
@@ -326,7 +326,7 @@ static void mlx5_insert_dyn_uuars(struct mlx5_context *ctx,
3bcb62
 		if (!bf_uar->dyn_alloc_uar)
3bcb62
 			bf->bfreg_dyn_index = (ctx->curr_legacy_dyn_sys_uar_page - 1) * num_bfregs_per_page + j;
3bcb62
 		bf->dyn_alloc_uar = bf_uar->dyn_alloc_uar;
3bcb62
-		bf->need_lock = bf_uar->qp_shared;
3bcb62
+		bf->need_lock = bf_uar->qp_shared && !mlx5_single_threaded;
3bcb62
 		mlx5_spinlock_init(&bf->lock, bf->need_lock);
3bcb62
 		if (j != 0) {
3bcb62
 			bf->uar = bf_uar->uar;
3bcb62
-- 
3bcb62
2.25.4
3bcb62