From dca0614e2d523c3345213999a9ad5ab9f009ca54 Mon Sep 17 00:00:00 2001 From: Pablo Greco Date: May 04 2021 17:39:30 +0000 Subject: Update to 5.10.33 --- diff --git a/.raspberrypi2.metadata b/.raspberrypi2.metadata index c2ef403..3653b6d 100644 --- a/.raspberrypi2.metadata +++ b/.raspberrypi2.metadata @@ -1,3 +1,3 @@ be0b909f1fbb760cc2d5cf146e1da3b2af0cf899 SOURCES/linux-5.10.tar.xz -26f6b0b56ad9838500c214f9b07b44e0532318a0 SOURCES/8c7c52466505df5d420a5cb9131ec29205bcecf8.tar.gz -1acdb51806360bd87c9b6fd7681ee963e656ac5d SOURCES/patch-5.10.29.xz +e82da44fe0f39874536ca5ac326748b4a08f278b SOURCES/1a46874494146f470d7a61b0b6f4f15a07dd8b35.tar.gz +d33f1a6672f510640120a30539aef97ca5d2cd42 SOURCES/patch-5.10.33.xz diff --git a/SOURCES/rpi-5.10.x.patch b/SOURCES/rpi-5.10.x.patch index 7301be5..0641112 100644 --- a/SOURCES/rpi-5.10.x.patch +++ b/SOURCES/rpi-5.10.x.patch @@ -1,7 +1,7 @@ -From e662aee7a26a9a6bb06315ffb2277e9f69eb9a5f Mon Sep 17 00:00:00 2001 +From 92c96deebde64d4b60dcec7ef6e01a187da9f9a9 Mon Sep 17 00:00:00 2001 From: Dan Pasanen Date: Thu, 21 Sep 2017 09:55:42 -0500 -Subject: [PATCH 001/580] arm: partially revert +Subject: [PATCH 001/661] arm: partially revert 702b94bff3c50542a6e4ab9a4f4cef093262fe65 * Re-expose some dmi APIs for use in VCSM @@ -109,10 +109,10 @@ index e21249548e9f..33e4a9b8f1ba 100644 2.18.4 -From 019580d4b7b13df975f7f36a9b3f8a836d7b0a53 Mon Sep 17 00:00:00 2001 +From 7b437e03db09e1b7591cd252940a339cdd8a77c6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 29 Oct 2018 14:45:45 +0000 -Subject: [PATCH 002/580] Revert "rtc: pcf8523: properly handle oscillator stop +Subject: [PATCH 002/661] Revert "rtc: pcf8523: properly handle oscillator stop bit" This reverts commit ede44c908d44b166a5b6bd7caacd105c2ff5a70f. @@ -171,10 +171,10 @@ index 57d351dfe272..0aa1e8f9ee75 100644 2.18.4 -From 4ea4ad25e1bc1a11c20df944438ecb9048f5e18c Mon Sep 17 00:00:00 2001 +From 58c9965d7406a8035a71d08e4ac5fd24265ac9ab Mon Sep 17 00:00:00 2001 From: popcornmix Date: Fri, 15 Mar 2019 21:11:10 +0000 -Subject: [PATCH 003/580] Revert "staging: bcm2835-audio: Drop DT dependency" +Subject: [PATCH 003/661] Revert "staging: bcm2835-audio: Drop DT dependency" This reverts commit b7491a9fca2dc2535b9dc922550a37c5baae9d3d. --- @@ -273,10 +273,10 @@ index c250fbef2fa3..b42917c25050 100644 2.18.4 -From 6d7b21512230660d434335039321e7f054453ecc Mon Sep 17 00:00:00 2001 +From c8eaf9019028945b0eadfa7307329c5471a79666 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 20 Apr 2020 13:41:10 +0100 -Subject: [PATCH 004/580] Revert "spi: spidev: Fix CS polarity if GPIO +Subject: [PATCH 004/661] Revert "spi: spidev: Fix CS polarity if GPIO descriptors are used" This reverts commit 83b2a8fe43bda0c11981ad6afa5dd0104d78be28. @@ -311,10 +311,10 @@ index 859910ec8d9f..225577709c03 100644 2.18.4 -From 6935e82812dea247d0bcf914f4367b31958f4fd8 Mon Sep 17 00:00:00 2001 +From e17f64d33f584b592ccfad7ba1db0acceec81612 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 3 Nov 2020 11:49:53 +0000 -Subject: [PATCH 005/580] Revert "mailbox: avoid timer start from callback" +Subject: [PATCH 005/661] Revert "mailbox: avoid timer start from callback" This reverts commit c7dacf5b0f32957b24ef29df1207dc2cd8307743. @@ -375,10 +375,10 @@ index 3e7d4b20ab34..0b821a5b2db8 100644 2.18.4 -From ae72f72a895399f81ee0dc084ad80e7654fcc14c Mon Sep 17 00:00:00 2001 +From 5d15dacd850e0d8220c4349253072a77f4b961ef Mon Sep 17 00:00:00 2001 From: Steve Glendinning Date: Thu, 19 Feb 2015 18:47:12 +0000 -Subject: [PATCH 006/580] smsx95xx: fix crimes against truesize +Subject: [PATCH 006/661] smsx95xx: fix crimes against truesize smsc95xx is adjusting truesize when it shouldn't, and following a recent patch from Eric this is now triggering warnings. @@ -428,10 +428,10 @@ index ea0d5f04dc3a..a7591ceca30f 100644 2.18.4 -From 33ee9fb06c15c705ad43c67e280e14b047775f40 Mon Sep 17 00:00:00 2001 +From 2426bdac66f4dc1924a6c191eeb0262a45b7dd15 Mon Sep 17 00:00:00 2001 From: Sam Nazarko Date: Fri, 1 Apr 2016 17:27:21 +0100 -Subject: [PATCH 007/580] smsc95xx: Experimental: Enable turbo_mode and +Subject: [PATCH 007/661] smsc95xx: Experimental: Enable turbo_mode and packetsize=2560 by default See: http://forum.kodi.tv/showthread.php?tid=285288 @@ -477,10 +477,10 @@ index a7591ceca30f..d16620941d76 100644 2.18.4 -From ab9884058776f20f471c068d499f32ee06144fd5 Mon Sep 17 00:00:00 2001 +From f93f9d880a36c913e099e5779df7eefdf5078986 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 26 Mar 2013 17:26:38 +0000 -Subject: [PATCH 008/580] Allow mac address to be set in smsc95xx +Subject: [PATCH 008/661] Allow mac address to be set in smsc95xx Signed-off-by: popcornmix --- @@ -579,10 +579,10 @@ index d16620941d76..09d4c1963b2c 100644 2.18.4 -From 3119eb5df2e2c9d179e9388c73d73c2e189d0aa5 Mon Sep 17 00:00:00 2001 +From 50a5fc955768f1513e33e11d710789da96fc0a63 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 13 Mar 2015 12:43:36 +0000 -Subject: [PATCH 009/580] Protect __release_resource against resources without +Subject: [PATCH 009/661] Protect __release_resource against resources without parents Without this patch, removing a device tree overlay can crash here. @@ -613,10 +613,10 @@ index 3ae2f56cc79d..2f1a85c23e8b 100644 2.18.4 -From cc14ca3a6db5a05ff0a98682feed02f9e3a5c21e Mon Sep 17 00:00:00 2001 +From c84d7b934972bd8131dfc4c3c5be3eeb6dd725fb Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 9 Feb 2017 14:33:30 +0000 -Subject: [PATCH 010/580] irq-bcm2836: Avoid "Invalid trigger warning" +Subject: [PATCH 010/661] irq-bcm2836: Avoid "Invalid trigger warning" Initialise the level for each IRQ to avoid a warning from the arm arch timer code. @@ -643,10 +643,10 @@ index cbc7c740e4dc..f4247c257581 100644 2.18.4 -From 7d2319b3611c884fe2ec8ea9126d6e8ffc7a405b Mon Sep 17 00:00:00 2001 +From 5c7e0bb6d34dd5b2106be9bde0259003aa4184cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 12 Jun 2015 19:01:05 +0200 -Subject: [PATCH 011/580] irqchip: bcm2835: Add FIQ support +Subject: [PATCH 011/661] irqchip: bcm2835: Add FIQ support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -778,10 +778,10 @@ index a1e004af23e7..50a03f8c9c57 100644 2.18.4 -From 8f59949c826fdcacd430905dfcdeac09eaa20849 Mon Sep 17 00:00:00 2001 +From b18418489ead08a427f8d896ae9502c3fe16b490 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 23 Oct 2015 16:26:55 +0200 -Subject: [PATCH 012/580] irqchip: irq-bcm2835: Add 2836 FIQ support +Subject: [PATCH 012/661] irqchip: irq-bcm2835: Add 2836 FIQ support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -883,10 +883,10 @@ index 50a03f8c9c57..b3219aa763a6 100644 2.18.4 -From 406e85e6a7eecc6d158af13352d95ffc1a05b84e Mon Sep 17 00:00:00 2001 +From 9b30ab661010002bfa11073e0be886b1a14285ea Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 14 Jul 2015 10:26:09 +0100 -Subject: [PATCH 013/580] spi: spidev: Completely disable the spidev warning +Subject: [PATCH 013/661] spi: spidev: Completely disable the spidev warning An alternative strategy would be to use "rpi,spidev" instead, but that would require many Raspberry Pi Device Tree changes. @@ -913,10 +913,10 @@ index 225577709c03..a262479f0a92 100644 2.18.4 -From 66151711d5f3229812ad0bb99d39ef96a898ae5a Mon Sep 17 00:00:00 2001 +From 4e5f446c9b9ce542cd457c93b9ce15f379bba3aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Sat, 3 Oct 2015 22:22:55 +0200 -Subject: [PATCH 014/580] dmaengine: bcm2835: Load driver early and support +Subject: [PATCH 014/661] dmaengine: bcm2835: Load driver early and support legacy API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -1022,10 +1022,10 @@ index 630dfbb01a40..bf7ba96a39f9 100644 2.18.4 -From 67b4cefe6c31fb65460f92b84715ff3d37c25c07 Mon Sep 17 00:00:00 2001 +From f171a612eba6bb998beab40d275683991fc569c7 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 25 Jan 2016 17:25:12 +0000 -Subject: [PATCH 015/580] firmware: Updated mailbox header +Subject: [PATCH 015/661] firmware: Updated mailbox header --- include/soc/bcm2835/raspberrypi-firmware.h | 3 +++ @@ -1055,10 +1055,10 @@ index cc9cdbc66403..212cceffcc5c 100644 2.18.4 -From 1edacd81bb184e011017ad73f35d715418569daf Mon Sep 17 00:00:00 2001 +From 256a7220aa57acfcb2cf6c9a303e14e76489541d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 15 Jun 2016 16:48:41 +0100 -Subject: [PATCH 016/580] rtc: Add SPI alias for pcf2123 driver +Subject: [PATCH 016/661] rtc: Add SPI alias for pcf2123 driver Without this alias, Device Tree won't cause the driver to be loaded. @@ -1081,10 +1081,10 @@ index c3691fa4210e..ead1fd376d2d 100644 2.18.4 -From 5b703c62726770e18f885289d64f1c1b7a578473 Mon Sep 17 00:00:00 2001 +From cd110cfebb665580114872c37a1a1105cf2af1f4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 7 Oct 2016 16:50:59 +0200 -Subject: [PATCH 017/580] watchdog: bcm2835: Support setting reboot partition +Subject: [PATCH 017/661] watchdog: bcm2835: Support setting reboot partition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -1189,10 +1189,10 @@ index dec6ca019bea..62937e6f83ca 100644 2.18.4 -From c35af440912a048b9aec5395ba8a0f1aaec26769 Mon Sep 17 00:00:00 2001 +From 108c7397eab1d9c50c261e543af007cc032d854f Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 5 Apr 2016 19:40:12 +0100 -Subject: [PATCH 018/580] reboot: Use power off rather than busy spinning when +Subject: [PATCH 018/661] reboot: Use power off rather than busy spinning when halt is requested --- @@ -1218,10 +1218,10 @@ index 0ce388f15422..63373adab475 100644 2.18.4 -From de6dc2c2a64ed14f4b80012c58499c0ec410a4fe Mon Sep 17 00:00:00 2001 +From f50dd7efd7210aeee747c69ce89e17bc592d5d60 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 9 Nov 2016 13:02:52 +0000 -Subject: [PATCH 019/580] bcm: Make RASPBERRYPI_POWER depend on PM +Subject: [PATCH 019/661] bcm: Make RASPBERRYPI_POWER depend on PM --- drivers/soc/bcm/Kconfig | 1 + @@ -1243,10 +1243,10 @@ index 24f92a6e882a..a6a705ec30c7 100644 2.18.4 -From d710dfa138e164b96663002dfb5b3a1bb037c2fb Mon Sep 17 00:00:00 2001 +From 8e3b337df359e1439c5935904d897ab91e417056 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Fri, 2 Sep 2016 16:45:27 +0100 -Subject: [PATCH 020/580] Register the clocks early during the boot process, so +Subject: [PATCH 020/661] Register the clocks early during the boot process, so that special/critical clocks can get enabled early on in the boot process avoiding the risk of disabling a clock, pll_divider or pll when a claiming driver fails to install propperly - maybe it needs to defer. @@ -1294,10 +1294,10 @@ index 1ac803e14fa3..2482458795c2 100644 2.18.4 -From c5aaa773c9968e16b835a59a61ee157c709c633f Mon Sep 17 00:00:00 2001 +From 5c3ce0bee18e801ad47ab5ff30545d1c799ca006 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 6 Dec 2016 17:05:39 +0000 -Subject: [PATCH 021/580] bcm2835-rng: Avoid initialising if already enabled +Subject: [PATCH 021/661] bcm2835-rng: Avoid initialising if already enabled Avoids the 0x40000 cycles of warmup again if firmware has already used it --- @@ -1325,10 +1325,10 @@ index 1a7c43b43c6b..ee47667d0710 100644 2.18.4 -From 98cd27396e6c52399dad456b50e62174520f8027 Mon Sep 17 00:00:00 2001 +From b488c8bdfa75e1abda8a30fe63fec01fb9bf2655 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 13 Feb 2017 17:20:08 +0000 -Subject: [PATCH 022/580] clk-bcm2835: Mark used PLLs and dividers CRITICAL +Subject: [PATCH 022/661] clk-bcm2835: Mark used PLLs and dividers CRITICAL The VPU configures and relies on several PLLs and dividers. Mark all enabled dividers and their PLLs as CRITICAL to prevent the kernel from @@ -1359,10 +1359,10 @@ index 2482458795c2..0f716cb070a7 100644 2.18.4 -From d4a44ed3561958797e9f40fdd9cc439c9d328302 Mon Sep 17 00:00:00 2001 +From 49c159236afb951abe488b3e813be6d14622324d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 13 Feb 2017 17:20:08 +0000 -Subject: [PATCH 023/580] clk-bcm2835: Add claim-clocks property +Subject: [PATCH 023/661] clk-bcm2835: Add claim-clocks property The claim-clocks property can be used to prevent PLLs and dividers from being marked as critical. It contains a vector of clock IDs, @@ -1485,10 +1485,10 @@ index 0f716cb070a7..50f018fbb562 100644 2.18.4 -From fbdff9ba62705f530611f8c9a7034ac0630cb7bb Mon Sep 17 00:00:00 2001 +From 5f5e451bffd8162b907fd80f788bb567872ff45d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 6 Mar 2017 09:06:18 +0000 -Subject: [PATCH 024/580] clk-bcm2835: Read max core clock from firmware +Subject: [PATCH 024/661] clk-bcm2835: Read max core clock from firmware The VPU is responsible for managing the core clock, usually under direction from the bcm2835-cpufreq driver but not via the clk-bcm2835 @@ -1606,10 +1606,10 @@ index 50f018fbb562..f1ef788c1194 100644 2.18.4 -From 9b644928209c94a184f48028100d26718d3caca0 Mon Sep 17 00:00:00 2001 +From b67e3fa54a64f568fd0b7a78e1cdcc3dc8ed12c2 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 9 Feb 2017 14:36:44 +0000 -Subject: [PATCH 025/580] sound: Demote deferral errors to INFO level +Subject: [PATCH 025/661] sound: Demote deferral errors to INFO level At present there is no mechanism to specify driver load order, which can lead to deferrals and repeated retries until successful. @@ -1647,10 +1647,10 @@ index bf65cba232e6..a6c553de5e72 100644 2.18.4 -From 3d2bf12175b4e4738df4ec269d36929fce9106f6 Mon Sep 17 00:00:00 2001 +From 90f7e340743bb856ee4047b81409c0699234a234 Mon Sep 17 00:00:00 2001 From: Claggy3 Date: Sat, 11 Feb 2017 14:00:30 +0000 -Subject: [PATCH 026/580] Update vfpmodule.c +Subject: [PATCH 026/661] Update vfpmodule.c Christopher Alexander Tobias Schulze - May 2, 2015, 11:57 a.m. This patch fixes a problem with VFP state save and restore related @@ -1790,10 +1790,10 @@ index 2cb355c1b5b7..1e2dcf81aefa 100644 2.18.4 -From b7fc2f912c9bdb401efddf02ddd295e9d71d65ec Mon Sep 17 00:00:00 2001 +From 7aaa5b0f57dadd34bec1f85e5315e71d0e9984bf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Tue, 1 Nov 2016 15:15:41 +0100 -Subject: [PATCH 027/580] i2c: bcm2835: Add debug support +Subject: [PATCH 027/661] i2c: bcm2835: Add debug support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -1985,10 +1985,10 @@ index 37443edbf754..18b2e9e3d752 100644 2.18.4 -From 515485088de1027897700a2b3dad710ee4d33be0 Mon Sep 17 00:00:00 2001 +From 2fd90c156486328abecdd6be58a7b22b37d3e8d2 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 18 Dec 2014 16:07:15 -0800 -Subject: [PATCH 028/580] mm: Remove the PFN busy warning +Subject: [PATCH 028/661] mm: Remove the PFN busy warning See commit dae803e165a11bc88ca8dbc07a11077caf97bbcb -- the warning is expected sometimes when using CMA. However, that commit still spams @@ -2016,10 +2016,10 @@ index 7ffa706e5c30..72014a592036 100644 2.18.4 -From 40afe668ddf6d78be858cb7e994204f4b6fd1060 Mon Sep 17 00:00:00 2001 +From ae3aea0c474ee84e00316f1e189ee8d38f89463e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 23 Jan 2018 16:52:45 +0000 -Subject: [PATCH 029/580] irqchip: irq-bcm2836: Remove regmap and syscon use +Subject: [PATCH 029/661] irqchip: irq-bcm2836: Remove regmap and syscon use The syscon node defines a register range that duplicates that used by the local_intc node on bcm2836/7. Since irq-bcm2835 and irq-bcm2836 are @@ -2136,10 +2136,10 @@ index f4247c257581..2187672e5be3 100644 2.18.4 -From 1a8ccaf8921706f5767eaf19dc62a624a04e51d7 Mon Sep 17 00:00:00 2001 +From 9d0a2d50172710fa4f5befcceaea8152fca2bd70 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 17 Oct 2017 15:04:29 +0100 -Subject: [PATCH 030/580] lan78xx: Enable LEDs and auto-negotiation +Subject: [PATCH 030/661] lan78xx: Enable LEDs and auto-negotiation For applications of the LAN78xx that don't have valid programmed EEPROMs or OTPs, enabling both LEDs and auto-negotiation by default @@ -2190,10 +2190,10 @@ index 65b315bc60ab..306bf917d4ed 100644 2.18.4 -From 7175daf6d472a48870f5e547e51ad48b9da602c0 Mon Sep 17 00:00:00 2001 +From 96cd7f2210babb1c00e4ac7f3b7e35af420179f2 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 23 Feb 2016 17:26:48 +0000 -Subject: [PATCH 031/580] amba_pl011: Don't use DT aliases for numbering +Subject: [PATCH 031/661] amba_pl011: Don't use DT aliases for numbering The pl011 driver looks for DT aliases of the form "serial", and if found uses as the device ID. This can cause @@ -2225,10 +2225,10 @@ index 87dc3fc15694..fe48193de094 100644 2.18.4 -From e310e6b4862114a7cae4085f49be9ae23cd602f8 Mon Sep 17 00:00:00 2001 +From 8b7d1ec6558a018e77663c4873ab328ce23bf256 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 1 Mar 2017 16:07:39 +0000 -Subject: [PATCH 032/580] amba_pl011: Round input clock up +Subject: [PATCH 032/661] amba_pl011: Round input clock up The UART clock is initialised to be as close to the requested frequency as possible without exceeding it. Now that there is a @@ -2317,10 +2317,10 @@ index fe48193de094..339ecce1ad0d 100644 2.18.4 -From 2730324f694df21abaaf5507ee459c30cb25080a Mon Sep 17 00:00:00 2001 +From a496e2b095c24115416540b6f3f6bde34c44b373 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 29 Sep 2017 10:32:19 +0100 -Subject: [PATCH 033/580] amba_pl011: Insert mb() for correct FIFO handling +Subject: [PATCH 033/661] amba_pl011: Insert mb() for correct FIFO handling The pl011 register accessor functions use the _relaxed versions of the standard readl() and writel() functions, meaning that there are no @@ -2350,10 +2350,10 @@ index 339ecce1ad0d..afb0175bf592 100644 2.18.4 -From 0852e7ba7e977b65482417ba7fee19ca7fb02478 Mon Sep 17 00:00:00 2001 +From 8cbc03c2e19ed15c029cf67bc536ece5a013b819 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 29 Sep 2017 10:32:19 +0100 -Subject: [PATCH 034/580] amba_pl011: Add cts-event-workaround DT property +Subject: [PATCH 034/661] amba_pl011: Add cts-event-workaround DT property The BCM2835 PL011 implementation seems to have a bug that can lead to a transmission lockup if CTS changes frequently. A workaround was added to @@ -2408,10 +2408,10 @@ index afb0175bf592..17ef9c2a4d72 100644 2.18.4 -From 1b12097059405bd0b912ac8117f021e59fc3b4c6 Mon Sep 17 00:00:00 2001 +From ee50da3c469ae04c4c47b892b79d6aa0bced5f9a Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 11 Jul 2019 13:13:39 +0100 -Subject: [PATCH 035/580] tty: amba-pl011: Make TX optimisation conditional +Subject: [PATCH 035/661] tty: amba-pl011: Make TX optimisation conditional pl011_tx_chars takes a "from_irq" parameter to reduce the number of register accesses. When from_irq is true the function assumes that the @@ -2499,10 +2499,10 @@ index 17ef9c2a4d72..8b1f8167c85d 100644 2.18.4 -From 02bf3168073aaba75dc1c0d46a4dc2d3feb55f83 Mon Sep 17 00:00:00 2001 +From b78c1b2bde1ba984803fa209f49d8f44dd44db1d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 24 Jan 2020 11:38:28 +0000 -Subject: [PATCH 036/580] tty: amba-pl011: Add un/throttle support +Subject: [PATCH 036/661] tty: amba-pl011: Add un/throttle support The PL011 driver lacks throttle and unthrottle methods. As a result, sending more data to the Pi than it can immediately sink while CRTSCTS @@ -2566,10 +2566,10 @@ index 8b1f8167c85d..9df9bc8f9dfd 100644 2.18.4 -From b4ceb76d7c6d22327b49945af2cf48bf1f7654af Mon Sep 17 00:00:00 2001 +From e9f16bea03537ef0aaa0f8fb3b10fe126f828bba Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 29 Jan 2020 09:35:19 +0000 -Subject: [PATCH 037/580] tty: amba-pl011: Avoid rare write-when-full error +Subject: [PATCH 037/661] tty: amba-pl011: Avoid rare write-when-full error Under some circumstances on BCM283x processors data loss can be observed - a single byte missing from the TX output stream. These bytes @@ -2614,10 +2614,10 @@ index 9df9bc8f9dfd..760301512509 100644 2.18.4 -From 9f1f42b3e92d16b53e2aee250fc735c1f7623b7c Mon Sep 17 00:00:00 2001 +From f1f54b650da2c95b858449ba4a224e230ddafd54 Mon Sep 17 00:00:00 2001 From: notro Date: Thu, 10 Jul 2014 13:59:47 +0200 -Subject: [PATCH 038/580] pinctrl-bcm2835: Set base to 0 give expected gpio +Subject: [PATCH 038/661] pinctrl-bcm2835: Set base to 0 give expected gpio numbering Signed-off-by: Noralf Tronnes @@ -2642,10 +2642,10 @@ index 1d21129f7751..bbf761c41dc5 100644 2.18.4 -From 5db45f14288772192f5589a7c18785fcc4c6a37f Mon Sep 17 00:00:00 2001 +From e8a22fbd175db884e42d1eacec605e750dc6bc1e Mon Sep 17 00:00:00 2001 From: popcornmix Date: Sun, 12 May 2013 12:24:19 +0100 -Subject: [PATCH 039/580] Main bcm2708/bcm2709 linux port +Subject: [PATCH 039/661] Main bcm2708/bcm2709 linux port MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -2804,10 +2804,10 @@ index 39761d190545..9766d8b50778 100644 2.18.4 -From e33de37032f4cf764569559731c6f816ead80cb3 Mon Sep 17 00:00:00 2001 +From bbe7955a5d1d2d51ad6c16f1e36caf100d35e0d6 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 1 May 2013 19:46:17 +0100 -Subject: [PATCH 040/580] Add dwc_otg driver +Subject: [PATCH 040/661] Add dwc_otg driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -64627,10 +64627,10 @@ index 000000000000..cdc9963176e5 2.18.4 -From a054a38d02521a256dfc12dcb5dea59d80a82d20 Mon Sep 17 00:00:00 2001 +From 2bdf626f24c19d1dc59cc477e27e3d843e21052c Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 17 Jun 2015 17:06:34 +0100 -Subject: [PATCH 041/580] bcm2708 framebuffer driver +Subject: [PATCH 041/661] bcm2708 framebuffer driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -68201,10 +68201,10 @@ index 212cceffcc5c..2f5509d53fc3 100644 2.18.4 -From 5ff3614d6866b43e4516f1fa81f2dda3364debd4 Mon Sep 17 00:00:00 2001 +From 309383af22fd7113227534d387060390b665ae42 Mon Sep 17 00:00:00 2001 From: James Hughes Date: Thu, 14 Mar 2019 13:27:54 +0000 -Subject: [PATCH 042/580] Pulled in the multi frame buffer support from the Pi3 +Subject: [PATCH 042/661] Pulled in the multi frame buffer support from the Pi3 repo --- @@ -69036,10 +69036,10 @@ index 2f5509d53fc3..16253b6875c9 100644 2.18.4 -From e4ee80fbc52f3d6df47e37e8cf310f842af28f5f Mon Sep 17 00:00:00 2001 +From e1b9459595a1ab195d4f5499a0ea4eacce61ff1a Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Mon, 17 Jun 2013 13:32:11 +0300 -Subject: [PATCH 043/580] fbdev: add FBIOCOPYAREA ioctl +Subject: [PATCH 043/661] fbdev: add FBIOCOPYAREA ioctl Based on the patch authored by Ali Gholami Rudi at https://lkml.org/lkml/2009/7/13/153 @@ -69383,10 +69383,10 @@ index 4c14e8be7267..3c6f12b76214 100644 2.18.4 -From c078f59f2bc2cf14243bc5685f0b9d1dcf147367 Mon Sep 17 00:00:00 2001 +From 8b06a53b6d2acf11bda6cb5fcc27b8301cec1a1b Mon Sep 17 00:00:00 2001 From: Harm Hanemaaijer Date: Thu, 20 Jun 2013 20:21:39 +0200 -Subject: [PATCH 044/580] Speed up console framebuffer imageblit function +Subject: [PATCH 044/661] Speed up console framebuffer imageblit function Especially on platforms with a slower CPU but a relatively high framebuffer fill bandwidth, like current ARM devices, the existing @@ -69598,10 +69598,10 @@ index a2bb276a8b24..436494fba15a 100644 2.18.4 -From bd8f5afb3d40e1d52d4ffc75c4d0e7751e573e20 Mon Sep 17 00:00:00 2001 +From ad2b13be43a5d85342428f30f3c27b412a8a3f63 Mon Sep 17 00:00:00 2001 From: Florian Meier Date: Fri, 22 Nov 2013 14:22:53 +0100 -Subject: [PATCH 045/580] dmaengine: Add support for BCM2708 +Subject: [PATCH 045/661] dmaengine: Add support for BCM2708 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -70252,10 +70252,10 @@ index 000000000000..6ca874d332a8 2.18.4 -From 683c6bba8ad02b2779a159918e7fa3e71a20bdcc Mon Sep 17 00:00:00 2001 +From 441f1efa8f530d76296210c643627613a08ebfcd Mon Sep 17 00:00:00 2001 From: gellert Date: Fri, 15 Aug 2014 16:35:06 +0100 -Subject: [PATCH 046/580] MMC: added alternative MMC driver +Subject: [PATCH 046/661] MMC: added alternative MMC driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -72204,10 +72204,10 @@ index 42df06c6b19c..e7f45a2b0c72 100644 2.18.4 -From d18b73711fdf140856aa5dd1c5535f81fc5a866a Mon Sep 17 00:00:00 2001 +From 53bc279720c62d220b91fe92fce1c70d32212ce6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 25 Mar 2015 17:49:47 +0000 -Subject: [PATCH 047/580] Adding bcm2835-sdhost driver, and an overlay to +Subject: [PATCH 047/661] Adding bcm2835-sdhost driver, and an overlay to enable it BCM2835 has two SD card interfaces. This driver uses the other one. @@ -74696,10 +74696,10 @@ index 000000000000..7caba5e12f79 2.18.4 -From 09041b8ae8e62d9263a7f2ddd2200cbab8755113 Mon Sep 17 00:00:00 2001 +From 5a4785388cb9c3452b85b58a2bfc6e3bcca6ef02 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Fri, 28 Oct 2016 15:36:43 +0100 -Subject: [PATCH 048/580] vc_mem: Add vc_mem driver for querying firmware +Subject: [PATCH 048/661] vc_mem: Add vc_mem driver for querying firmware memory addresses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -75200,10 +75200,10 @@ index 000000000000..3c7079237496 2.18.4 -From ac9cb9505726b04b8cff351a2f525492a8b45f44 Mon Sep 17 00:00:00 2001 +From 5b0b8049238066ebeb3521ce32ce4ec5f632ecdd Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Fri, 21 Aug 2015 23:14:48 +0100 -Subject: [PATCH 049/580] Add /dev/gpiomem device for rootless user GPIO access +Subject: [PATCH 049/661] Add /dev/gpiomem device for rootless user GPIO access Signed-off-by: Luke Wren @@ -75510,10 +75510,10 @@ index 000000000000..f5e7f1ba8fb6 2.18.4 -From ff04c9b23e6bf7df3a8dc52886a3e6ae9b724ba6 Mon Sep 17 00:00:00 2001 +From af0aa51a4c02c97c1a3262a23e39fc64838c5200 Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Sat, 5 Sep 2015 01:14:45 +0100 -Subject: [PATCH 050/580] Add SMI driver +Subject: [PATCH 050/661] Add SMI driver Signed-off-by: Luke Wren @@ -77447,10 +77447,10 @@ index 000000000000..ee3a75edfc03 2.18.4 -From 4f2d23d33dcc500f596ecb0624974da0ae62a744 Mon Sep 17 00:00:00 2001 +From bf67646a4f62be24e0ba9c8ef9961660dbd7f2a3 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 17 Jun 2015 15:44:08 +0100 -Subject: [PATCH 051/580] Add Chris Boot's i2c driver +Subject: [PATCH 051/661] Add Chris Boot's i2c driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -78118,10 +78118,10 @@ index 000000000000..962f2e5c7455 2.18.4 -From 915140bcc88049f7d9f581be0eab929629c6ca06 Mon Sep 17 00:00:00 2001 +From e019c5221c04ffe3fa7868c0a11c1718f4c9b4f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 26 Jun 2015 14:27:06 +0200 -Subject: [PATCH 052/580] char: broadcom: Add vcio module +Subject: [PATCH 052/661] char: broadcom: Add vcio module MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -78383,10 +78383,10 @@ index 000000000000..d2598663a2b5 2.18.4 -From cd60378b63c58a8a19e62de2cf5df78a4eb0ba1f Mon Sep 17 00:00:00 2001 +From 6654ddf3a27982d4950a92a4342a6c3c80b70cb9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 26 Jun 2015 14:25:01 +0200 -Subject: [PATCH 053/580] firmware: bcm2835: Support ARCH_BCM270x +Subject: [PATCH 053/661] firmware: bcm2835: Support ARCH_BCM270x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -78472,10 +78472,10 @@ index 2371d08bdd17..5fec4accb24f 100644 2.18.4 -From 5a7aa204bdc386c237c8837650b57399459c4d03 Mon Sep 17 00:00:00 2001 +From 3a7295f474d8719ac123e8afbb6bc54abf73451b Mon Sep 17 00:00:00 2001 From: notro Date: Wed, 9 Jul 2014 14:46:08 +0200 -Subject: [PATCH 054/580] BCM2708: Add core Device Tree support +Subject: [PATCH 054/661] BCM2708: Add core Device Tree support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -104958,10 +104958,10 @@ index 94133708889d..9c0df5bde46c 100644 2.18.4 -From 4c6a3538653f02017943ace0c87423c49d7f091a Mon Sep 17 00:00:00 2001 +From bab1bb2ac8d5e03057702f37b09a715e6e9b6e0d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 6 Feb 2015 13:50:57 +0000 -Subject: [PATCH 055/580] BCM270x_DT: Add pwr_led, and the required "input" +Subject: [PATCH 055/661] BCM270x_DT: Add pwr_led, and the required "input" trigger The "input" trigger makes the associated GPIO an input. This is to support @@ -105142,10 +105142,10 @@ index 6a8d6409c993..aefab0783075 100644 2.18.4 -From 004a02b55e7fbc01ee6a53e994212c9d7410fb61 Mon Sep 17 00:00:00 2001 +From 4bc52b7807cbd42ff35955a5222f2a070121aec7 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 3 Jul 2013 00:54:08 +0100 -Subject: [PATCH 056/580] Added Device IDs for August DVB-T 205 +Subject: [PATCH 056/661] Added Device IDs for August DVB-T 205 --- drivers/media/usb/dvb-usb-v2/rtl28xxu.c | 4 ++++ @@ -105170,10 +105170,10 @@ index 91460e4d0c30..637cf99d81ed 100644 2.18.4 -From 41aafc017017128c4890c97e3d9d5fc915858c1d Mon Sep 17 00:00:00 2001 +From 7f725929ff594dd69d454225d57ff2d167ac2629 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 28 Nov 2016 16:50:04 +0000 -Subject: [PATCH 057/580] Improve __copy_to_user and __copy_from_user +Subject: [PATCH 057/661] Improve __copy_to_user and __copy_from_user performance Provide a __copy_from_user that uses memcpy. On BCM2708, use @@ -106793,10 +106793,10 @@ index 084734d3da5c..6af65533dbea 100644 2.18.4 -From 3c5e14e35cb96701f475134b58753253eceea30a Mon Sep 17 00:00:00 2001 +From 2ecd8e2341da03b4d426814cae01fa00f45ed20c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 25 Jun 2015 12:16:11 +0100 -Subject: [PATCH 058/580] gpio-poweroff: Allow it to work on Raspberry Pi +Subject: [PATCH 058/661] gpio-poweroff: Allow it to work on Raspberry Pi The Raspberry Pi firmware manages the power-down and reboot process. To do this it installs a pm_power_off handler, causing @@ -106834,10 +106834,10 @@ index c5067eb75370..e458fa7b8848 100644 2.18.4 -From 1b376284a66bff9078c8047510079d6ef25f3483 Mon Sep 17 00:00:00 2001 +From dd21a9001810a48720f490b70e051ba5d90515af Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 14 Jul 2015 14:32:47 +0100 -Subject: [PATCH 059/580] mfd: Add Raspberry Pi Sense HAT core driver +Subject: [PATCH 059/661] mfd: Add Raspberry Pi Sense HAT core driver mfd: Add rpi_sense_core of compatible string --- @@ -107720,10 +107720,10 @@ index 000000000000..56196dc2af10 2.18.4 -From 76584df79cecc31fd807f7bcc71350c96ae1ba80 Mon Sep 17 00:00:00 2001 +From 9886136bcf805fbcbecfccdee7d4e4cc5021704d Mon Sep 17 00:00:00 2001 From: Florian Meier Date: Mon, 25 Jan 2016 15:48:59 +0000 -Subject: [PATCH 060/580] Add support for all the downstream rpi sound card +Subject: [PATCH 060/661] Add support for all the downstream rpi sound card drivers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -122966,10 +122966,10 @@ index a6c553de5e72..3e9b1fb29826 100644 2.18.4 -From bd9ccc85defaeb07eb49e2a1be3a3b26f5da3972 Mon Sep 17 00:00:00 2001 +From c244682d48b6b66322785cfbbdbe6d46b2b8585d Mon Sep 17 00:00:00 2001 From: Joerg Schambacher Date: Fri, 16 Oct 2020 15:17:07 +0200 -Subject: [PATCH 061/580] Fixes a problem when module probes before i2c module +Subject: [PATCH 061/661] Fixes a problem when module probes before i2c module is available The driver crashed while a NULL pointer returned by i2c_get_adapter() @@ -123018,10 +123018,10 @@ index a6d078bc4a9a..157ab4c2cc85 100644 2.18.4 -From 008f75f6569f22675b2f19a7d72e24d41d34b179 Mon Sep 17 00:00:00 2001 +From d062ad29dde982efcd1ede34f10dc06fd2a896db Mon Sep 17 00:00:00 2001 From: P33M Date: Wed, 21 Oct 2015 14:55:21 +0100 -Subject: [PATCH 062/580] rpi_display: add backlight driver and overlay +Subject: [PATCH 062/661] rpi_display: add backlight driver and overlay Add a mailbox-driven backlight controller for the Raspberry Pi DSI touchscreen display. Requires updated GPU firmware to recognise the @@ -123201,10 +123201,10 @@ index 000000000000..14a0d9b03739 2.18.4 -From 4152c98eaaca69d058cfc72044cf6ab8b60ec828 Mon Sep 17 00:00:00 2001 +From 2f0ea67b20bc513e43ca7dafc93517b967da13de Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 23 Feb 2016 19:56:04 +0000 -Subject: [PATCH 063/580] bcm2835-virtgpio: Virtual GPIO driver +Subject: [PATCH 063/661] bcm2835-virtgpio: Virtual GPIO driver Add a virtual GPIO driver that uses the firmware mailbox interface to request that the VPU toggles LEDs. @@ -123468,10 +123468,10 @@ index 000000000000..49e28ad9760e 2.18.4 -From 28ed6cfb34d9dad2b2d69eab306ec3014252e6f1 Mon Sep 17 00:00:00 2001 +From b633d58ea5a86bea892d74e689129ffb8c8d6093 Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Wed, 3 Dec 2014 13:23:28 +0200 -Subject: [PATCH 064/580] OF: DT-Overlay configfs interface +Subject: [PATCH 064/661] OF: DT-Overlay configfs interface This is a port of Pantelis Antoniou's v3 port that makes use of the new upstreamed configfs support for binary attributes. @@ -123909,10 +123909,10 @@ index 000000000000..178f0629b0f0 2.18.4 -From e149a40e21f023fb988cccc648033dfc2f75d40f Mon Sep 17 00:00:00 2001 +From dbe31d5adfb82743c4b00ed66a92645b4f8c7f01 Mon Sep 17 00:00:00 2001 From: Cheong2K Date: Fri, 26 Feb 2016 18:20:10 +0800 -Subject: [PATCH 065/580] brcm: adds support for BCM43341 wifi +Subject: [PATCH 065/661] brcm: adds support for BCM43341 wifi brcmfmac: Disable power management @@ -124060,10 +124060,10 @@ index 59c2b2b6027d..2b642886430d 100644 2.18.4 -From 590aafd299d9c30677890dd30676f89ade61c74e Mon Sep 17 00:00:00 2001 +From e816b5fc47f8e31f6c10227cff3b434deee19640 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 17 Dec 2015 13:37:07 +0000 -Subject: [PATCH 066/580] hci_h5: Don't send conf_req when ACTIVE +Subject: [PATCH 066/661] hci_h5: Don't send conf_req when ACTIVE Without this patch, a modem and kernel can continuously bombard each other with conf_req and conf_rsp messages, in a demented game of tag. @@ -124089,10 +124089,10 @@ index 996729e78105..6d179e455721 100644 2.18.4 -From c64858e29ab0d2ba81b287a8cc3c307ec1ccabcc Mon Sep 17 00:00:00 2001 +From bd9496e341ab54b312d09c3a6b146b48b7115c41 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 13 Apr 2015 17:16:29 +0100 -Subject: [PATCH 067/580] config: Add default configs +Subject: [PATCH 067/661] config: Add default configs --- arch/arm/configs/bcm2709_defconfig | 1473 +++++++++++++++++++++++++ @@ -131467,10 +131467,10 @@ index 000000000000..d542d2522076 2.18.4 -From 3063e09c0068b1bdb5f6079f68179247005cf3ad Mon Sep 17 00:00:00 2001 +From 73a97e8756319f5aad6b916904ce04a13d6400ab Mon Sep 17 00:00:00 2001 From: Michael Zoran Date: Sat, 14 Jan 2017 21:43:57 -0800 -Subject: [PATCH 068/580] ARM64: Round-Robin dispatch IRQs between CPUs. +Subject: [PATCH 068/661] ARM64: Round-Robin dispatch IRQs between CPUs. IRQ-CPU mapping is round robined on ARM64 to increase concurrency and allow multiple interrupts to be serviced @@ -131547,10 +131547,10 @@ index 2187672e5be3..0b2af88b69a0 100644 2.18.4 -From 4986c25425c712bf6ce6a0f36bd1c6823d65336e Mon Sep 17 00:00:00 2001 +From 0a36a2c055bca0765e01609abb932d791416f4e9 Mon Sep 17 00:00:00 2001 From: Michael Zoran Date: Sat, 11 Feb 2017 01:18:31 -0800 -Subject: [PATCH 069/580] ARM64: Force hardware emulation of deprecated +Subject: [PATCH 069/661] ARM64: Force hardware emulation of deprecated instructions. --- @@ -131581,10 +131581,10 @@ index 7364de008bab..a11467132346 100644 2.18.4 -From 3335aca5d05d791eb002ab8e1d577260d21b0e24 Mon Sep 17 00:00:00 2001 +From 7e5f8f168e2567d71ac11f0dd5ea9086c96ec401 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Fri, 25 Aug 2017 19:18:13 +0100 -Subject: [PATCH 070/580] cache: export clean and invalidate +Subject: [PATCH 070/661] cache: export clean and invalidate hack: cache: Fix linker error --- @@ -131642,10 +131642,10 @@ index dc8f152f3556..536df5db66e4 100644 2.18.4 -From 3975ca71b76827e0257627f8cf04585419fb3ca0 Mon Sep 17 00:00:00 2001 +From 370e537d9cf3d9b7c1d886ebe3a319dc35414100 Mon Sep 17 00:00:00 2001 From: James Hughes Date: Tue, 14 Nov 2017 15:13:15 +0000 -Subject: [PATCH 071/580] AXI performance monitor driver (#2222) +Subject: [PATCH 071/661] AXI performance monitor driver (#2222) Uses the debugfs I/F to provide access to the AXI bus performance monitors. @@ -132344,10 +132344,10 @@ index 000000000000..5ae2bdaa88b4 2.18.4 -From 7fc14aad4e6356d9f6b5a43a26596bd0a142e428 Mon Sep 17 00:00:00 2001 +From dd5e14a481ede7707c2f86cd5031d8fa0bf1ac9c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 27 Nov 2017 17:14:54 +0000 -Subject: [PATCH 072/580] cgroup: Disable cgroup "memory" by default +Subject: [PATCH 072/661] cgroup: Disable cgroup "memory" by default Some Raspberry Pis have limited RAM and most users won't use the cgroup memory support so it is disabled by default. Enable with: @@ -132420,10 +132420,10 @@ index 5d1fdf7c3ec6..ea5a1ea68dd8 100644 2.18.4 -From fff9a62ae7ea418dddb1401cffc2d3099f8c8e69 Mon Sep 17 00:00:00 2001 +From 9c706ad1e89960ca75cee4b46818b1d2720bca2b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Wed, 3 Jun 2015 12:26:13 +0200 -Subject: [PATCH 073/580] ARM: bcm2835: Set Serial number and Revision +Subject: [PATCH 073/661] ARM: bcm2835: Set Serial number and Revision MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -132489,10 +132489,10 @@ index bfc556f76720..73ec2427fbcf 100644 2.18.4 -From ca8889e43aea7bfd1703af3ecffd38d033ad76a3 Mon Sep 17 00:00:00 2001 +From cd1f6e89dbd07f5d1cd20f4147669c676333dc3e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 16 Jul 2018 14:40:13 +0100 -Subject: [PATCH 074/580] dwc-otg: FIQ: Fix "bad mode in data abort handler" +Subject: [PATCH 074/661] dwc-otg: FIQ: Fix "bad mode in data abort handler" Create a semi-static mapping for the USB registers early in the boot process, before additional kernel threads are started, so all threads @@ -132611,10 +132611,10 @@ index 73ec2427fbcf..9b6c921106b5 100644 2.18.4 -From ef1a58d5abbb2fa1ebadcf2f6878e735a84c07f1 Mon Sep 17 00:00:00 2001 +From 1ec1ee56de6a2d36a98f5e9d1ba55e9bee37a399 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 11 Dec 2017 09:18:32 +0000 -Subject: [PATCH 075/580] ARM: Activate FIQs to avoid __irq_startup warnings +Subject: [PATCH 075/661] ARM: Activate FIQs to avoid __irq_startup warnings There is a new test in __irq_startup that the IRQ is activated, which hasn't been the case for FIQs since they bypass some of the usual setup. @@ -132653,10 +132653,10 @@ index 98ca3e3fa847..c3fe7d3cf482 100644 2.18.4 -From 4330b9e408cfb399ef53d7b21778a53d0207f907 Mon Sep 17 00:00:00 2001 +From 5b8a49ef1feb91437bfc52c89b548149af610a54 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 14 Sep 2016 09:16:19 +0100 -Subject: [PATCH 076/580] raspberrypi-firmware: Export the general transaction +Subject: [PATCH 076/661] raspberrypi-firmware: Export the general transaction function. The vc4-firmware-kms module is going to be doing the MBOX FB call. @@ -132691,10 +132691,10 @@ index 5fec4accb24f..abb16e80a36c 100644 2.18.4 -From 0c3094bde49d3be37c17dfb6ba8dda9afaaf9cb8 Mon Sep 17 00:00:00 2001 +From 571e344697898ac89a419bff4bbdf4baf6366d50 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 20 Feb 2018 10:07:27 +0000 -Subject: [PATCH 077/580] i2c-gpio: Also set bus numbers from reg property +Subject: [PATCH 077/661] i2c-gpio: Also set bus numbers from reg property I2C busses can be assigned specific bus numbers using aliases in Device Tree - string properties where the name is the alias and the @@ -132732,10 +132732,10 @@ index a4a6825c8758..cfbcf3952ddc 100644 2.18.4 -From 42d3a263ded69edcd80810f58b2e02d67be24fe4 Mon Sep 17 00:00:00 2001 +From 500846b1ea454708d9adacfe654e2180bd552727 Mon Sep 17 00:00:00 2001 From: hdoverobinson Date: Tue, 13 Mar 2018 06:58:39 -0400 -Subject: [PATCH 078/580] added capture_clear option to pps-gpio via dtoverlay +Subject: [PATCH 078/661] added capture_clear option to pps-gpio via dtoverlay (#2433) --- @@ -132759,10 +132759,10 @@ index e0de1df2ede0..ee7d8f4e7f2e 100644 2.18.4 -From 36492aeba8ea2d7f9379b3ada18e60906110db66 Mon Sep 17 00:00:00 2001 +From 77b9bea2a08dab0341845cafdf2b2a8975e7b840 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 9 Mar 2018 12:01:00 +0000 -Subject: [PATCH 079/580] lan78xx: Read initial EEE status from DT +Subject: [PATCH 079/661] lan78xx: Read initial EEE status from DT Add two new DT properties: * microchip,eee-enabled - a boolean to enable EEE @@ -132805,10 +132805,10 @@ index 306bf917d4ed..8e234a7c84ef 100644 2.18.4 -From 104dfebb228aee8171d62036d86122250933d6bc Mon Sep 17 00:00:00 2001 +From 8438a2736d8633b1afd46420ec990cdd035e73e7 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 14 Jul 2014 22:02:09 +0100 -Subject: [PATCH 080/580] hid: Reduce default mouse polling interval to 60Hz +Subject: [PATCH 080/661] hid: Reduce default mouse polling interval to 60Hz Reduces overhead when using X --- @@ -132843,10 +132843,10 @@ index 17a29ee0ac6c..1134d543e5d6 100644 2.18.4 -From 7d7c7b09f787d4c25bc9dacdf72d18371be31e42 Mon Sep 17 00:00:00 2001 +From 573b317bc9d2be2f0a6d3abaa753f3295331ce3a Mon Sep 17 00:00:00 2001 From: Nick Bulleid Date: Thu, 10 May 2018 21:57:02 +0100 -Subject: [PATCH 081/580] Add ability to export gpio used by gpio-poweroff +Subject: [PATCH 081/661] Add ability to export gpio used by gpio-poweroff Signed-off-by: Nick Bulleid @@ -132908,10 +132908,10 @@ index e458fa7b8848..3acbe711b792 100644 2.18.4 -From d8d6331f8c2035c3c66b7d4a04e0d27ad0d42bc6 Mon Sep 17 00:00:00 2001 +From 191bfd593174a88c95cb36c53f244530453c662f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Sat, 12 May 2018 21:35:43 +0100 -Subject: [PATCH 082/580] firmware/raspberrypi: Notify firmware of a reboot +Subject: [PATCH 082/661] firmware/raspberrypi: Notify firmware of a reboot Register for reboot notifications, sending RPI_FIRMWARE_NOTIFY_REBOOT over the mailbox interface on reception. @@ -132998,10 +132998,10 @@ index abb16e80a36c..05a0ae2a8eb7 100644 2.18.4 -From e575c2e3a75447a60f551fdf3d44d5f02193dc37 Mon Sep 17 00:00:00 2001 +From 3d595dee36806cf3d8ab6571aecf993cdcd5745e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 14 Jun 2018 11:21:04 +0100 -Subject: [PATCH 083/580] irqchip: irq-bcm2835: Calc. FIQ_START at boot-time +Subject: [PATCH 083/661] irqchip: irq-bcm2835: Calc. FIQ_START at boot-time ad83c7cb2f37 ("irqchip/irq-bcm2836: Add support for DT interrupt polarity") changed the way that the BCM2836/7 local interrupts are mapped; instead @@ -133070,10 +133070,10 @@ index 18b7483588c2..0e6c0811dc1e 100644 2.18.4 -From facfa3c6d9a925efbd50b2e4ab5c5ba69e3588c0 Mon Sep 17 00:00:00 2001 +From 54ab3313493667658946f271a11eda4f5e90f2fe Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 14 Jun 2018 15:07:26 +0100 -Subject: [PATCH 084/580] of: configfs: Use of_overlay_fdt_apply API call +Subject: [PATCH 084/661] of: configfs: Use of_overlay_fdt_apply API call The published API to the dynamic overlay application mechanism now takes a Flattened Device Tree blob as input so that it can manage the @@ -133190,10 +133190,10 @@ index 178f0629b0f0..ac04301dabe1 100644 2.18.4 -From 76cca44e11e076764993d249ca710777cbf9755d Mon Sep 17 00:00:00 2001 +From efec49e86b6f84f9e87765e9abe68fada39b9922 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 13 Jun 2018 15:21:10 +0100 -Subject: [PATCH 085/580] net: lan78xx: Disable TCP Segmentation Offload (TSO) +Subject: [PATCH 085/661] net: lan78xx: Disable TCP Segmentation Offload (TSO) TSO seems to be having issues when packets are dropped and the remote end uses Selective Acknowledge (SACK) to denote that @@ -133252,10 +133252,10 @@ index 8e234a7c84ef..681a6b949140 100644 2.18.4 -From f49798a0aa0c8e6aaf587c84550360b776f028d7 Mon Sep 17 00:00:00 2001 +From 357b4f647d5e10f98748fad243e441a93f4e2575 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 20 Jun 2018 12:20:01 +0100 -Subject: [PATCH 086/580] brcmfmac: Re-enable firmware roaming support +Subject: [PATCH 086/661] brcmfmac: Re-enable firmware roaming support As of 4.18, a firmware that implements the update_connect_params method but doesn't claim to support roaming causes an error. We @@ -133287,10 +133287,10 @@ index 591dcd04b4b4..e3758bd86acf 100644 2.18.4 -From f7a9d014f78882fb18e90647a404b6d003dfd02f Mon Sep 17 00:00:00 2001 +From 6436a4936f6ed96f04d62fe4bbd1e61be71143e4 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 5 Apr 2018 14:46:11 +0100 -Subject: [PATCH 087/580] lan78xx: Move enabling of EEE into PHY init code +Subject: [PATCH 087/661] lan78xx: Move enabling of EEE into PHY init code Enable EEE mode as soon as possible after connecting to the PHY, and before phy_start. This avoids a second link negotiation, which speeds @@ -133357,10 +133357,10 @@ index 681a6b949140..68d0aec53f3a 100644 2.18.4 -From 73aaf2912a9c3967023bf05bb697971a9fd8925a Mon Sep 17 00:00:00 2001 +From 854ed05952a4e26e8fff3b8d47ff32c3642a4183 Mon Sep 17 00:00:00 2001 From: Serge Schneider Date: Mon, 9 Jul 2018 12:54:25 +0100 -Subject: [PATCH 088/580] Add rpi-poe-fan driver +Subject: [PATCH 088/661] Add rpi-poe-fan driver Signed-off-by: Serge Schneider @@ -133955,10 +133955,10 @@ index 000000000000..c9654e9e9f2d 2.18.4 -From a1602940651a6ce3e447c79cdb763944d05ae0d2 Mon Sep 17 00:00:00 2001 +From f6d88636e7b18303f7fe3b0e3f02012ad8e20ab9 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 17 Sep 2018 17:31:18 +0100 -Subject: [PATCH 089/580] cxd2880: CXD2880_SPI_DRV should select DVB_CXD2880 +Subject: [PATCH 089/661] cxd2880: CXD2880_SPI_DRV should select DVB_CXD2880 with MEDIA_SUBDRV_AUTOSELECT --- @@ -133981,10 +133981,10 @@ index 857ef4ace6e9..deae75ea3c44 100644 2.18.4 -From dff70e39ffc0064399ad8c81a8c7e22bc8fde6ee Mon Sep 17 00:00:00 2001 +From 3a65d0c4117ce48da93930521081b2ffe9549150 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sat, 6 Oct 2018 16:46:18 +0200 -Subject: [PATCH 090/580] hwmon: raspberrypi: Prevent voltage low warnings from +Subject: [PATCH 090/661] hwmon: raspberrypi: Prevent voltage low warnings from filling log Although the correct fix for low voltage warnings is to @@ -134062,10 +134062,10 @@ index d3a64a35f7a9..db3b03438dd0 100644 2.18.4 -From e2a1335b68043e93baaf973fb7ebd028b8223c25 Mon Sep 17 00:00:00 2001 +From 974bee89789941bd9af7ac83eb1a63cc559ddba7 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sat, 13 Oct 2018 13:31:21 +0200 -Subject: [PATCH 091/580] firmware: raspberrypi: Add backward compatible +Subject: [PATCH 091/661] firmware: raspberrypi: Add backward compatible get_throttled Avoid a hard userspace ABI change by adding a compatible get_throttled @@ -134147,10 +134147,10 @@ index 05a0ae2a8eb7..f7d605a62801 100644 2.18.4 -From f9d8d84cba3478ca9b99bb77065da104e7787c19 Mon Sep 17 00:00:00 2001 +From 46cd2661b2dad8f7f287b78353ae5ea1911a584c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 6 Nov 2018 12:57:48 +0000 -Subject: [PATCH 092/580] sc16is7xx: Don't spin if no data received +Subject: [PATCH 092/661] sc16is7xx: Don't spin if no data received See: https://github.com/raspberrypi/linux/issues/2676 @@ -134176,10 +134176,10 @@ index f86ec2d2635b..ae48749d72fd 100644 2.18.4 -From 1554c4fa263ff7f546f3a49bc08dada59baf3a2a Mon Sep 17 00:00:00 2001 +From 9069c8e71b3bf84a69bf8a9ee33a2981abf034ab Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Mon, 7 May 2018 11:54:08 -0600 -Subject: [PATCH 093/580] drivers: thermal: step_wise: add support for +Subject: [PATCH 093/661] drivers: thermal: step_wise: add support for hysteresis Step wise governor increases the mitigation level when the temperature @@ -134276,10 +134276,10 @@ index 2ae7198d3067..abe34cfe21fe 100644 2.18.4 -From b03e1ba1023fb6fdce98d3b4a753d2a4f103846f Mon Sep 17 00:00:00 2001 +From 31e077e44fcb9a988a5168b63794e64245326723 Mon Sep 17 00:00:00 2001 From: Serge Schneider Date: Tue, 2 Oct 2018 11:14:15 +0100 -Subject: [PATCH 094/580] drivers: thermal: step_wise: avoid throttling at +Subject: [PATCH 094/661] drivers: thermal: step_wise: avoid throttling at hysteresis temperature after dropping below it Signed-off-by: Serge Schneider @@ -134304,10 +134304,10 @@ index abe34cfe21fe..5c8602933201 100644 2.18.4 -From 8a438a6795f9794d593c1729997d38b00bc38da4 Mon Sep 17 00:00:00 2001 +From 8e7f1974cc09778b5979ec1297827b2362292fd9 Mon Sep 17 00:00:00 2001 From: James Hughes Date: Fri, 2 Nov 2018 11:55:49 +0000 -Subject: [PATCH 095/580] Update issue templates (#2736) +Subject: [PATCH 095/661] Update issue templates (#2736) --- .github/ISSUE_TEMPLATE/bug_report.md | 34 ++++++++++++++++++++++++++++ @@ -134358,10 +134358,10 @@ index 000000000000..09bdc4a96838 2.18.4 -From 9c60e99fa64790bebe761b47194dce915e891f33 Mon Sep 17 00:00:00 2001 +From c736a3b5c9c3b6fd075da40dc44e3a393bd9b990 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Nov 2018 19:46:58 +0000 -Subject: [PATCH 096/580] net: lan78xx: Support auto-downshift to 100Mb/s +Subject: [PATCH 096/661] net: lan78xx: Support auto-downshift to 100Mb/s Ethernet cables with faulty or missing pairs (specifically pairs C and D) allow auto-negotiation to 1000Mbs, but do not support the successful @@ -134459,10 +134459,10 @@ index 517288da19fd..626c450d71f4 100644 2.18.4 -From 0e88769a9fe668c2a21d4f54591a29f0e3d0aa0a Mon Sep 17 00:00:00 2001 +From adadcf2c40ac229da4fca30b49952e140684c950 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 10 Jan 2019 17:58:06 +0000 -Subject: [PATCH 097/580] firmware: raspberrypi: Report the fw variant during +Subject: [PATCH 097/661] firmware: raspberrypi: Report the fw variant during probe The driver already reported the firmware build date during probe. @@ -134568,10 +134568,10 @@ index 16253b6875c9..d0c827064999 100644 2.18.4 -From 21e7dbc960255dc8d23b7b55583ce31d51356831 Mon Sep 17 00:00:00 2001 +From 42f20e452c35d60422ee29f3e9be2ee9488e2d2b Mon Sep 17 00:00:00 2001 From: Joshua Emele Date: Wed, 7 Nov 2018 16:07:40 -0800 -Subject: [PATCH 098/580] lan78xx: Debounce link events to minimize poll storm +Subject: [PATCH 098/661] lan78xx: Debounce link events to minimize poll storm The bInterval is set to 4 (i.e. 8 microframes => 1ms) and the only bit that the driver pays attention to is "link was reset". If there's a @@ -134619,10 +134619,10 @@ index 68d0aec53f3a..e5bd18aa1cfa 100644 2.18.4 -From 5f6f3e7fcf42c5fe2dbc5fa2d0e1b7770e825b0e Mon Sep 17 00:00:00 2001 +From 2d94ce61611c67adf1800fb3173c9483a3c83a0f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 5 Mar 2019 09:51:22 +0000 -Subject: [PATCH 099/580] lan78xx: EEE support is now a PHY property +Subject: [PATCH 099/661] lan78xx: EEE support is now a PHY property Now that EEE support is a property of the PHY, use the PHY's DT node when querying the EEE-related properties. @@ -134651,10 +134651,10 @@ index e5bd18aa1cfa..a03bcbdd04f3 100644 2.18.4 -From b2500e69a98cf724876c7b7194be966761d4f6ea Mon Sep 17 00:00:00 2001 +From 205f55f9b32338ed5d5eaeb1883ef7892d5ecec9 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 20 Jul 2018 22:03:41 +0100 -Subject: [PATCH 100/580] bcm2835-dma: Add support for per-channel flags +Subject: [PATCH 100/661] bcm2835-dma: Add support for per-channel flags Add the ability to interpret the high bits of the dreq specifier as flags to be included in the DMA_CS register. The motivation for this @@ -134705,10 +134705,10 @@ index bf7ba96a39f9..87b5d0bef355 100644 2.18.4 -From 4b4e885f57214a55df0d297a46d56be69924b146 Mon Sep 17 00:00:00 2001 +From 78e2449308c86192eb76a94e928ec3c4ac38e9fc Mon Sep 17 00:00:00 2001 From: Phil Howard Date: Fri, 29 Mar 2019 10:53:14 +0000 -Subject: [PATCH 101/580] rtc: rv3028: Add backup switchover mode support +Subject: [PATCH 101/661] rtc: rv3028: Add backup switchover mode support Signed-off-by: Phil Howard --- @@ -134761,10 +134761,10 @@ index fa226f0fe67d..20baf2257631 100644 2.18.4 -From cc11bc7e3b5b51ef655925316336be48058049a2 Mon Sep 17 00:00:00 2001 +From b12cba49514c439845f36ae63ad0cc01e86a98d2 Mon Sep 17 00:00:00 2001 From: P33M Date: Thu, 2 May 2019 11:53:45 +0100 -Subject: [PATCH 102/580] lan78xx: use default alignment for rx buffers +Subject: [PATCH 102/661] lan78xx: use default alignment for rx buffers The lan78xx uses a 12-byte hardware rx header, so there is no need to allocate SKBs with NET_IP_ALIGN set. Removes alignment faults @@ -134790,10 +134790,10 @@ index a03bcbdd04f3..58f5b90f11d4 100644 2.18.4 -From 1f601a9f91ba41856c4d1bc218ceb3a1b0bcd9e8 Mon Sep 17 00:00:00 2001 +From 20095597e77336e0cbdfa9765c718e0aea706156 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:55:37 +0000 -Subject: [PATCH 103/580] media: ov5647: Add set_fmt and get_fmt calls. +Subject: [PATCH 103/661] media: ov5647: Add set_fmt and get_fmt calls. There's no way to query the subdevice for the supported resolutions. @@ -134843,10 +134843,10 @@ index e7d2e5b4ad4b..3e587eb0a30e 100644 2.18.4 -From b02aabc8aed9822cd093937d8dbedf80b8452f7b Mon Sep 17 00:00:00 2001 +From 4a6b528f79ae4edbcd26c876196aadc122c14c92 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:56:33 +0000 -Subject: [PATCH 104/580] media: ov5647: Add support for PWDN GPIO. +Subject: [PATCH 104/661] media: ov5647: Add support for PWDN GPIO. Add support for an optional GPIO connected to PWDN on the sensor. @@ -134941,10 +134941,10 @@ index 3e587eb0a30e..c39e3d20e3ef 100644 2.18.4 -From de8a5d2764dbf0400259b10dbe40b85dc0b1b60d Mon Sep 17 00:00:00 2001 +From ea7e8f816de481992181efc072936db773fc9710 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:56:47 +0000 -Subject: [PATCH 105/580] media: ov5647: Add support for non-continuous clock +Subject: [PATCH 105/661] media: ov5647: Add support for non-continuous clock mode The driver was only supporting continuous clock mode @@ -135026,10 +135026,10 @@ index c39e3d20e3ef..8a1a515388e0 100644 2.18.4 -From f1cf7fb688107e86cec40ce2b2474582cac2fe74 Mon Sep 17 00:00:00 2001 +From 5665b9b439b9e83d41c3761891863db060da3b33 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:56:59 +0000 -Subject: [PATCH 106/580] media: tc358743: Increase FIFO level to 374. +Subject: [PATCH 106/661] media: tc358743: Increase FIFO level to 374. The existing fixed value of 16 worked for UYVY 720P60 over 2 lanes at 594MHz, or UYVY 1080P60 over 4 lanes. (RGB888 @@ -135063,10 +135063,10 @@ index 831b5b54fd78..8ca6d67a2b3e 100644 2.18.4 -From 30d552f9624af86439326ae4807980d977260c68 Mon Sep 17 00:00:00 2001 +From 9cfe977004a3245984dc5bf7365b94e597d61bd1 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 21 Sep 2017 17:30:24 +0200 -Subject: [PATCH 107/580] media: tc358743: fix connected/active CSI-2 lane +Subject: [PATCH 107/661] media: tc358743: fix connected/active CSI-2 lane reporting g_mbus_config was supposed to indicate all supported lane numbers, not @@ -135145,10 +135145,10 @@ index c20e2dc6d432..396fb88266be 100644 2.18.4 -From 6ba7d09592da93d08a090468967840aca26924bf Mon Sep 17 00:00:00 2001 +From 4414e3c2387b1cf5f1daa2894bfe5106ca34f941 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:57:21 +0000 -Subject: [PATCH 108/580] media: tc358743: Add support for 972Mbit/s link freq. +Subject: [PATCH 108/661] media: tc358743: Add support for 972Mbit/s link freq. Adds register setups for running the CSI lanes at 972Mbit/s, which allows 1080P50 UYVY down 2 lanes. @@ -135230,10 +135230,10 @@ index 46ea2d034580..0856a711ee33 100644 2.18.4 -From eac17a4c2c9a0e32f5f36b64e76b5d1c341bb909 Mon Sep 17 00:00:00 2001 +From 277bba934fe69e4fb9ab7c603b7e5305d43452dc Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:57:34 +0000 -Subject: [PATCH 109/580] media: tc358743: Check I2C succeeded during probe. +Subject: [PATCH 109/661] media: tc358743: Check I2C succeeded during probe. The probe for the TC358743 reads the CHIPID register from the device and compares it to the expected value of 0. @@ -135334,10 +135334,10 @@ index 0856a711ee33..056fc6b884dd 100644 2.18.4 -From eb6d6cd3a1d41e2da74cdd86082c7ca7255182e0 Mon Sep 17 00:00:00 2001 +From 3770c7fd387151a2ed12c53ae50017abe6ee4bd5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:57:46 +0000 -Subject: [PATCH 110/580] media: adv7180: Default to the first valid input +Subject: [PATCH 110/661] media: adv7180: Default to the first valid input The hardware default is differential CVBS on AIN1 & 2, which isn't very useful. @@ -135385,10 +135385,10 @@ index 4498d14d3429..e98dd2bee1e5 100644 2.18.4 -From 02095c49eee9049b71e0cd2693cf422378f78ea4 Mon Sep 17 00:00:00 2001 +From 87b2825e8bd6cca458c243d6dcb609b63c14630f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:57:56 +0000 -Subject: [PATCH 111/580] media: adv7180: Add YPrPb support for ADV7282M +Subject: [PATCH 111/661] media: adv7180: Add YPrPb support for ADV7282M The ADV7282M can support YPbPr on AIN1-3, but this was not selectable from the driver. Add it to the list of @@ -135415,10 +135415,10 @@ index e98dd2bee1e5..4103690a71df 100644 2.18.4 -From b1e9ca5d8fe32ed94c934c132433b92e5176103b Mon Sep 17 00:00:00 2001 +From 9ea54b1ad12358d908cf6dc8cd7ce7a7423df297 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:58:08 +0000 -Subject: [PATCH 112/580] media: videodev2: Add helper defines for printing +Subject: [PATCH 112/661] media: videodev2: Add helper defines for printing FOURCCs New helper defines that allow printing of a FOURCC using @@ -135449,10 +135449,10 @@ index 534eaa4d39bc..56c443cc2c3d 100644 2.18.4 -From 1b89c4e39f9cc386f80f0209296310f5b375618b Mon Sep 17 00:00:00 2001 +From ff06c2ba52730e7f478017d0cfcf461f89b3e000 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:59:06 +0000 -Subject: [PATCH 113/580] dt-bindings: Document BCM283x CSI2/CCP2 receiver +Subject: [PATCH 113/661] dt-bindings: Document BCM283x CSI2/CCP2 receiver Document the DT bindings for the CSI2/CCP2 receiver peripheral (known as Unicam) on BCM283x SoCs. @@ -135559,10 +135559,10 @@ index 000000000000..7714fb374b34 2.18.4 -From 2b0cca94295cbe9fe03b7555ac0fa22ca4f92ef8 Mon Sep 17 00:00:00 2001 +From dd197999a1dd5517f9693fa45db9b97e40572807 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 31 Oct 2018 14:59:40 +0000 -Subject: [PATCH 114/580] MAINTAINERS: Add entry for BCM2835 Unicam driver +Subject: [PATCH 114/661] MAINTAINERS: Add entry for BCM2835 Unicam driver Adds entry for the new BCM2835 Unicam (CSI-2 receiver) driver @@ -135593,10 +135593,10 @@ index 24cdfcf334ea..4b0478749279 100644 2.18.4 -From 91886b0dcc40ef8e0ec4706be43d9b0f62a73250 Mon Sep 17 00:00:00 2001 +From d1f7ea46034148d198208e7ea57fbbcbc3b038bb Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 22 Nov 2018 17:31:06 +0000 -Subject: [PATCH 115/580] media: tc358743: Return an appropriate colorspace +Subject: [PATCH 115/661] media: tc358743: Return an appropriate colorspace from tc358743_set_fmt When calling tc358743_set_fmt, the code was calling tc358743_get_fmt @@ -135697,10 +135697,10 @@ index 056fc6b884dd..0a8a25ff7872 100644 2.18.4 -From 664453188a7c6ff62328ca5dd1350f49517b5c8b Mon Sep 17 00:00:00 2001 +From 88397dc4035420032fbf9f979b7d333a56ba3a32 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 29 Oct 2018 16:20:46 +0000 -Subject: [PATCH 116/580] staging: mmal-vchiq: Avoid use of bool in structures +Subject: [PATCH 116/661] staging: mmal-vchiq: Avoid use of bool in structures Fixes up a checkpatch error "Avoid using bool structure members because of possible alignment issues". @@ -135727,10 +135727,10 @@ index 9097bcbd67d8..8734a09498b1 100644 2.18.4 -From ef327a55a2c8e0820da1a28790d9081e22556a9b Mon Sep 17 00:00:00 2001 +From dcf5e54cbe083092d6c04d6b3c449b2d51b641d9 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 24 Sep 2018 18:15:38 +0100 -Subject: [PATCH 117/580] staging: mmal-vchiq: Add support for event callbacks. +Subject: [PATCH 117/661] staging: mmal-vchiq: Add support for event callbacks. (Preparation for the codec driver). The codec uses the event mechanism to report things such as @@ -136095,10 +136095,10 @@ index 1dc81ecf9268..e87f88f99338 100644 2.18.4 -From 2329a1b7ea03be001b1c6322138b689115bb779b Mon Sep 17 00:00:00 2001 +From 9a19800cb21dd544acdd2e39f7f1231c939cc5ab Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 24 Sep 2018 18:26:02 +0100 -Subject: [PATCH 118/580] staging: vc04_services: Support sending data to MMAL +Subject: [PATCH 118/661] staging: vc04_services: Support sending data to MMAL ports Add the ability to send data to ports. This only supports @@ -136143,10 +136143,10 @@ index 1a66c9484aa7..2361a11f1e20 100644 2.18.4 -From 5214b06fb9170ce8ccf4141a9d7c3deef8d24b85 Mon Sep 17 00:00:00 2001 +From d50816bd70e56cde897a329060121bafde5c5d9c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 29 Oct 2018 17:57:45 +0000 -Subject: [PATCH 119/580] media: videobuf2: Allow exporting of a struct dmabuf +Subject: [PATCH 119/661] media: videobuf2: Allow exporting of a struct dmabuf videobuf2 only allowed exporting a dmabuf as a file descriptor, but there are instances where having the struct dma_buf is @@ -136234,10 +136234,10 @@ index bbb3f26fbde9..7a4aa9cb28c9 100644 2.18.4 -From 7c99c28a6e4cd17a27f6bb0d7d5352b161ed1f57 Mon Sep 17 00:00:00 2001 +From 4c32b208fb6a001671e97a6bebfb8bb7a9fa7d40 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 22 Jan 2019 12:04:09 +0000 -Subject: [PATCH 120/580] staging: mmal-vchiq: Fix client_component for 64 bit +Subject: [PATCH 120/661] staging: mmal-vchiq: Fix client_component for 64 bit kernel The MMAL client_component field is used with the event @@ -136275,10 +136275,10 @@ index 2361a11f1e20..3e2209847761 100644 2.18.4 -From f487ae88420bbaadf78b624cac971a07a9a0794b Mon Sep 17 00:00:00 2001 +From f86af9adb3fc17a37559660dafa54cdfbf3497d5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 24 Jan 2019 15:09:28 +0000 -Subject: [PATCH 121/580] clk: clk-bcm2835: Use %zd when printing size_t +Subject: [PATCH 121/661] clk: clk-bcm2835: Use %zd when printing size_t The debug text for how many clocks have been registered uses "%d" with a size_t. Correct it to "%zd". @@ -136305,10 +136305,10 @@ index f1ef788c1194..2674b979a072 100644 2.18.4 -From b511ee97d051c8c6a13b1996b872c6375bb9eb61 Mon Sep 17 00:00:00 2001 +From 2f84baf730239774566c5126ebea0da8bc5db282 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 18 Sep 2018 11:08:51 +0100 -Subject: [PATCH 122/580] media: ov5647: Use gpiod_set_value_cansleep +Subject: [PATCH 122/661] media: ov5647: Use gpiod_set_value_cansleep All calls to the gpio library are in contexts that can sleep, therefore there is no issue with having those GPIOs controlled @@ -136365,10 +136365,10 @@ index 8a1a515388e0..07550377be2e 100644 2.18.4 -From 90772948d117b88d996e129605ea59d00514beb8 Mon Sep 17 00:00:00 2001 +From 6595a3a6c3ef230d248a9187991727bf1e86fb73 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 13 Feb 2019 12:33:29 +0000 -Subject: [PATCH 123/580] staging: mmal_vchiq: Add in the Bayer encoding +Subject: [PATCH 123/661] staging: mmal_vchiq: Add in the Bayer encoding formats The list of formats was copied before Bayer support was added. @@ -136422,10 +136422,10 @@ index 2be9941a1f30..44ba91aa6d47 100644 2.18.4 -From cfd18860d11a1f1c1a37b3ae2fbb46ac5905e16b Mon Sep 17 00:00:00 2001 +From eb21349446a8173f794687493184f212dc3e67dd Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 18 Feb 2019 15:52:29 +0000 -Subject: [PATCH 124/580] staging: mmal-vchiq: Update mmal_parameters.h with +Subject: [PATCH 124/661] staging: mmal-vchiq: Update mmal_parameters.h with recently defined params mmal_parameters.h hasn't been updated to reflect additions made @@ -136484,10 +136484,10 @@ index a1e39b1b1701..1793103b18fd 100644 2.18.4 -From 0d34a13cf6a365b42db0cdaec9b155813f88ef8a Mon Sep 17 00:00:00 2001 +From c8b9c453dd3a6b6bd04c68ff9ce6436516743788 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 1 May 2019 13:27:23 +0100 -Subject: [PATCH 125/580] staging: mmal-vchiq: Free the event context for +Subject: [PATCH 125/661] staging: mmal-vchiq: Free the event context for control ports vchiq_mmal_component_init calls init_event_context for the @@ -136518,10 +136518,10 @@ index 3e2209847761..d4d9ad3500b6 100644 2.18.4 -From 8cd0fc6283d79ee29de6b04b709596d1157f8678 Mon Sep 17 00:00:00 2001 +From f129021dba498354373c89402025491fea3e73e4 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 2 May 2019 15:50:01 +0100 -Subject: [PATCH 126/580] staging: mmal-vchiq: Fix memory leak in error path +Subject: [PATCH 126/661] staging: mmal-vchiq: Fix memory leak in error path On error, vchiq_mmal_component_init could leave the event context allocated for ports. @@ -136600,10 +136600,10 @@ index d4d9ad3500b6..14bdfdea5770 100644 2.18.4 -From 2064603e827702fc98c814936a253a2ccc4fa30e Mon Sep 17 00:00:00 2001 +From 565a2db331ad18290989546cc481f739581c4503 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 12 Jun 2019 17:15:05 +0100 -Subject: [PATCH 127/580] w1: w1-gpio: Make GPIO an output for strong pullup +Subject: [PATCH 127/661] w1: w1-gpio: Make GPIO an output for strong pullup The logic to drive the data line high to implement a strong pullup assumed that the pin was already an output - setting a value does @@ -136633,10 +136633,10 @@ index d4632aace402..4832cd8c2596 100644 2.18.4 -From ed167e0f378e9ce139b93563e67bbb18aad36074 Mon Sep 17 00:00:00 2001 +From 5b9b952111a6f473b612ac2b7563174898b62c03 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 20 Feb 2019 08:49:39 +0000 -Subject: [PATCH 128/580] arm: bcm2835: Fix FIQ early ioremap +Subject: [PATCH 128/661] arm: bcm2835: Fix FIQ early ioremap The ioremapping creates mappings within the vmalloc area. The equivalent early function, create_mapping, now checks that the @@ -136712,10 +136712,10 @@ index 9b6c921106b5..9bd9842da59f 100644 2.18.4 -From 41aa457a7f0254a094f4c06610d3d4c160adbfc9 Mon Sep 17 00:00:00 2001 +From 24c3b163b9549cb5a37707d48c0c899665633363 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 29 May 2019 15:47:42 +0100 -Subject: [PATCH 129/580] arm: bcm2835: DMA can only address 1GB +Subject: [PATCH 129/661] arm: bcm2835: DMA can only address 1GB The legacy peripherals can only address the first gigabyte of RAM, so ensure that DMA allocations are restricted to that region. @@ -136743,10 +136743,10 @@ index 9bd9842da59f..7d59a9364175 100644 2.18.4 -From 66d31f6421e5b6f5dfa743049db360f2e1c33183 Mon Sep 17 00:00:00 2001 +From c39bfe55330c514ffe2abfad9369a2668832c458 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sat, 4 May 2019 17:06:15 +0200 -Subject: [PATCH 130/580] hwrng: iproc-rng200: Add BCM2838 support +Subject: [PATCH 130/661] hwrng: iproc-rng200: Add BCM2838 support The HWRNG on the BCM2838 is compatible to iproc-rng200, so add the support to this driver instead of bcm2835-rng. @@ -136904,10 +136904,10 @@ index 01583faf9893..2a92ea658096 100644 2.18.4 -From ac6ec8442e62ca8e40f1efc14e082dc859a5e363 Mon Sep 17 00:00:00 2001 +From 05779d335ed70dabd793c3b91855076114013dac Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 2 Aug 2019 15:20:11 +0100 -Subject: [PATCH 131/580] mmc: sdhci-iproc: Fix vmmc regulators on iProc +Subject: [PATCH 131/661] mmc: sdhci-iproc: Fix vmmc regulators on iProc The Linux support for controlling card power via regulators appears to be contentious. I would argue that the default behaviour is contrary to @@ -136956,10 +136956,10 @@ index ddeaf8e1f72f..57257a014022 100644 2.18.4 -From 7732ce06dbe634b1eba8a04f56e57cd51aa306af Mon Sep 17 00:00:00 2001 +From 7fae3c44dbe4d2245dd21e451c294813410c3580 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 1 Nov 2018 17:31:37 +0000 -Subject: [PATCH 132/580] vchiq: Add 36-bit address support +Subject: [PATCH 132/661] vchiq: Add 36-bit address support Conditional on a new compatible string, change the pagelist encoding such that the top 24 bits are the pfn, leaving 8 bits for run length @@ -137168,10 +137168,10 @@ index 0784c5002417..f8b1c005af62 100644 2.18.4 -From 487f31928f5c18f44370b21914cb3e6f413f1241 Mon Sep 17 00:00:00 2001 +From dde231abb9380cfff8b65876b0a907e2efb8f624 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 30 Apr 2019 19:15:30 +0100 -Subject: [PATCH 133/580] bcm2835-pcm.c: Support multichannel audio +Subject: [PATCH 133/661] bcm2835-pcm.c: Support multichannel audio --- .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 17 +++++++++-------- @@ -137220,10 +137220,10 @@ index 096f2c54258a..3c0033101e6e 100644 2.18.4 -From 3fd91650c0dd8850f9474f444f18bc1cfcb1b025 Mon Sep 17 00:00:00 2001 +From d3f909c85c634b64b3b46b5281a24b07077cd37e Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Wed, 12 Sep 2018 14:44:53 +0100 -Subject: [PATCH 134/580] bcmgenet: constrain max DMA burst length +Subject: [PATCH 134/661] bcmgenet: constrain max DMA burst length --- drivers/net/ethernet/broadcom/genet/bcmgenet.h | 2 +- @@ -137246,10 +137246,10 @@ index f6ca01da141d..45ea07829b8c 100644 2.18.4 -From 1f63c05c5e8fa19841f63210478699f9f7d75c3a Mon Sep 17 00:00:00 2001 +From c3954688518b96d63baea32a54e8b84dc664fb1e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 27 Mar 2019 13:45:46 +0000 -Subject: [PATCH 135/580] bcmgenet: Better coalescing parameter defaults +Subject: [PATCH 135/661] bcmgenet: Better coalescing parameter defaults Set defaults for TX and RX packet coalescing to be equivalent to: @@ -137295,10 +137295,10 @@ index fcca023f22e5..848c29c5c33d 100644 2.18.4 -From d478db811538feeb82eb44f498c14aad78569066 Mon Sep 17 00:00:00 2001 +From 948bea7966a217c118e84794b99dc72ff059172e Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Tue, 14 May 2019 17:17:59 +0100 -Subject: [PATCH 136/580] net: genet: enable link energy detect powerdown for +Subject: [PATCH 136/661] net: genet: enable link energy detect powerdown for external PHYs There are several warts surrounding bcmgenet_mii_probe() as this @@ -137332,10 +137332,10 @@ index 6fb6c3556285..2e516f4c435e 100644 2.18.4 -From fc39b213e4c38c4b951ad8605a57773fa5a5ddc8 Mon Sep 17 00:00:00 2001 +From 4b11d84b57599c3cce6ded0fc5d4e1591e8a65de Mon Sep 17 00:00:00 2001 From: Tim Gover Date: Fri, 22 Mar 2019 09:47:14 +0000 -Subject: [PATCH 137/580] usb: xhci: Disable the XHCI 5 second timeout +Subject: [PATCH 137/661] usb: xhci: Disable the XHCI 5 second timeout If the VL805 EEPROM has not been programmed then boot will hang for five seconds. The timeout seems to be arbitrary and is an unecessary @@ -137367,10 +137367,10 @@ index c449de6164b1..b9ce60af9696 100644 2.18.4 -From 7e40b1af41cb89b91a8a95b360974c2aaa676f45 Mon Sep 17 00:00:00 2001 +From e0c6f57e815598bd621967cba87be0d212ff6063 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Mon, 13 May 2019 11:05:27 +0000 -Subject: [PATCH 138/580] spi: bcm2835: enable shared interrupt support +Subject: [PATCH 138/661] spi: bcm2835: enable shared interrupt support Add shared interrupt support for this driver. @@ -137408,10 +137408,10 @@ index 197485f2c2b2..5c7aa77f504e 100644 2.18.4 -From 6497f9523c9340d57f637fc11a09b9b5e745687d Mon Sep 17 00:00:00 2001 +From 9a55e775b844d6eb34c113cfa9524605e8a9a898 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 23 Jan 2019 16:11:50 +0000 -Subject: [PATCH 139/580] clk-bcm2835: Don't wait for pllh lock +Subject: [PATCH 139/661] clk-bcm2835: Don't wait for pllh lock Signed-off-by: Phil Elwell --- @@ -137452,10 +137452,10 @@ index 2674b979a072..38f97f1707d2 100644 2.18.4 -From 6d57701862dee4e5dd18b5d9525ab08ab7212380 Mon Sep 17 00:00:00 2001 +From f79fa5e04fa6ce34eddc92627567cf186ff3b9a0 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 11 Jan 2019 17:31:07 -0800 -Subject: [PATCH 140/580] soc: bcm: bcm2835-pm: Add support for 2711. +Subject: [PATCH 140/661] soc: bcm: bcm2835-pm: Add support for 2711. Without the actual power management part any more, there's a lot less to set up for V3D. We just need to clear the RSTN field for the power @@ -137564,10 +137564,10 @@ index ed37dc40e82a..b2d157091e12 100644 2.18.4 -From e19b8f0abe7e7cbdd7c8830eb943fdf609acfa35 Mon Sep 17 00:00:00 2001 +From a1df5d33fac6550038e99867479453ddc2cb4511 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 2 May 2019 15:11:05 -0700 -Subject: [PATCH 141/580] clk: bcm2835: Add support for setting leaf clock +Subject: [PATCH 141/661] clk: bcm2835: Add support for setting leaf clock rates while running. As long as you wait for !BUSY, you can do glitch-free updates of clock @@ -137623,10 +137623,10 @@ index 38f97f1707d2..4cf4f5e12fe2 100644 2.18.4 -From 43aa65e984d72d0055f9047f22f3f602730aa469 Mon Sep 17 00:00:00 2001 +From b3da43cd116f848ca6aecdc1423fb239a3828513 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 2 May 2019 15:24:04 -0700 -Subject: [PATCH 142/580] clk: bcm2835: Allow reparenting leaf clocks while +Subject: [PATCH 142/661] clk: bcm2835: Allow reparenting leaf clocks while they're running. This falls under the same "we can reprogram glitch-free as long as we @@ -137700,10 +137700,10 @@ index 4cf4f5e12fe2..3c55594684cd 100644 2.18.4 -From 26ecd3de35110d5a45c2a7bfbb47a80174c43abb Mon Sep 17 00:00:00 2001 +From ad6a772be658ec4bd742bfb1e15c7e0dba027511 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Tue, 11 Jun 2019 10:55:00 +0100 -Subject: [PATCH 143/580] usb: add plumbing for updating interrupt endpoint +Subject: [PATCH 143/661] usb: add plumbing for updating interrupt endpoint interval state xHCI caches device and endpoint data after the interface is configured, @@ -137816,10 +137816,10 @@ index 3dbb42c637c1..a60b7fc02fce 100644 2.18.4 -From f3cd2c8d5daba0da6eeb5e8458a623d342bcc642 Mon Sep 17 00:00:00 2001 +From 8c97b1ea97c5d9a426dafe42bdcc296aff3fb845 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Tue, 11 Jun 2019 11:33:39 +0100 -Subject: [PATCH 144/580] xhci: implement xhci_fixup_endpoint for interval +Subject: [PATCH 144/661] xhci: implement xhci_fixup_endpoint for interval adjustments Must be called in a non-atomic context, after the endpoint @@ -137951,10 +137951,10 @@ index b9ce60af9696..2c31bfbf6b93 100644 2.18.4 -From 34f290372ead14daccba726ce011dcab3409d095 Mon Sep 17 00:00:00 2001 +From 729ebac60c001821dd9ae590d85b7e1df432aa6f Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Tue, 11 Jun 2019 11:42:03 +0100 -Subject: [PATCH 145/580] usbhid: call usb_fixup_endpoint after mangling +Subject: [PATCH 145/661] usbhid: call usb_fixup_endpoint after mangling intervals Lets the mousepoll override mechanism work with xhci. @@ -137980,10 +137980,10 @@ index 1134d543e5d6..3d5d82f7176f 100644 2.18.4 -From 09f996b40781cda4a92a203d2e5bac61c1b6d459 Mon Sep 17 00:00:00 2001 +From 9b8154757b65416ab61989509fb85bb95d31c651 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 11 Jun 2019 17:38:28 +0100 -Subject: [PATCH 146/580] arm: bcm2835: Add bcm2838 compatible string. +Subject: [PATCH 146/661] arm: bcm2835: Add bcm2838 compatible string. Signed-off-by: Phil Elwell --- @@ -138006,10 +138006,10 @@ index 7d59a9364175..282a023027fc 100644 2.18.4 -From a343e49a5a1c7d03f95e075095a65169d216e91f Mon Sep 17 00:00:00 2001 +From 96eb1905a745535b03ba07f60dd61969cc600b7e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 4 Oct 2018 17:22:43 -0700 -Subject: [PATCH 147/580] drm/v3d: Add support for 2711. +Subject: [PATCH 147/661] drm/v3d: Add support for 2711. Signed-off-by: Eric Anholt --- @@ -138032,10 +138032,10 @@ index 9f7c26193831..a463f8c0ad4c 100644 2.18.4 -From d61157f9579e7b239abbd491be34e4d8306c36aa Mon Sep 17 00:00:00 2001 +From b6da5e3d1d23de81d07a444b10641325a995c74b Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 14 Jan 2019 12:35:43 -0800 -Subject: [PATCH 148/580] drm/v3d: Skip MMU flush if the device is currently +Subject: [PATCH 148/661] drm/v3d: Skip MMU flush if the device is currently off. If it's off, we know it will be reset on poweron, so the MMU won't @@ -138090,10 +138090,10 @@ index 5a453532901f..8986e7b96461 100644 2.18.4 -From d8c31601241e73bcabad04e0e411de7f3dfdf76b Mon Sep 17 00:00:00 2001 +From 25194bcb1a8f0d869f70a2f7dc403d6338c87264 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 14 Jan 2019 14:47:57 -0800 -Subject: [PATCH 149/580] drm/v3d: Hook up the runtime PM ops. +Subject: [PATCH 149/661] drm/v3d: Hook up the runtime PM ops. In translating the runtime PM code from vc4, I missed the ".pm" assignment to actually connect them up. Fixes missing MMU setup if @@ -138130,10 +138130,10 @@ index a463f8c0ad4c..5f581fe8c918 100644 2.18.4 -From 8a51a914de2d5cdc83a8f1c53af9e042676c1ac9 Mon Sep 17 00:00:00 2001 +From 6120b9adee5fce241642e3deb1092ff4e74b4a61 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Thu, 11 Jul 2019 17:55:43 +0100 -Subject: [PATCH 150/580] xhci: add quirk for host controllers that don't +Subject: [PATCH 150/661] xhci: add quirk for host controllers that don't update endpoint DCS Seen on a VLI VL805 PCIe to USB controller. For non-stream endpoints @@ -138230,10 +138230,10 @@ index d01241f1daf3..03e4280dbb5a 100644 2.18.4 -From 6b98325f6694aef2ee1b3e1ac09b520d0e3a512e Mon Sep 17 00:00:00 2001 +From 16215bf90ef3a0733db9d3b49ab80763130d3826 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 12 Jul 2019 15:38:35 +0100 -Subject: [PATCH 151/580] i2c: bcm2835: Set clock-stretch timeout to 35ms +Subject: [PATCH 151/661] i2c: bcm2835: Set clock-stretch timeout to 35ms The BCM2835 I2C blocks have a register to set the clock-stretch timeout - how long the device is allowed to hold SCL low - in bus @@ -138283,10 +138283,10 @@ index 18b2e9e3d752..5b2589b6b9cc 100644 2.18.4 -From 7267bf7e6a80d5c749b5c1cef94fa7ea2195265b Mon Sep 17 00:00:00 2001 +From 9fb39990205281276695a4b1eaa0ed359dac35e1 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 6 Aug 2019 15:23:14 +0100 -Subject: [PATCH 152/580] clk-bcm2835: Avoid null pointer exception +Subject: [PATCH 152/661] clk-bcm2835: Avoid null pointer exception clk_desc_array[BCM2835_PLLB] doesn't exist so we dereference null when iterating @@ -138318,10 +138318,10 @@ index 3c55594684cd..d686c51a68a9 100644 2.18.4 -From e595509cc84dc81a5168502600d9a05b108dab2f Mon Sep 17 00:00:00 2001 +From faa58ad015352095578b15e7476f0d17e54052f4 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 14 Jan 2019 15:13:17 -0800 -Subject: [PATCH 153/580] drm/v3d: HACK: gut runtime pm for now. +Subject: [PATCH 153/661] drm/v3d: HACK: gut runtime pm for now. Something is still unstable -- on starting a new glxgears from an idle X11, I get an MMU violation in high addresses. The CTS also failed @@ -138435,10 +138435,10 @@ index 5f581fe8c918..e6dffb116eb3 100644 2.18.4 -From c53e140e1b9a60c1bf0c1768ea5a6e3810fad615 Mon Sep 17 00:00:00 2001 +From 4b328f46067ed30c3cbfefc1e0075cd6ef124b57 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 2 May 2019 13:22:53 -0700 -Subject: [PATCH 154/580] drm/v3d: Clock V3D down when not in use. +Subject: [PATCH 154/661] drm/v3d: Clock V3D down when not in use. My various attempts at re-enabling runtime PM have failed, so just crank the clock down when V3D is idle to reduce power consumption. @@ -138606,10 +138606,10 @@ index 182c586525eb..b7b439de8660 100644 2.18.4 -From 3d556d3f1686876cdbd24ee95c72d3aff318f89f Mon Sep 17 00:00:00 2001 +From 245a024c4e205296c5206bf300618d338f5eb33d Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Thu, 9 May 2019 14:30:37 +0100 -Subject: [PATCH 155/580] drivers: char: add chardev for mmap'ing the RPiVid +Subject: [PATCH 155/661] drivers: char: add chardev for mmap'ing the RPiVid control registers Based on the gpiomem driver, allow mapping of the decoder register @@ -139064,10 +139064,10 @@ index b2d157091e12..f70a810c55f7 100644 2.18.4 -From 5402f65c8d37a25edd68ee7d54a8084a55e8c02f Mon Sep 17 00:00:00 2001 +From d1c079470dca9df827ddec65b1c7ce88076d50fc Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Thu, 1 Aug 2019 16:41:20 +0100 -Subject: [PATCH 156/580] hid: usb: Add device quirks for Freeway Airmouse T3 +Subject: [PATCH 156/661] hid: usb: Add device quirks for Freeway Airmouse T3 and MX3 These wireless mouse/keyboard combo remote control devices specify @@ -139088,7 +139088,7 @@ Signed-off-by: Jonathan Bell 2 files changed, 8 insertions(+) diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index 06813f297dcc..e476ca6aa80d 100644 +index b93ce0d475e0..8e3be9ec73cb 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h @@ -220,6 +220,9 @@ @@ -139101,7 +139101,7 @@ index 06813f297dcc..e476ca6aa80d 100644 #define USB_VENDOR_ID_BELKIN 0x050d #define USB_DEVICE_ID_FLIP_KVM 0x3201 -@@ -1263,6 +1266,9 @@ +@@ -1264,6 +1267,9 @@ #define USB_VENDOR_ID_XAT 0x2505 #define USB_DEVICE_ID_XAT_CSR 0x0220 @@ -139135,10 +139135,10 @@ index 2e38340e19df..bdc135f029bd 100644 2.18.4 -From 9f98546e1604b58a37ac22700e138af1735f42b5 Mon Sep 17 00:00:00 2001 +From 17baa5a1e9879c4fe8aca7a81187d45c92d9723d Mon Sep 17 00:00:00 2001 From: James Hughes Date: Tue, 16 Jul 2019 12:18:21 +0100 -Subject: [PATCH 157/580] Add HDMI1 facility to the driver. +Subject: [PATCH 157/661] Add HDMI1 facility to the driver. For generic ALSA, all you need is the bcm2835.h change, but have also added structures for IEC958 HDMI. Not sure how to @@ -139228,10 +139228,10 @@ index 1b36475872d6..02f50768af96 100644 2.18.4 -From 3ea3646fb240d523965354c1089658639b96df28 Mon Sep 17 00:00:00 2001 +From 5c8a8cea0ee920723c3bddb074f969676184dfc1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 9 Aug 2019 08:51:43 +0100 -Subject: [PATCH 158/580] net: bcmgenet: Workaround #2 for Pi4 Ethernet fail +Subject: [PATCH 158/661] net: bcmgenet: Workaround #2 for Pi4 Ethernet fail Some combinations of Pi 4Bs and Ethernet switches don't reliably get a DCHP-assigned IP address, leaving the unit with a self=assigned 169.254 @@ -139285,10 +139285,10 @@ index 848c29c5c33d..8336558e4738 100644 2.18.4 -From 71f3d55efb266abcbd58c8ff153abb1882194962 Mon Sep 17 00:00:00 2001 +From cdc11e6c6601aaa101b7a45703a1f1d6d44aadac Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Tue, 13 Aug 2019 15:53:29 +0100 -Subject: [PATCH 159/580] xhci: Use more event ring segment table entries +Subject: [PATCH 159/661] xhci: Use more event ring segment table entries Users have reported log spam created by "Event Ring Full" xHC event TRBs. These are caused by interrupt latency in conjunction with a very @@ -139353,10 +139353,10 @@ index 03e4280dbb5a..4f24ad7eccd9 100644 2.18.4 -From c2a039ae19974083d5575e8eb89b8f84ffeccd34 Mon Sep 17 00:00:00 2001 +From 029317be81cf893b1abeef3bf37c773bd459d9bf Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 15 Aug 2019 12:02:34 +0100 -Subject: [PATCH 160/580] configs: arm64/bcm2711: Enable V3D +Subject: [PATCH 160/661] configs: arm64/bcm2711: Enable V3D Enable the V3D driver, which depends on BCM2835_POWER. @@ -139387,10 +139387,10 @@ index 9a5c44606337..b0e048697964 100644 2.18.4 -From 8444ae8621b211ed7c033a26e04c9721e34ef52b Mon Sep 17 00:00:00 2001 +From e9074653f10ec1acf58526b786e75bdb30c69709 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 3 Sep 2019 18:16:56 +0100 -Subject: [PATCH 161/580] arch/arm: Add model string to cpuinfo +Subject: [PATCH 161/661] arch/arm: Add model string to cpuinfo Signed-off-by: Phil Elwell --- @@ -139429,10 +139429,10 @@ index 3f65d0ac9f63..6f39d21f4254 100644 2.18.4 -From ea4e93a00a2fb9694d2bb20e2490214709494612 Mon Sep 17 00:00:00 2001 +From 2c6fc2316b77aa6c4683ce2249334012a0b48fce Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 3 Sep 2019 18:17:25 +0100 -Subject: [PATCH 162/580] arch/arm64: Add Revision, Serial, Model to cpuinfo +Subject: [PATCH 162/661] arch/arm64: Add Revision, Serial, Model to cpuinfo Signed-off-by: Phil Elwell --- @@ -139493,10 +139493,10 @@ index 77605aec25fe..721350d21074 100644 2.18.4 -From ac91fa00c5acc96baaa1941c3a5bc8b4d62a4bde Mon Sep 17 00:00:00 2001 +From 52dc4e95d8dbca68bfbcef2f2a2f8a1ec414168b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 28 Aug 2019 13:34:30 +0100 -Subject: [PATCH 163/580] media: dt-bindings: Add binding for the Sony IMX219 +Subject: [PATCH 163/661] media: dt-bindings: Add binding for the Sony IMX219 sensor The IMX219 is an 8MPix CSI2 sensor, supporting 2 or 4 data lanes. @@ -139577,10 +139577,10 @@ index 000000000000..a02f1ce1e120 2.18.4 -From 289dc9241a401b4befe13d632d38718e9bc81f9a Mon Sep 17 00:00:00 2001 +From 67ff8dce253f4ce670831b27a6266c6d351b720b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 6 Sep 2019 15:04:51 +0100 -Subject: [PATCH 164/580] v4l2: Add a Greyworld AWB mode. +Subject: [PATCH 164/661] v4l2: Add a Greyworld AWB mode. Adds a simple greyworld white balance preset, mainly for use with cameras without an IR filter (eg Raspberry Pi NoIR) @@ -139619,10 +139619,10 @@ index a184c4939438..fbe96b80a748 100644 2.18.4 -From cc00c069278e5f62fdd926f22da219a604ee5eb6 Mon Sep 17 00:00:00 2001 +From 983b0f5502983a5e84436b906265749a71dca26b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 6 Sep 2019 15:13:06 +0100 -Subject: [PATCH 165/580] staging: bcm2835-camera: Add greyworld AWB mode +Subject: [PATCH 165/661] staging: bcm2835-camera: Add greyworld AWB mode This is mainly used for the NoIR camera which has no IR filter and can completely confuse normal AWB presets. @@ -139664,10 +139664,10 @@ index 1793103b18fd..27bafc5f01d2 100644 2.18.4 -From e3e86fccea39886c82be33046ae40d674361121e Mon Sep 17 00:00:00 2001 +From df50164310e15efb0efee801bdcb12dcb865e7e7 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 18 Sep 2019 17:22:36 +0100 -Subject: [PATCH 166/580] drm/v3d: Delete pm_runtime support +Subject: [PATCH 166/661] drm/v3d: Delete pm_runtime support The pm_runtime was blocking changelist submission, so delete it as a temporary workaround. @@ -139734,10 +139734,10 @@ index 8986e7b96461..618503f2f2f1 100644 2.18.4 -From fc96b433e4891541cae9f944e24e701571ac2632 Mon Sep 17 00:00:00 2001 +From 928da51deeeba38358ddf39e033397aefb679398 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 23 Sep 2019 09:26:41 +0100 -Subject: [PATCH 167/580] kbuild: Allow .dtbo overlays to be built piecemeal +Subject: [PATCH 167/661] kbuild: Allow .dtbo overlays to be built piecemeal Before 4.20, it was possible to build an arbitrary overlay by copying it to arm/boot/dts/overlays/mytest-overlay.dts and running: @@ -139759,7 +139759,7 @@ Signed-off-by: Phil Elwell 1 file changed, 3 insertions(+) diff --git a/Makefile b/Makefile -index 1d4a50ebe3b7..eef742a97205 100644 +index fd5c8b5c013b..3f857f7615ae 100644 --- a/Makefile +++ b/Makefile @@ -1353,6 +1353,9 @@ ifneq ($(dtstree),) @@ -139776,10 +139776,10 @@ index 1d4a50ebe3b7..eef742a97205 100644 2.18.4 -From 20bb4b7b6f26166809d2496d9d9d68027af0730a Mon Sep 17 00:00:00 2001 +From 4f58f212c7c3158dab5383bbbdd84c4e2fcfd189 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Thu, 19 Sep 2019 20:45:30 +0200 -Subject: [PATCH 168/580] ARM: bcm: Switch board, clk and pinctrl to bcm2711 +Subject: [PATCH 168/661] ARM: bcm: Switch board, clk and pinctrl to bcm2711 compatible After the decision to use bcm2711 compatible for upstream, we should @@ -139808,10 +139808,10 @@ index 282a023027fc..e538e0f899a5 100644 2.18.4 -From bda93e70b90e3e0fe9f9a1c1810b6afd881f5dc8 Mon Sep 17 00:00:00 2001 +From f3596a87ac8bfed81bcc97b8d58c3f590e58725b Mon Sep 17 00:00:00 2001 From: James Hughes Date: Tue, 24 Sep 2019 18:26:55 +0100 -Subject: [PATCH 169/580] Rename HDMI ALSA device names, check for enable state +Subject: [PATCH 169/661] Rename HDMI ALSA device names, check for enable state HDMI Alsa devices renamed to match names used by DRM, to HDMI 1 and HDMI 2 @@ -139953,10 +139953,10 @@ index eb8a8a5b7ec8..f926784c622d 100644 2.18.4 -From b682e623655dd75f9dd9364075ff4a3a2b496221 Mon Sep 17 00:00:00 2001 +From 8732fafcbe83021d570a86c8e3086a8d432f72f8 Mon Sep 17 00:00:00 2001 From: Markus Proeller Date: Thu, 10 Oct 2019 19:12:08 +0200 -Subject: [PATCH 170/580] dt-bindings: Add binding for the Infineon IRS1125 +Subject: [PATCH 170/661] dt-bindings: Add binding for the Infineon IRS1125 sensor Adds a binding for the Infineon IRS1125 time-of-flight depth @@ -140026,10 +140026,10 @@ index 000000000000..25a48028c957 2.18.4 -From f01cdaa606eabcfb098df53312e345a2ff38eae7 Mon Sep 17 00:00:00 2001 +From 0ea6abe9251b65ec77126690fb6b80be90932c91 Mon Sep 17 00:00:00 2001 From: Markus Proeller Date: Thu, 10 Oct 2019 19:12:36 +0200 -Subject: [PATCH 171/580] media: i2c: Add a driver for the Infineon IRS1125 +Subject: [PATCH 171/661] media: i2c: Add a driver for the Infineon IRS1125 depth sensor The Infineon IRS1125 is a time of flight depth sensor that @@ -141271,10 +141271,10 @@ index 000000000000..dccaca23aa76 2.18.4 -From c9bfdfe2f85360975cc261535415b9d63b45a18b Mon Sep 17 00:00:00 2001 +From 907ddc076fef420080b8b64a3453281af0026538 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 11 Nov 2019 14:01:41 +0000 -Subject: [PATCH 172/580] drm/v3d: Don't clear MMU control bits on exception +Subject: [PATCH 172/661] drm/v3d: Don't clear MMU control bits on exception MMU exception conditions are reported in the V3D_MMU_CTRL register as write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any @@ -141311,10 +141311,10 @@ index c88686489b88..b804783e2795 100644 2.18.4 -From efbb73d1b2cbdaf1cb03c9fcbf00c95c8d4b968d Mon Sep 17 00:00:00 2001 +From 098d62153613f43fc6d9421da2f7f7f58f38a72b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 11 Nov 2019 20:18:08 +0000 -Subject: [PATCH 173/580] drm/v3d: Suppress all but the first MMU error +Subject: [PATCH 173/661] drm/v3d: Suppress all but the first MMU error The v3d driver currently encounters a lot of MMU PTE exceptions, so only log the first to avoid swamping the kernel log. @@ -141356,10 +141356,10 @@ index b804783e2795..063418907a19 100644 2.18.4 -From f127498b2f3a313478478b45be3a7fe538e05e89 Mon Sep 17 00:00:00 2001 +From d74948a67acd41a3e5b59624bf7d4c0616c06f95 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 12 Nov 2019 16:41:21 +0000 -Subject: [PATCH 174/580] drm/v3d: Plug dma_fence leak +Subject: [PATCH 174/661] drm/v3d: Plug dma_fence leak The irq_fence and done_fence are given a reference that is never released. The necessary dma_fence_put()s seem to have been @@ -141390,10 +141390,10 @@ index 49c7920608e2..bfbe33a9492d 100644 2.18.4 -From 3044bd10b7f2b0a702ea5f5a332f5e703ac08756 Mon Sep 17 00:00:00 2001 +From 24d4b639c24bc92a0d90dff7c9dac176c813f4aa Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 Nov 2019 13:57:48 +0000 -Subject: [PATCH 175/580] staging: vchiq_arm: Register vcsm-cma as a platform +Subject: [PATCH 175/661] staging: vchiq_arm: Register vcsm-cma as a platform driver Following the same pattern as bcm2835-camera and bcm2835-audio, @@ -141436,10 +141436,10 @@ index b8579af3948c..5d4b976820fa 100644 2.18.4 -From 70da7e166de65d9d84861a0176b42fb170aec7f4 Mon Sep 17 00:00:00 2001 +From 9519bec20f68ea1745034d23e891e7e5e7d36a54 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 Nov 2019 13:57:58 +0000 -Subject: [PATCH 176/580] staging: vchiq_arm: Register bcm2835-codec as a +Subject: [PATCH 176/661] staging: vchiq_arm: Register bcm2835-codec as a platform driver Following the same pattern as bcm2835-camera and bcm2835-audio, @@ -141482,10 +141482,10 @@ index 5d4b976820fa..3bbe533007e5 100644 2.18.4 -From 08bb8415da344fe099ff6038ac7721e627be29f4 Mon Sep 17 00:00:00 2001 +From aaf961fbfc680e04fd669384c9347433a5535211 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 14 Nov 2019 11:59:01 +0000 -Subject: [PATCH 177/580] net: bcmgenet: The second IRQ is optional +Subject: [PATCH 177/661] net: bcmgenet: The second IRQ is optional As of 5.4, the kernel logs errors for absent IRQs unless requested with platform_get_irq_optional. @@ -141512,10 +141512,10 @@ index 063418907a19..0f7a23f051df 100644 2.18.4 -From c8acf863cdd9d87efcbf099e1ba06d74bb50300c Mon Sep 17 00:00:00 2001 +From 5cf9e4ec540380b39d8440d0661c88b67d002b17 Mon Sep 17 00:00:00 2001 From: James Hughes Date: Thu, 31 Oct 2019 14:39:44 +0000 -Subject: [PATCH 178/580] net:phy:2711 Allow ethernet LED mode to be set via +Subject: [PATCH 178/661] net:phy:2711 Allow ethernet LED mode to be set via device tree Add device tree entries and code to allow the specification of @@ -141564,10 +141564,10 @@ index dbed15dc0fe7..10d70bde381c 100644 2.18.4 -From 981d9ec5f86cb89f0038885e72f8e402daf91329 Mon Sep 17 00:00:00 2001 +From 65f828f3f0409c7d674c36905a06bce8ba85cf85 Mon Sep 17 00:00:00 2001 From: James Hughes Date: Thu, 7 Nov 2019 14:59:59 +0000 -Subject: [PATCH 179/580] net:phy:2711 Change the default ethernet LED actions +Subject: [PATCH 179/661] net:phy:2711 Change the default ethernet LED actions This should return default behaviour back to that of previous releases. @@ -141603,10 +141603,10 @@ index 10d70bde381c..6de9b072b6b9 100644 2.18.4 -From a95cf65f854db521b74e94c5c2d37e1736a92279 Mon Sep 17 00:00:00 2001 +From d9a3728376a9c08a031394c58804c3d1db4be60e Mon Sep 17 00:00:00 2001 From: popcornmix Date: Fri, 23 Aug 2019 16:34:38 +0100 -Subject: [PATCH 180/580] v3d_drv: Handle missing clock more gracefully +Subject: [PATCH 180/661] v3d_drv: Handle missing clock more gracefully Signed-off-by: popcornmix --- @@ -141636,10 +141636,10 @@ index 065fb20cc4a8..bfbea29c6c1f 100644 2.18.4 -From 28328ade927c073dfe2e4b6769289a2f69ac9fb6 Mon Sep 17 00:00:00 2001 +From 7fb434676f33da110185b03c64cfa302c6c4cf59 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Thu, 5 Sep 2019 17:59:14 +0100 -Subject: [PATCH 181/580] v3d_gem: Kick the clock so firmware knows we are +Subject: [PATCH 181/661] v3d_gem: Kick the clock so firmware knows we are using firmware clock interface Setting the v3d clock to low value allows firmware to handle dvfs in case @@ -141669,10 +141669,10 @@ index bfbe33a9492d..b4fb899a9409 100644 2.18.4 -From ae33c3c90ff19da2df0d4bb2ffba3477fc4044e2 Mon Sep 17 00:00:00 2001 +From a3749ff875125cc25996aefc931f8ab83cf864c0 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 9 Sep 2019 15:49:56 +0100 -Subject: [PATCH 182/580] clk-raspberrypi: Allow cpufreq driver to also adjust +Subject: [PATCH 182/661] clk-raspberrypi: Allow cpufreq driver to also adjust gpu clocks For performance/power it is beneficial to adjust gpu clocks with arm clock. @@ -141700,10 +141700,10 @@ index f89b9cfc4309..f4884a5b598a 100644 2.18.4 -From ca3bc34fece40d97c5cee3afe5e2db6225948224 Mon Sep 17 00:00:00 2001 +From 04a666cf18eadf39790696584876599bd0b4738c Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 3 Sep 2019 20:28:00 +0100 -Subject: [PATCH 183/580] clk-bcm2835: Disable v3d clock +Subject: [PATCH 183/661] clk-bcm2835: Disable v3d clock This is controlled by firmware, see clk-raspberrypi.c @@ -141764,10 +141764,10 @@ index d686c51a68a9..84f24244d1b5 100644 2.18.4 -From c5634574eea5203ad85eeaacba4013be26566f5d Mon Sep 17 00:00:00 2001 +From 5a372e8f5e1e93b6373faa53bda2c61372bbe900 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 22 Nov 2019 16:23:32 +0000 -Subject: [PATCH 184/580] drm/v3d: Set dma_mask as well as coherent_dma_mask +Subject: [PATCH 184/661] drm/v3d: Set dma_mask as well as coherent_dma_mask Both coherent_dma_mask and dma_mask act as constraints on allocations and bounce buffer usage, so be sure to set dma_mask to the appropriate @@ -141797,10 +141797,10 @@ index bfbea29c6c1f..3237f47a4792 100644 2.18.4 -From 46983e4c182ad3a90f47c6ace7918b3892c9b07a Mon Sep 17 00:00:00 2001 +From b8be5f6c9f4aaab5fccccabd7d7b3be586590b2e Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 29 Jan 2019 16:13:25 +0000 -Subject: [PATCH 185/580] staging: vchiq_arm: Set up dma ranges on child +Subject: [PATCH 185/661] staging: vchiq_arm: Set up dma ranges on child devices The VCHIQ driver now loads the audio, camera, codec, and vc-sm @@ -141836,10 +141836,10 @@ index 3bbe533007e5..ed6c1747be64 100644 2.18.4 -From 0eb419263d301d71cef6c00c6ec79b2bea27edf9 Mon Sep 17 00:00:00 2001 +From 5bd2ccb7880cb0191c83861347cb24c954062268 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 18 Jun 2019 12:15:50 +0100 -Subject: [PATCH 186/580] staging: vchiq: Use the old dma controller for OF +Subject: [PATCH 186/661] staging: vchiq: Use the old dma controller for OF config on platform devices vchiq on Pi4 is no longer under the soc node, therefore it @@ -141893,10 +141893,10 @@ index ed6c1747be64..5e704b366676 100644 2.18.4 -From 72b6d8514db7a23f6f15e200aa67486abc55dbe2 Mon Sep 17 00:00:00 2001 +From fcb09cfc820c1d97730664eba3b0938e4bf80d66 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Fri, 27 Dec 2019 11:40:56 +0100 -Subject: [PATCH 187/580] ARM: bcm: Backport BCM2711 support from upstream +Subject: [PATCH 187/661] ARM: bcm: Backport BCM2711 support from upstream Make the BCM2711 a different machine, but keep it in board_bcm2835. @@ -141946,10 +141946,10 @@ index e538e0f899a5..91a758c61f48 100644 2.18.4 -From ce5b590af1676510c306d0193200e854265ebc1d Mon Sep 17 00:00:00 2001 +From 93aa75b2d62fa28e23940c34857d066e85c9e4c8 Mon Sep 17 00:00:00 2001 From: Luke Hinds <7058938+lukehinds@users.noreply.github.com> Date: Wed, 22 Jan 2020 16:03:00 +0000 -Subject: [PATCH 188/580] Initialise rpi-firmware before clk-bcm2835 +Subject: [PATCH 188/661] Initialise rpi-firmware before clk-bcm2835 The IMA (Integrity Measurement Architecture) looks for a TPM (Trusted Platform Module) having been registered when it initialises; otherwise @@ -142001,10 +142001,10 @@ index e7df000f8b2c..8da5be17b906 100644 2.18.4 -From 4b6d9e4083adf3f13602cc1b4897f2cefc6af737 Mon Sep 17 00:00:00 2001 +From 65ed0af31a71af3a23db04df6140ca1e7a268ce2 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 3 Feb 2020 17:30:46 +0000 -Subject: [PATCH 189/580] staging: vchiq_arm: Give vchiq children DT nodes +Subject: [PATCH 189/661] staging: vchiq_arm: Give vchiq children DT nodes vchiq kernel clients are now instantiated as platform drivers rather than using DT, but the children of the vchiq interface may still @@ -142046,10 +142046,10 @@ index 5e704b366676..8d518bd9a6cd 100644 2.18.4 -From f2499b0b2d9f7d17bf5e6d5d3277b4bbce15bef6 Mon Sep 17 00:00:00 2001 +From 904e5aa4c3188dcd6068d506499c2f1536eafdb6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 6 Jan 2020 16:04:30 +0000 -Subject: [PATCH 190/580] pinctrl: bcm2835: Remove gpiochip on error +Subject: [PATCH 190/661] pinctrl: bcm2835: Remove gpiochip on error A failure in gpiochip_irqchip_add leads to a leak of a gpiochip. Fix the leak with the use of devm_gpiochip_add_data. @@ -142077,10 +142077,10 @@ index bbf761c41dc5..2696029e1689 100644 2.18.4 -From e7a171f41668719bc395ab5c1db276ff9d8f10b3 Mon Sep 17 00:00:00 2001 +From bb7733d4276ac5110a15fdd501b42bc415a48a0b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 6 Jan 2020 14:05:42 +0000 -Subject: [PATCH 191/580] pinctrl: bcm2835: Change init order for gpio hogs +Subject: [PATCH 191/661] pinctrl: bcm2835: Change init order for gpio hogs pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio side is registered first, but this breaks gpio hogs (which are @@ -142161,10 +142161,10 @@ index 2696029e1689..edb3a863871d 100644 2.18.4 -From 84045e8fa9e850d5f34cdb589eafd1487255ac15 Mon Sep 17 00:00:00 2001 +From c89f5de219d3a0f54b8655f5a56ff4e737e481f1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 25 Feb 2020 17:38:20 +0000 -Subject: [PATCH 192/580] pinctrl: bcm2835: Accept fewer than expected IRQs +Subject: [PATCH 192/661] pinctrl: bcm2835: Accept fewer than expected IRQs The downstream .dts files only request two GPIO IRQs. Truncate the array of parent IRQs when irq_of_parse_and_map returns 0. @@ -142198,10 +142198,10 @@ index edb3a863871d..bda29f421e78 100644 2.18.4 -From a17869a5cc08e3bd00cb1ca31a9d1664d9158bc6 Mon Sep 17 00:00:00 2001 +From 53b054d1bf51dcc1f6511f3c07a67e3c24214988 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 2 Mar 2020 14:40:19 +0000 -Subject: [PATCH 193/580] drivers: char: vcio: Use common compat header +Subject: [PATCH 193/661] drivers: char: vcio: Use common compat header The definition of compat_ptr is now common for most platforms, but requires the inclusion of . @@ -142227,10 +142227,10 @@ index d2598663a2b5..a39155a94fb7 100644 2.18.4 -From 05492930517be7b8a9029b9b2ce2fc456467989e Mon Sep 17 00:00:00 2001 +From b556156adc9c21ccae0e28d02eb16bfd2ecc2b43 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 2 Mar 2020 14:42:23 +0000 -Subject: [PATCH 194/580] video: fbdev: bcm2708_fb: Use common compat header +Subject: [PATCH 194/661] video: fbdev: bcm2708_fb: Use common compat header The definition of compat_ptr is now common for most platforms, but requires the inclusion of . @@ -142256,10 +142256,10 @@ index 0e9ec3f593b8..17e9260655e4 100644 2.18.4 -From cc2c293801352cdfc897333ea01a66b57be213e2 Mon Sep 17 00:00:00 2001 +From 0febefac2b5d263b6d1efcb216e8c5aaeb4e3114 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 6 Feb 2020 12:23:15 +0000 -Subject: [PATCH 195/580] of: overlay: Correct symbol path fixups +Subject: [PATCH 195/661] of: overlay: Correct symbol path fixups When symbols from overlays are added to the live tree their paths must be rebased. The translated symbol is normally the result of joining @@ -142299,10 +142299,10 @@ index 50bbe0edf538..7e585d201ba0 100644 2.18.4 -From 30c193fb88033e9d846f545bf31a0400870faa55 Mon Sep 17 00:00:00 2001 +From 9b0da362c293203d219e32583e5e1f062bdd6b75 Mon Sep 17 00:00:00 2001 From: Jim Quinlan Date: Mon, 15 Jan 2018 18:28:39 -0500 -Subject: [PATCH 196/580] dt-bindings: pci: Add DT docs for Brcmstb PCIe device +Subject: [PATCH 196/661] dt-bindings: pci: Add DT docs for Brcmstb PCIe device The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using @@ -142383,10 +142383,10 @@ index 000000000000..a1a9ad5e70ca 2.18.4 -From 651a922db5aec50d610f0c6879b98aa54585ad00 Mon Sep 17 00:00:00 2001 +From 5c6ac96f33566ce54eb160bca9b5b49ed0ac23f0 Mon Sep 17 00:00:00 2001 From: Nataliya Korovkina Date: Thu, 12 Mar 2020 17:22:53 -0400 -Subject: [PATCH 197/580] Kbuild: Allow .dtbo overlays to be built, adjust. +Subject: [PATCH 197/661] Kbuild: Allow .dtbo overlays to be built, adjust. This is adjustment to commit d368ceaacdccd7732dc97d1d7987bdf7149d62e3 "kbuild: Allow .dtbo overlays to be built piecemeal" @@ -142399,7 +142399,7 @@ Signed-off-by: Nataliya Korovkina 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile -index eef742a97205..89704cbfa616 100644 +index 3f857f7615ae..59b06068330a 100644 --- a/Makefile +++ b/Makefile @@ -1353,7 +1353,7 @@ ifneq ($(dtstree),) @@ -142415,10 +142415,10 @@ index eef742a97205..89704cbfa616 100644 2.18.4 -From 38a67590d57fd5da1766ae9315516be22d7e7d0c Mon Sep 17 00:00:00 2001 +From 0deb873ccafe51969dd9915757c9b76820ab1ec1 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 1 Apr 2020 11:22:44 +0100 -Subject: [PATCH 198/580] bcmgenet: Disable skip_umac_reset by default +Subject: [PATCH 198/661] bcmgenet: Disable skip_umac_reset by default Possible fixed upstream by 'net: bcmgenet: keep MAC in reset until PHY is up' @@ -142444,10 +142444,10 @@ index 8336558e4738..ae7011c1e1f7 100644 2.18.4 -From 8dd6aec7323559d06d8110048db96165a0c50ef4 Mon Sep 17 00:00:00 2001 +From 87ddc02e0c949b7d8aa04fa7185fcc98ecba8225 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 24 Jan 2020 14:22:06 +0000 -Subject: [PATCH 199/580] drm/fourcc: Add packed 10bit YUV 4:2:0 format +Subject: [PATCH 199/661] drm/fourcc: Add packed 10bit YUV 4:2:0 format Adds a format that is 3 10bit YUV 4:2:0 samples packed into a 32bit work (with 2 spare bits). @@ -142507,10 +142507,10 @@ index 5498d7a6556a..3aeab2680295 100644 2.18.4 -From 4c2328301e90a221aa8fbd3165cbe4f7d0af562a Mon Sep 17 00:00:00 2001 +From 379fa40727c5a755bf9ba8643ce61be52dd69490 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Fri, 13 Dec 2019 17:04:25 +0100 -Subject: [PATCH 200/580] media: uapi: hevc: Add scaling matrix control +Subject: [PATCH 200/661] media: uapi: hevc: Add scaling matrix control Taken from https://patchwork.linuxtv.org/patch/60728/ Changes (mainly documentation) have been requested. @@ -142669,10 +142669,10 @@ index 1009cf0891cc..1592e52c3614 100644 2.18.4 -From e61f82a6779c3fbfd0c1fc1a2f869939c859172b Mon Sep 17 00:00:00 2001 +From 32cbe72e86eba60ecb525bdf630b3f65f8dbe412 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Fri, 13 Dec 2019 17:04:27 +0100 -Subject: [PATCH 201/580] media: uapi: hevc: Add segment address field +Subject: [PATCH 201/661] media: uapi: hevc: Add segment address field From https://patchwork.linuxtv.org/patch/60725/ Changes requested, but mainly docs. @@ -142738,10 +142738,10 @@ index 1592e52c3614..3e2e32098312 100644 2.18.4 -From ba7e2a7f524d19b886150c4fccbc6de365d52b5d Mon Sep 17 00:00:00 2001 +From 7f67985618821ea0cd31180be1ff61d52f10b0dd Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 23 Mar 2020 18:34:01 +0000 -Subject: [PATCH 202/580] media: hevc_ctrls: Add slice param dependent slice +Subject: [PATCH 202/661] media: hevc_ctrls: Add slice param dependent slice segment Adds V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT define. @@ -142767,10 +142767,10 @@ index 3e2e32098312..0ba7735465a2 100644 2.18.4 -From 6ccf9341b89de1c7b2bbda6d845e30cbbcc16d3e Mon Sep 17 00:00:00 2001 +From 018cc19ff37f39cda511334001ffa3ccd6e0fe9e Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 23 Mar 2020 19:00:17 +0000 -Subject: [PATCH 203/580] media: uapi: Add hevc ctrls for WPP decoding +Subject: [PATCH 203/661] media: uapi: Add hevc ctrls for WPP decoding WPP can allow greater parallelism within the decode, but needs offset information to be passed in. @@ -142813,10 +142813,10 @@ index 0ba7735465a2..9c976b3cf092 100644 2.18.4 -From d80517027e11ecc633e2f5cfc0f27c1c3756a20d Mon Sep 17 00:00:00 2001 +From 675c379c56654389841c00dcd273af45edb471f3 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 24 Jan 2020 14:28:21 +0000 -Subject: [PATCH 204/580] media: videodev2.h: Add a format for column YUV4:2:0 +Subject: [PATCH 204/661] media: videodev2.h: Add a format for column YUV4:2:0 modes Some of the Broadcom codec blocks use a column based YUV4:2:0 image @@ -143130,10 +143130,10 @@ index 56c443cc2c3d..568801746d2d 100644 2.18.4 -From d95044151026cd57ce7caae6354cfd72db4d973f Mon Sep 17 00:00:00 2001 +From b8a6cf793b3852d95f8a840aaca464fedd5d1242 Mon Sep 17 00:00:00 2001 From: John Cox Date: Thu, 5 Mar 2020 14:46:54 +0000 -Subject: [PATCH 205/580] media: v4l2-mem2mem: allow request job buffer +Subject: [PATCH 205/661] media: v4l2-mem2mem: allow request job buffer processing after job finish Allow the capture buffer to be detached from a v4l2 request job such @@ -143412,10 +143412,10 @@ index c203047eb834..260593fffbc8 100644 2.18.4 -From 4433c91a789ae98029cb78bbfdf3303ca9ed721f Mon Sep 17 00:00:00 2001 +From 2db18e5714a066f27693ddfced6ab59487124efe Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 17 Mar 2020 10:53:16 +0000 -Subject: [PATCH 206/580] media: dt-bindings: media: Add binding for the +Subject: [PATCH 206/661] media: dt-bindings: media: Add binding for the Raspberry PI HEVC decoder Adds a binding for the HEVC decoder found on the BCM2711 / Raspberry Pi 4. @@ -143527,10 +143527,10 @@ index 4b0478749279..da6f87b1f53e 100644 2.18.4 -From d2b720aa8489364662d57fa3b92d937a8fc4b4fe Mon Sep 17 00:00:00 2001 +From 52579dde542e217ab0588463b424187ed6a72b06 Mon Sep 17 00:00:00 2001 From: John Cox Date: Thu, 5 Mar 2020 18:30:41 +0000 -Subject: [PATCH 207/580] staging: media: Add Raspberry Pi V4L2 H265 decoder +Subject: [PATCH 207/661] staging: media: Add Raspberry Pi V4L2 H265 decoder This driver is for the HEVC/H265 decoder block on the Raspberry Pi 4, and conforms to the V4L2 stateless decoder API. @@ -147909,10 +147909,10 @@ index 000000000000..9c4f3fb2f9f6 2.18.4 -From 0475f96eb5a0ea52c66e8a24e36219542c5b0197 Mon Sep 17 00:00:00 2001 +From 14d1a4462e67541d423ea5a00f8c1c6d806a1a96 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 6 Dec 2019 13:05:27 +0100 -Subject: [PATCH 208/580] mmc: sdhci: Silence MMC warnings +Subject: [PATCH 208/661] mmc: sdhci: Silence MMC warnings When the MMC isn't plugged in, the driver will spam the console which is pretty annoying when using NFS. @@ -147957,10 +147957,10 @@ index 6edf9fffd934..a72823b45f77 100644 2.18.4 -From f0f8462fe2c51fbdc4509dd00a1e17a6bf9b7e1e Mon Sep 17 00:00:00 2001 +From 215dba7630412398498373a2666f9521570c277b Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 13 Feb 2020 17:51:09 +0100 -Subject: [PATCH 209/580] dt-bindings: clock: Add a binding for the RPi +Subject: [PATCH 209/661] dt-bindings: clock: Add a binding for the RPi Firmware clocks The firmare running on the RPi VideoCore can be used to discover and @@ -148027,10 +148027,10 @@ index 000000000000..d37bc311321d 2.18.4 -From eddbfbb7981968d8aa876bbbea987fac6f891f90 Mon Sep 17 00:00:00 2001 +From 1cd2409f00292f09a8a5223f7751f9faecfbd51e Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 13 Feb 2020 16:45:24 +0100 -Subject: [PATCH 210/580] dt-bindings: display: vc4: hdmi: Add BCM2711 HDMI +Subject: [PATCH 210/661] dt-bindings: display: vc4: hdmi: Add BCM2711 HDMI controllers bindings The HDMI controllers found in the BCM2711 SoC need some adjustments to the @@ -148207,10 +148207,10 @@ index f54b4e4808f0..899d8cfa1731 100644 2.18.4 -From 671539b89ae8fb86b7475c5a93799555d8b708db Mon Sep 17 00:00:00 2001 +From bb4e56123f9d31a3b0fe10cf56f22b00214dd449 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 27 Jan 2020 10:22:44 +0000 -Subject: [PATCH 211/580] drm: Checking of the pitch is only valid for linear +Subject: [PATCH 211/661] drm: Checking of the pitch is only valid for linear formats framebuffer_check was computing a minimum pitch value and ensuring @@ -148253,10 +148253,10 @@ index 2f5b0c2bb0fe..89ced6af9c5c 100644 2.18.4 -From 6c626d65495fbead6a42e98f6881bd49e6c67305 Mon Sep 17 00:00:00 2001 +From 9a5cb13970802bec2cba74fe4a027226935700ab Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 8 Apr 2020 11:59:39 +0100 -Subject: [PATCH 212/580] overlays: Fix dtc warnings in i2c-gpio +Subject: [PATCH 212/661] overlays: Fix dtc warnings in i2c-gpio Better late than never. @@ -148283,10 +148283,10 @@ index 63231b5d7c0c..2323a61edf07 100644 2.18.4 -From 45cfa1b96ec1bca6d6e190e08564a3f02638d3ab Mon Sep 17 00:00:00 2001 +From 4bc791120920fbefdefebcf85d66eb1432fc329f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 20 Apr 2020 22:18:52 +0100 -Subject: [PATCH 213/580] driver: char: rpivid: Remove legacy name support +Subject: [PATCH 213/661] driver: char: rpivid: Remove legacy name support Signed-off-by: Phil Elwell --- @@ -148342,10 +148342,10 @@ index fbf3d4f3fe0c..5f4c91924ec1 100644 2.18.4 -From 6c794a50f3488185c0d4dba805f29607da146294 Mon Sep 17 00:00:00 2001 +From ba587dc09a368855be89a53ea14ddc38610443e5 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 17 Apr 2020 10:46:19 +0100 -Subject: [PATCH 214/580] spi: Force CS_HIGH if GPIO descriptors are used +Subject: [PATCH 214/661] spi: Force CS_HIGH if GPIO descriptors are used Commit f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs") amended of_spi_parse_dt() to always set SPI_CS_HIGH for SPI slaves whose @@ -148405,10 +148405,10 @@ index 4257a2d368f7..8b283b2c1668 100644 2.18.4 -From 7286b73d08e2d50ff3a0895903399cc932398d0a Mon Sep 17 00:00:00 2001 +From 98401632df75084a044600ce6e50c011b49f89b6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 21 Apr 2020 11:30:23 +0100 -Subject: [PATCH 215/580] driver: char: rpivid: Don't map more than wanted +Subject: [PATCH 215/661] driver: char: rpivid: Don't map more than wanted Limit mappings to the permitted range, but don't map more than asked for otherwise we walk off the end of the allocated VMA. @@ -148462,10 +148462,10 @@ index 5f4c91924ec1..9f38083f4cb6 100644 2.18.4 -From f6216d068d176689506ef0cdf85d6c184e682523 Mon Sep 17 00:00:00 2001 +From 6b22b62c61bdfcb72ec7e3db784e3c83fbb3c59b Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 1 Apr 2020 08:39:49 +0100 -Subject: [PATCH 216/580] media: bcm2835-unicam: Driver for CCP2/CSI2 camera +Subject: [PATCH 216/661] media: bcm2835-unicam: Driver for CCP2/CSI2 camera interface Add driver for the Unicam camera receiver block on @@ -151193,10 +151193,10 @@ index 000000000000..ae059a171d0f 2.18.4 -From 7896e40ca1fc14c873e585593a1397a8391a86bd Mon Sep 17 00:00:00 2001 +From 05d4e3577c57abc3d8c869e99488d3edf5a27c4f Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 1 Apr 2020 08:46:29 +0100 -Subject: [PATCH 217/580] media: uapi: v4l2-core: Add sensor ancillary data +Subject: [PATCH 217/661] media: uapi: v4l2-core: Add sensor ancillary data V4L2 foucc type. Add V4L2_META_FMT_SENSOR_DATA format 4CC. @@ -151291,10 +151291,10 @@ index 568801746d2d..d93d5bb7059b 100644 2.18.4 -From 4721fae8bb2b6bc1df84d0a7c1739f56f519d26f Mon Sep 17 00:00:00 2001 +From 8f404b25ec74bb18cb03b95ffc6deae650980bdd Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Tue, 21 Jan 2020 14:06:47 +0000 -Subject: [PATCH 218/580] media: uapi: Add MEDIA_BUS_FMT_SENSOR_DATA media bus +Subject: [PATCH 218/661] media: uapi: Add MEDIA_BUS_FMT_SENSOR_DATA media bus format This patch adds MEDIA_BUS_FMT_SENSOR_DATA used by the bcm2835-unicam @@ -151363,10 +151363,10 @@ index 84fa53ffb13f..3c2848e91c1b 100644 2.18.4 -From 38b2d0f5d317c58fc6c3fa34a82df8cee7139326 Mon Sep 17 00:00:00 2001 +From 8323aaed598ef2ec0b83429f9c8f45c6214bde0e Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Tue, 7 Apr 2020 10:42:14 +0100 -Subject: [PATCH 219/580] media: bcm2835-unicam: Add support for mulitple +Subject: [PATCH 219/661] media: bcm2835-unicam: Add support for mulitple device nodes. Move device node specific state out of the device state structure and @@ -152452,10 +152452,10 @@ index 9da9f22c3db5..b34551a3f44b 100644 2.18.4 -From 0704162750d23ff6164d0255f951996951bfb240 Mon Sep 17 00:00:00 2001 +From 8149f09361a999aebefb37758193695ab1170037 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 16 Apr 2020 11:35:41 +0100 -Subject: [PATCH 220/580] media: bcm2835-unicam: Add embedded data node. +Subject: [PATCH 220/661] media: bcm2835-unicam: Add embedded data node. This patch adds a new node in the bcm2835-unicam driver to support CSI-2 embedded data streams. The subdevice is queried to see if @@ -153626,10 +153626,10 @@ index b34551a3f44b..d5e0f70b600c 100644 2.18.4 -From 63f58acb101a72630142130a64589a8304088a6b Mon Sep 17 00:00:00 2001 +From e3cecc4a319d81a31edd2da9eda83c6457694eec Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 2 Apr 2020 16:08:51 +0100 -Subject: [PATCH 221/580] media: bcm2835-unicam: Use dummy buffer if none have +Subject: [PATCH 221/661] media: bcm2835-unicam: Use dummy buffer if none have been queued If no buffer has been queued by a userland application, we use an @@ -153940,10 +153940,10 @@ index d5e0f70b600c..933f1ba49e3d 100644 2.18.4 -From 533cce077225d65a07ff9745dc376ebc0ef64cc0 Mon Sep 17 00:00:00 2001 +From d3c0678f353bb1af68721d22c569b9e8a8d7d3d9 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 24 Mar 2020 23:13:02 +0200 -Subject: [PATCH 222/580] media: bcm2835-unicam: Disable event-related ioctls +Subject: [PATCH 222/661] media: bcm2835-unicam: Disable event-related ioctls on metadata node The unicam driver supports both the SOURCE_CHANGE and CTRL events. Both @@ -153977,10 +153977,10 @@ index 933f1ba49e3d..2d4c7a247fc5 100644 2.18.4 -From 8715a80319e3f60d5ad37afad998dae98181b39c Mon Sep 17 00:00:00 2001 +From 8eab2602b59585756deadcf6af85fdbfa253be8f Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 24 Mar 2020 23:13:02 +0200 -Subject: [PATCH 223/580] media: bcm2835-unicam: Add support for the FRAME_SYNC +Subject: [PATCH 223/661] media: bcm2835-unicam: Add support for the FRAME_SYNC event The FRAME_SYNC event is useful for userspace image processing algorithms @@ -154038,10 +154038,10 @@ index 2d4c7a247fc5..21d3a8585118 100644 2.18.4 -From bcb65761e4902319acddbec2308434ed31dbc847 Mon Sep 17 00:00:00 2001 +From 288b6de4030dddb6377061a8af27a02c542ade78 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 12 Mar 2020 14:09:38 +0000 -Subject: [PATCH 224/580] media: imx219: Advertise embedded data node on media +Subject: [PATCH 224/661] media: imx219: Advertise embedded data node on media pad 1 This commit updates the imx219 driver to adverise support for embedded @@ -154380,10 +154380,10 @@ index 0ae66091a696..aec43b602649 100644 2.18.4 -From e2525b88de132112f19dc03d33059bf12d9f6270 Mon Sep 17 00:00:00 2001 +From 7d45f7bc8c6b2942d37e073fb109e436ed7e0345 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Tue, 21 Apr 2020 16:26:03 +0100 -Subject: [PATCH 225/580] media: bcm2835-unicam: Re-fetch mbus code from subdev +Subject: [PATCH 225/661] media: bcm2835-unicam: Re-fetch mbus code from subdev on a g_fmt call The sensor subdevice may change the Bayer order if a H/V flip is @@ -154435,10 +154435,10 @@ index 21d3a8585118..d4684fb2797f 100644 2.18.4 -From 3fac263f188914d6f4fdb5f95a3c9468d963f16e Mon Sep 17 00:00:00 2001 +From 76c1c41b0931fb71a69cb4e894900b7f35bd7f6a Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 23 Apr 2020 10:20:26 +0100 -Subject: [PATCH 226/580] media: uapi: v4l2-core: Add ISP statistics output +Subject: [PATCH 226/661] media: uapi: v4l2-core: Add ISP statistics output V4L2 fourcc type Add V4L2_META_FMT_BCM2835_ISP_STATS V4L2 format type. @@ -154542,10 +154542,10 @@ index d93d5bb7059b..e9fbb04a3519 100644 2.18.4 -From 52aa78739205acc554d95887e60fb4ad1b1ac8dd Mon Sep 17 00:00:00 2001 +From 226b50fb93d5284fc0851efb84e404a8ad7b873c Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Tue, 21 Apr 2020 15:06:19 +0100 -Subject: [PATCH 227/580] media: uapi: v4l-ctrls: Add CID base for the +Subject: [PATCH 227/661] media: uapi: v4l-ctrls: Add CID base for the bcm2835-isp driver We are reserving controls for the new bcm2835-isp driver. @@ -154722,10 +154722,10 @@ index fbe96b80a748..0b8ae128b961 100644 2.18.4 -From 533f6b0976b992ca771a30df017544cc35282136 Mon Sep 17 00:00:00 2001 +From 076c6262697e719e0dead50df3e7a7ee9a6001fd Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 22 Apr 2020 08:32:32 +0100 -Subject: [PATCH 228/580] staging: vchiq: Load bcm2835_isp driver from vchiq +Subject: [PATCH 228/661] staging: vchiq: Load bcm2835_isp driver from vchiq bcmn2835_isp is a platform driver dependent on vchiq, therefore add the load/unload functions for it to vchiq. @@ -154767,10 +154767,10 @@ index 8d518bd9a6cd..08083aa61808 100644 2.18.4 -From 1703377119b1861bb00f545c06e3118e6255e055 Mon Sep 17 00:00:00 2001 +From 8089846b5e253507bd1cb3d4dc2d16103885c430 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 4 Apr 2019 13:33:47 +0100 -Subject: [PATCH 229/580] bcm2835-dma: Add proper 40-bit DMA support +Subject: [PATCH 229/661] bcm2835-dma: Add proper 40-bit DMA support BCM2711 has 4 DMA channels with a 40-bit address range, allowing them to access the full 4GB of memory on a Pi 4. @@ -155573,10 +155573,10 @@ index 87b5d0bef355..ac0458a8027f 100644 2.18.4 -From 6599d7ae16a5fb85767ae0e36bf3aa6a449176cf Mon Sep 17 00:00:00 2001 +From 35c5e8152f921eee2c14e2f339e0a65d7e445f3c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 1 May 2020 17:56:13 +0100 -Subject: [PATCH 230/580] overlays: Make the i2c-gpio overlay safe again +Subject: [PATCH 230/661] overlays: Make the i2c-gpio overlay safe again Like many overlays, the i2c-gpio overlay goes to efforts to avoid generating warnings about #address-cells and #size-cells not @@ -155611,10 +155611,10 @@ index 2323a61edf07..63231b5d7c0c 100644 2.18.4 -From bfc3d49839ba99a0f3eacc200c34c604e237806d Mon Sep 17 00:00:00 2001 +From 0588f8e0dc20a50be8038fad04bc62359faea0ff Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 20 Apr 2020 11:01:21 +0100 -Subject: [PATCH 231/580] media: i2c: imx219: Declare that the driver can +Subject: [PATCH 231/661] media: i2c: imx219: Declare that the driver can create events The flag V4L2_SUBDEV_FL_HAS_EVENTS is required if the subdev can @@ -155644,10 +155644,10 @@ index aec43b602649..473134c1e40f 100644 2.18.4 -From 8f769936278c91500268b9aaa4c112faf17b9fb7 Mon Sep 17 00:00:00 2001 +From a04ead416412ad58af6005ce56314941744a7703 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 15 Jan 2020 13:40:38 +0000 -Subject: [PATCH 232/580] media: ov5647: Fix return codes from +Subject: [PATCH 232/661] media: ov5647: Fix return codes from ov5647_write/ov5647_read functions. Previously they were returning positive non-zero codes for success, @@ -155724,10 +155724,10 @@ index 07550377be2e..6ecc018ac431 100644 2.18.4 -From feb7327b537ced120f2045b4ae94081ba57dedf8 Mon Sep 17 00:00:00 2001 +From 632d5e80fe106bc19328969b1dc1da1aa517e1df Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 29 Jan 2020 15:30:53 +0000 -Subject: [PATCH 233/580] media: ov5647: Add basic support for multiple sensor +Subject: [PATCH 233/661] media: ov5647: Add basic support for multiple sensor modes. Specifically: @@ -156137,10 +156137,10 @@ index 6ecc018ac431..0d84b7640cf3 100644 2.18.4 -From 5f4a08428e2e5696d4ce8e3b75a91a499baba63e Mon Sep 17 00:00:00 2001 +From e850aa48609278402458d7825e018a63dae42fb4 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 29 Jan 2020 15:31:23 +0000 -Subject: [PATCH 234/580] media: ov5647: Add V4L2 controls for analogue gain, +Subject: [PATCH 234/661] media: ov5647: Add V4L2 controls for analogue gain, exposure and AWB Added basic v4l2_ctrl_handler infrastructure (there was none @@ -156420,10 +156420,10 @@ index 0d84b7640cf3..16cfafc9cf9c 100644 2.18.4 -From 8527eb43e2099c2fe21ca3360d69eb49b1d76b5c Mon Sep 17 00:00:00 2001 +From db3e0e06414be106727dcfe6de1a3ac788e6fa89 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 29 Jan 2020 15:31:28 +0000 -Subject: [PATCH 235/580] media: ov5647: Add extra 10-bit sensor modes. +Subject: [PATCH 235/661] media: ov5647: Add extra 10-bit sensor modes. The 8-bit VGA mode remains, we add the following 10-bit modes: @@ -156975,10 +156975,10 @@ index 16cfafc9cf9c..fc6c5d9c4532 100644 2.18.4 -From 848ca3195b4e8ce71daac50736a12e578b17bf94 Mon Sep 17 00:00:00 2001 +From 811b8bb6beee62b9a532eeab3931cec839b646de Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 29 Jan 2020 15:31:32 +0000 -Subject: [PATCH 236/580] media: ov5647: change defaults to better match raw +Subject: [PATCH 236/661] media: ov5647: change defaults to better match raw camera applications. Specifically: @@ -157040,10 +157040,10 @@ index fc6c5d9c4532..66b3ee5cc190 100644 2.18.4 -From 300c75ae28228174f207604c0d8bd8ca2a03c2ab Mon Sep 17 00:00:00 2001 +From b9730fca628d5ef5143f9828db22e3bb2b0aeb6c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 11:46:07 +0100 -Subject: [PATCH 237/580] media: i2c: ov5647: Add support for g_selection to +Subject: [PATCH 237/661] media: i2c: ov5647: Add support for g_selection to reflect cropping/binning In order to apply lens shading correctly the client needs to know how @@ -157252,10 +157252,10 @@ index 66b3ee5cc190..e7c7e3ab4b38 100644 2.18.4 -From ea2fd8cd2eb13f59159502c3d59af14de9b042bd Mon Sep 17 00:00:00 2001 +From ca80327047e24f5b561646f3254737e1ce65d12f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 11:50:52 +0100 -Subject: [PATCH 238/580] media: i2c: ov5467: Fixup error path to release mutex +Subject: [PATCH 238/661] media: i2c: ov5467: Fixup error path to release mutex "87f3ab9 media: ov5647: Add basic support for multiple sensor modes." added a return path ov5647_set_fmt that didn't release the device @@ -157287,10 +157287,10 @@ index e7c7e3ab4b38..09d68b0b4a13 100644 2.18.4 -From b3cd83a331989dc75da31ca87048b5d87d1204f7 Mon Sep 17 00:00:00 2001 +From fb441124dcc0cc19788e6e7a895a076593aa21dc Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 12:25:13 +0100 -Subject: [PATCH 239/580] media: i2c: ov5647: Support V4L2_CID_PIXEL_RATE +Subject: [PATCH 239/661] media: i2c: ov5647: Support V4L2_CID_PIXEL_RATE Clients need to know the pixel rate in order to compute exposure and frame rate values. @@ -157424,10 +157424,10 @@ index 09d68b0b4a13..02d72feb837e 100644 2.18.4 -From 08970cdc171a45b0a7118a57a3db48ec99e7857f Mon Sep 17 00:00:00 2001 +From 363fde9789042a936e969ca2470750c2afef91c1 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 17:25:56 +0100 -Subject: [PATCH 240/580] media: i2c: ov5647: Set V4L2_SUBDEV_FL_HAS_EVENTS +Subject: [PATCH 240/661] media: i2c: ov5647: Set V4L2_SUBDEV_FL_HAS_EVENTS flag The ov5647 subdev can generate control events, therefore set @@ -157573,10 +157573,10 @@ index 02d72feb837e..c012e0b3d68b 100644 2.18.4 -From 2b74979d87c71a027a113baf09debf3dee6c0877 Mon Sep 17 00:00:00 2001 +From 95fd9db22470457c74076544a203ca631cf28b7e Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 21:39:58 +0100 -Subject: [PATCH 241/580] media: i2c: ov5647: Add support for V4L2_CID_VBLANK +Subject: [PATCH 241/661] media: i2c: ov5647: Add support for V4L2_CID_VBLANK Adds vblank control to allow for frame rate control. @@ -157784,10 +157784,10 @@ index c012e0b3d68b..445a0ce186ec 100644 2.18.4 -From c78bb8f3a96f656d8fcaa7721414b15bd6a70c61 Mon Sep 17 00:00:00 2001 +From f8875d68cd6cb0f1f521aa6be09d7973229b713d Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 21:47:25 +0100 -Subject: [PATCH 242/580] media: i2c: ov5647: Neither analogue gain nor +Subject: [PATCH 242/661] media: i2c: ov5647: Neither analogue gain nor exposure need EXECUTE_ON_WRITE The controls for analogue gain and exposure were defined with @@ -157848,10 +157848,10 @@ index 445a0ce186ec..49247711221c 100644 2.18.4 -From 2a8b3fb97137810a4e6cea9d7a681ae5659a972f Mon Sep 17 00:00:00 2001 +From 3b05d17fe70f5b7d549a0a32ae0e4b7f12e5f289 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 22:11:01 +0100 -Subject: [PATCH 243/580] media: i2c: ov5647: Use member names in mode tables +Subject: [PATCH 243/661] media: i2c: ov5647: Use member names in mode tables To make adding new members to the mode structures easier, use the member names in the initialisers. @@ -157965,10 +157965,10 @@ index 49247711221c..da4ef30d8f32 100644 2.18.4 -From a2bb71c92078d5cca49172ef74f8faca16655e13 Mon Sep 17 00:00:00 2001 +From a1288dbca4bdaad86a78857cc510b86a5c3acc1b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 30 Apr 2020 11:03:00 +0100 -Subject: [PATCH 244/580] media: i2c: ov5647: Advertise the correct exposure +Subject: [PATCH 244/661] media: i2c: ov5647: Advertise the correct exposure range Exposure is clipped by the VTS of the mode, so needs to be updated as @@ -158090,10 +158090,10 @@ index da4ef30d8f32..6d84d2785f74 100644 2.18.4 -From 4ba0871f9381874199a3a485c3c8c5ad6e10fea4 Mon Sep 17 00:00:00 2001 +From e5d92c66cf4217eab0eef3bc8e4ea874cc3ad096 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 16:45:02 +0100 -Subject: [PATCH 245/580] media: bcm2835-unicam: Add support for +Subject: [PATCH 245/661] media: bcm2835-unicam: Add support for VIDIOC_[S|G]_SELECTION Sensors are now reflecting cropping and scaling parameters through @@ -158178,10 +158178,10 @@ index d4684fb2797f..0e1d525a0b35 100644 2.18.4 -From e8df6bd260637c88b2bd9ebf0569e66400dfe0f6 Mon Sep 17 00:00:00 2001 +From 8b1d09302cdfc0a9333df8169ffe0a015b58a8ec Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 29 Apr 2020 22:05:09 +0100 -Subject: [PATCH 246/580] media: bcm2835-unicam: Do not stop streaming in +Subject: [PATCH 246/661] media: bcm2835-unicam: Do not stop streaming in unicam_release unicam_release calls _vb2_fop_release, which will call stop_streaming @@ -158212,10 +158212,10 @@ index 0e1d525a0b35..c7e211d04ed3 100644 2.18.4 -From 7cfb2686b78f8521c2fcaeb3f72c185a138ed449 Mon Sep 17 00:00:00 2001 +From a98ffacacda856d6e06c351bf3faba69e52f4586 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 30 Apr 2020 09:52:50 +0100 -Subject: [PATCH 247/580] media: bcm2835-unicam: Fix reference counting in +Subject: [PATCH 247/661] media: bcm2835-unicam: Fix reference counting in unicam_open The reference counting of node->open was only incremented after @@ -158256,10 +158256,10 @@ index c7e211d04ed3..a79fc4d99d36 100644 2.18.4 -From 863e5efe45dd3b09f10f1e81ea276bb28fde51ca Mon Sep 17 00:00:00 2001 +From 65e5a2dba14edfa3ebfa0f5c2d985c92d1f8e0b7 Mon Sep 17 00:00:00 2001 From: Jacko Dirks Date: Tue, 5 May 2020 14:28:14 +0200 -Subject: [PATCH 248/580] media: i2c: tc358743: Fix fallthrough warning +Subject: [PATCH 248/661] media: i2c: tc358743: Fix fallthrough warning Signed-off-by: Jacko Dirks --- @@ -158282,10 +158282,10 @@ index 0a8a25ff7872..b3b8d6e15ea2 100644 2.18.4 -From 6db456bd75358b114e61ec975776560bf53aa676 Mon Sep 17 00:00:00 2001 +From ea4439c266220f3c616aeb4e0c2cda0992334ce4 Mon Sep 17 00:00:00 2001 From: Jacko Dirks Date: Tue, 5 May 2020 14:33:31 +0200 -Subject: [PATCH 249/580] media: bcm2835: unicam: Fix uninitialized warning +Subject: [PATCH 249/661] media: bcm2835: unicam: Fix uninitialized warning Signed-off-by: Jacko Dirks --- @@ -158309,10 +158309,10 @@ index a79fc4d99d36..92e5deb4c6fd 100644 2.18.4 -From c23e5c87813d0aeeb85422d7b4877b079ef46347 Mon Sep 17 00:00:00 2001 +From f14b0248978ceae09624fc722bd86ba900ce812e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 5 May 2020 19:45:41 +0100 -Subject: [PATCH 250/580] video: bcm2708_fb: Disable FB if no displays found +Subject: [PATCH 250/661] video: bcm2708_fb: Disable FB if no displays found If the firmware hasn't detected a display, the driver would assume one display was available, but because it had failed to retrieve the @@ -158349,10 +158349,10 @@ index 17e9260655e4..dac5c021ce52 100644 2.18.4 -From 09a6a1b2496370873a674d7b470f39bc87d0d35f Mon Sep 17 00:00:00 2001 +From b5904c4b4b01171271c68a430c48098e9039229d Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 7 May 2020 15:50:54 +0100 -Subject: [PATCH 251/580] dt-bindings: media: i2c: Add IMX477 CMOS sensor +Subject: [PATCH 251/661] dt-bindings: media: i2c: Add IMX477 CMOS sensor binding Add YAML device tree binding for IMX477 CMOS image sensor. @@ -158486,10 +158486,10 @@ index 000000000000..0994e13e67f6 2.18.4 -From 01eab64903f0311a4938326cf1c25047e9d4ae9f Mon Sep 17 00:00:00 2001 +From 64deb844ce08fdf6b17049dd47ec3ef19851fdbe Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 13 May 2020 18:28:27 +0100 -Subject: [PATCH 252/580] media: bcm2835-unicam: Always service interrupts +Subject: [PATCH 252/661] media: bcm2835-unicam: Always service interrupts From when bringing up the driver, there was a check in the isr to ignore interrupts (claiming them handled) should the driver @@ -158543,10 +158543,10 @@ index 92e5deb4c6fd..52a534d932bf 100644 2.18.4 -From 8df8c581f8d283c500838f1d1c614d99d02716ef Mon Sep 17 00:00:00 2001 +From 942977e60eba360ff2436beeb43f60118ef73eb4 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 13 May 2020 20:10:15 +0100 -Subject: [PATCH 253/580] sc16is7xx: Fix for hardware flow control +Subject: [PATCH 253/661] sc16is7xx: Fix for hardware flow control The SC16IS7XX hardware flow control is mishandled by the driver in a number of ways: @@ -158619,10 +158619,10 @@ index ae48749d72fd..f6ce041d0c3d 100644 2.18.4 -From cc349a9be8086593a0b0fbd28489849ff76c55bd Mon Sep 17 00:00:00 2001 +From 4571fea32ca31f159e16b38a0db2a54ac70ee9b3 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 15 May 2020 13:42:10 +0100 -Subject: [PATCH 254/580] staging: vc04_services: mmal-vchiq: Update parameters +Subject: [PATCH 254/661] staging: vc04_services: mmal-vchiq: Update parameters list Adds in a couple of new MMAL parameter defines. @@ -158653,10 +158653,10 @@ index 27bafc5f01d2..89059bca0b77 100644 2.18.4 -From 198353f41518b1387892e1adf31927102f1d425a Mon Sep 17 00:00:00 2001 +From c276d9d935aa9985ce14ec88fb528410017b5eaa Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 15 May 2020 13:48:59 +0100 -Subject: [PATCH 255/580] staging:vc04_services: bcm2835-camera: Request +Subject: [PATCH 255/661] staging:vc04_services: bcm2835-camera: Request headers with I-frame V4L2 wishes to have the codec header bytes in the same buffer as the @@ -158689,10 +158689,10 @@ index df90c1f9d148..bea37cb163fc 100644 2.18.4 -From 7f26bd14299586361a950a73ef120aeaac1122d7 Mon Sep 17 00:00:00 2001 +From 196e3c72df4e7f2fc2c92c7c9a75c4a8fd7bea71 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 8 Apr 2020 15:23:56 +0100 -Subject: [PATCH 256/580] kbuild: Disable gcc plugins +Subject: [PATCH 256/661] kbuild: Disable gcc plugins The GCC plugin feature leads to different kernel configurations on what ought to be equivalent build systems because they depend on the build @@ -158723,10 +158723,10 @@ index b79fd0bea838..c3d0c8fedbdd 100755 2.18.4 -From 28ca59a77435a68d4ebda0e234d3f0cabe43fcc2 Mon Sep 17 00:00:00 2001 +From 7af5a7f599d0a7e528e79745603482427a355b3a Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 19 May 2020 11:46:47 +0100 -Subject: [PATCH 257/580] media: bcm2835-unicam: Retain packing information on +Subject: [PATCH 257/661] media: bcm2835-unicam: Retain packing information on G_FMT The change to retrieve the pixel format always on g_fmt didn't @@ -158777,10 +158777,10 @@ index 52a534d932bf..b32b2d33a4e2 100644 2.18.4 -From 9c089c16036f1ebe1030bed1aa6441f0c2384950 Mon Sep 17 00:00:00 2001 +From cc41dd64cefd613a14fa95ca0d52b28b26da8752 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 5 May 2020 15:23:32 +0100 -Subject: [PATCH 258/580] zswap: Defer zswap initialisation +Subject: [PATCH 258/661] zswap: Defer zswap initialisation Enabling zswap support in the kernel configuration costs about 1.5MB of RAM, even when zswap is not enabled at runtime. This cost can be @@ -158908,10 +158908,10 @@ index fbb782924ccc..0ca7f6a68d20 100644 2.18.4 -From 667ec5d9b7bf558d789146157f97ace6a73acf60 Mon Sep 17 00:00:00 2001 +From 39f376d3f2f9bd151acc2629756c1249ae33c480 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 22 May 2020 11:35:33 +0100 -Subject: [PATCH 259/580] SQUASH: pinctrl: bcm2835: Set base for bcm2711 GPIO +Subject: [PATCH 259/661] SQUASH: pinctrl: bcm2835: Set base for bcm2711 GPIO to 0 Without this patch GPIOs don't seem to work properly, primarily @@ -158941,10 +158941,10 @@ index bda29f421e78..c5d88157f4b2 100644 2.18.4 -From 3b8260a14d39625e62daedbfd1656cec11a22f5e Mon Sep 17 00:00:00 2001 +From 4425be349b414dac6a9fc86059f3426343a991ea Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 20 May 2020 16:36:33 +0100 -Subject: [PATCH 260/580] staging: vchiq_arm: Clean up 40-bit DMA support +Subject: [PATCH 260/661] staging: vchiq_arm: Clean up 40-bit DMA support Manage the split between addresses for the VPU and addresses for the 40-bit DMA controller with a dedicated DMA device pointer that on non- @@ -159123,10 +159123,10 @@ index 08083aa61808..c3ca18e4e85c 100644 2.18.4 -From 1292c3016e86df439b643b1ad57a23ade673c8d8 Mon Sep 17 00:00:00 2001 +From ce1ba742a1d761a2e44939c12a25ec0522329272 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Thu, 28 May 2020 11:09:48 +0100 -Subject: [PATCH 261/580] media: bcm2835-unicam: change minimum number of +Subject: [PATCH 261/661] media: bcm2835-unicam: change minimum number of vb2_queue buffers to 1 Since the unicam driver was modified to write to a dummy buffer when no @@ -159157,10 +159157,10 @@ index b32b2d33a4e2..e76323af0952 100644 2.18.4 -From 52cde0aa968a500c9e3e0602ceaffb5afba71ec1 Mon Sep 17 00:00:00 2001 +From 02361ac4424af444eca9662c1480641863319f6f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 19 May 2020 09:46:12 +0100 -Subject: [PATCH 262/580] brcmfmac: BCM43436 needs dedicated firmware +Subject: [PATCH 262/661] brcmfmac: BCM43436 needs dedicated firmware Signed-off-by: Phil Elwell --- @@ -159193,10 +159193,10 @@ index 2b642886430d..dce241d99684 100644 2.18.4 -From 7084e935cd7c05f9ecfb562455f3e6892753376f Mon Sep 17 00:00:00 2001 +From c3f49fd4e526e74b5e72b5730697e74b5f273260 Mon Sep 17 00:00:00 2001 From: Hristo Venev Date: Fri, 5 Jun 2020 09:22:49 +0000 -Subject: [PATCH 263/580] snd_bcm2835: disable HDMI audio when vc4 is used +Subject: [PATCH 263/661] snd_bcm2835: disable HDMI audio when vc4 is used (#3640) Things don't work too well when both the vc4 driver and the firmware @@ -159232,10 +159232,10 @@ index f926784c622d..31968fec297f 100644 2.18.4 -From fd89f6a9f6bc4c704cb1cf525a139b171f3efc13 Mon Sep 17 00:00:00 2001 +From c24669a9534090d770d7c4e91887b8d2a27db0a3 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 24 Apr 2018 14:42:27 +0100 -Subject: [PATCH 264/580] gpiolib: Don't prevent IRQ usage of output GPIOs +Subject: [PATCH 264/661] gpiolib: Don't prevent IRQ usage of output GPIOs Upstream Linux deems using output GPIOs to generate IRQs as a bogus use case, even though the BCM2835 GPIO controller is capable of doing @@ -159250,7 +159250,7 @@ Signed-off-by: Phil Elwell 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c -index 0a2c4adcd833..e20ebd7e10c7 100644 +index af5bb8fedfea..2bd26c985246 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -51,6 +51,8 @@ @@ -159262,7 +159262,7 @@ index 0a2c4adcd833..e20ebd7e10c7 100644 /* Device and char device-related information */ static DEFINE_IDA(gpio_ida); static dev_t gpio_devt; -@@ -2448,8 +2450,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value) +@@ -2444,8 +2446,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value) value = !!value; /* GPIOs used for enabled IRQs shall not be set as output */ @@ -159273,7 +159273,7 @@ index 0a2c4adcd833..e20ebd7e10c7 100644 gpiod_err(desc, "%s: tried to set a GPIO tied to an IRQ as output\n", __func__); -@@ -3254,8 +3256,8 @@ int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) +@@ -3250,8 +3252,8 @@ int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) } /* To be valid for IRQ the line needs to be input or open drain */ @@ -159288,10 +159288,10 @@ index 0a2c4adcd833..e20ebd7e10c7 100644 2.18.4 -From d6cc293a708b0ced037f800a2b31ccb768c5a1e1 Mon Sep 17 00:00:00 2001 +From 57e540c89457cce2e4d65f91a1f98e0b8f0b3332 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 11 Jun 2020 09:57:03 +0100 -Subject: [PATCH 265/580] PCI: brcmstb: Add DT property to control L1SS +Subject: [PATCH 265/661] PCI: brcmstb: Add DT property to control L1SS The BRCM PCIe block has controls to enable control of the CLKREQ# signal by the L1SS, and to gate the refclk with the CLKREQ# input. @@ -159373,10 +159373,10 @@ index 9c3d2982248d..fea54f6fb7b1 100644 2.18.4 -From 654952edec34d606aadea9f31b1dd0f0941d0eb6 Mon Sep 17 00:00:00 2001 +From dd83d09b1f4e5cf253342684f80941175e10ba2c Mon Sep 17 00:00:00 2001 From: Markus Proeller Date: Tue, 16 Jun 2020 13:24:31 +0200 -Subject: [PATCH 266/580] media: irs1125: Using i2c_transfer for ic2 reads +Subject: [PATCH 266/661] media: irs1125: Using i2c_transfer for ic2 reads Reading data over i2c is done by using i2c_transfer to ensure that this operation can't be interrupted. @@ -159444,10 +159444,10 @@ index 25e1dd5a08ef..6680afea5894 100644 2.18.4 -From c4b3b579d2b8d816a3a852ef3a20aa71fbc9f728 Mon Sep 17 00:00:00 2001 +From 15e0717554e844c10b51cd191aa18bcb90cdbdb5 Mon Sep 17 00:00:00 2001 From: Markus Proeller Date: Tue, 16 Jun 2020 13:27:42 +0200 -Subject: [PATCH 267/580] media: irs1125: Refactoring and debug messages +Subject: [PATCH 267/661] media: irs1125: Refactoring and debug messages Changed some variable names to comply with checkpatch --strict mode. Debug messages added. @@ -159573,10 +159573,10 @@ index 6680afea5894..289f0c25b141 100644 2.18.4 -From 42d97fa059c39b87f427ce45296f71bddacc1006 Mon Sep 17 00:00:00 2001 +From 29694e5667c26547ee2e5ab3bd7b94b991189593 Mon Sep 17 00:00:00 2001 From: Markus Proeller Date: Tue, 16 Jun 2020 13:31:36 +0200 -Subject: [PATCH 268/580] media: irs1125: Atomic access to imager +Subject: [PATCH 268/661] media: irs1125: Atomic access to imager reconfiguration Instead of changing the exposure and framerate settings for all sequences, @@ -159962,10 +159962,10 @@ index dccaca23aa76..96d676123d5e 100644 2.18.4 -From e62fc321c27cc54b5b736a1f4fec8651326586e0 Mon Sep 17 00:00:00 2001 +From f732b18937879ed491711c13db5189c7e4f9f780 Mon Sep 17 00:00:00 2001 From: Markus Proeller Date: Tue, 16 Jun 2020 13:33:56 +0200 -Subject: [PATCH 269/580] media: irs1125: Keep HW in sync after imager reset +Subject: [PATCH 269/661] media: irs1125: Keep HW in sync after imager reset When closing the video device, the irs1125 is put in power down state. To keep V4L2 ctrls and the HW in sync, v4l2_ctrl_handler_setup is @@ -160149,10 +160149,10 @@ index d59e05004a03..30c3d2640386 100644 2.18.4 -From 220f2259a4273dad16c041e8e71bbfd5953ff698 Mon Sep 17 00:00:00 2001 +From 6703d81c09584ba587bcee5fe97457adab3cc1a0 Mon Sep 17 00:00:00 2001 From: Maxim Mikityanskiy Date: Sat, 20 Jun 2020 15:40:00 +0300 -Subject: [PATCH 270/580] staging: bcm2835-audio: Add missing MODULE_ALIAS +Subject: [PATCH 270/661] staging: bcm2835-audio: Add missing MODULE_ALIAS Commit 8353fe6f1e0f ("Revert "staging: bcm2835-audio: Drop DT dependency"") reverts the upstream change and makes bcm2835-audio use @@ -160185,10 +160185,10 @@ index 31968fec297f..a0cba3823e5e 100644 2.18.4 -From b89a103356c2871b019e379e1fb63ba6d3a459cb Mon Sep 17 00:00:00 2001 +From 28e470992f0421e459c7ff4519880f2878746927 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 26 Jun 2020 11:51:05 +0100 -Subject: [PATCH 271/580] brcmfmac: Prefer a ccode from OTP over nvram file +Subject: [PATCH 271/661] brcmfmac: Prefer a ccode from OTP over nvram file Allow the nvram file to set a default ccode (regulatory domain) without overriding one set in OTP. @@ -160322,10 +160322,10 @@ index d821a4758f8c..adfea97c9a43 100644 2.18.4 -From ae89d25dd318fa8a85c836d3a692eaa6aa6ec32f Mon Sep 17 00:00:00 2001 +From 8d58fd4f94edd31021d81a07e2440cb9ca6cdb22 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 23 Jun 2020 10:05:57 +0100 -Subject: [PATCH 272/580] drivers: media: Remove the downstream version of +Subject: [PATCH 272/661] drivers: media: Remove the downstream version of bcm2835-unicam About to be replaced by the upstream version. @@ -163513,10 +163513,10 @@ index ae059a171d0f..000000000000 2.18.4 -From 761aa6924db4ac0c925d8a081d358e0570ae1b00 Mon Sep 17 00:00:00 2001 +From 7adc829a11bf57afdbd52709c611235fb5d7fad8 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Mon, 4 May 2020 12:25:41 +0300 -Subject: [PATCH 273/580] media: bcm2835-unicam: Driver for CCP2/CSI2 camera +Subject: [PATCH 273/661] media: bcm2835-unicam: Driver for CCP2/CSI2 camera interface Add a driver for the Unicam camera receiver block on BCM283x processors. @@ -166681,10 +166681,10 @@ index 000000000000..ae059a171d0f 2.18.4 -From 96715b6e367e92e00636a6d54cd1bd6b7cc81de0 Mon Sep 17 00:00:00 2001 +From e61567e26dc47424fe73edef5efa7a5f4e2626d2 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 23 Jun 2020 14:32:51 +0100 -Subject: [PATCH 274/580] media: bcm2835-unicam: Add support for +Subject: [PATCH 274/661] media: bcm2835-unicam: Add support for get_mbus_config to set num lanes Use the get_mbus_config pad subdev call to allow a source to use @@ -166743,10 +166743,10 @@ index 2e9387cbc1e0..9adfb2d217af 100644 2.18.4 -From 41226034807de0cfcce17f8230f9acd10dccb3b4 Mon Sep 17 00:00:00 2001 +From 249d88400bf428f282cf43299a300d765c4983cb Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 26 Jun 2020 15:53:44 +0100 -Subject: [PATCH 275/580] media: bcm2835-unicam: Avoid gcc warning over {0} on +Subject: [PATCH 275/661] media: bcm2835-unicam: Avoid gcc warning over {0} on endpoint Older gcc versions object to = { 0 } initialisation if the first @@ -166776,10 +166776,10 @@ index 9adfb2d217af..a65e1da55142 100644 2.18.4 -From 4fe472d00981f8bb01c867ecf9c08439626995d5 Mon Sep 17 00:00:00 2001 +From 7e5c9dec1450731c2caf08fbf7b4116865cb223b Mon Sep 17 00:00:00 2001 From: Andrey Konovalov Date: Fri, 12 Jun 2020 15:53:46 +0200 -Subject: [PATCH 276/580] media: i2c: imx290: set the format before +Subject: [PATCH 276/661] media: i2c: imx290: set the format before VIDIOC_SUBDEV_G_FMT is called Commit d46cfdc86c30d5ec768924f0b1e2683c8d20b671 upstream. @@ -166822,10 +166822,10 @@ index adcddf3204f7..ad2318390678 100644 2.18.4 -From 7010c1482321085b4af9ee903b3b40c785dd4139 Mon Sep 17 00:00:00 2001 +From 1078196d167180ae956246a06c8c949748cfefa5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 25 Jun 2020 08:28:51 +0100 -Subject: [PATCH 277/580] media: i2c: imx290: Add support for 74.25MHz clock +Subject: [PATCH 277/661] media: i2c: imx290: Add support for 74.25MHz clock The existing driver only supported a clock of 37.125MHz, but the sensor also supports 74.25MHz. @@ -167092,10 +167092,10 @@ index ad2318390678..fe1078f7721e 100644 2.18.4 -From 64847318433ae16056cbac80ccd8addd7ac1e4ef Mon Sep 17 00:00:00 2001 +From acdbe6f33629c877e2700312bdd6b537874bb1ae Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 11 Jun 2020 13:41:43 +0100 -Subject: [PATCH 278/580] media: i2c: imx290: Correct range for V4L2_CID_GAIN +Subject: [PATCH 278/661] media: i2c: imx290: Correct range for V4L2_CID_GAIN to 0-238 The datasheet lists the gain as being 0.0 to 72.0dB in 0.3dB steps, which @@ -167124,10 +167124,10 @@ index fe1078f7721e..c193b7b8d8e5 100644 2.18.4 -From f0c77d8a9e36e36e1c2f2ae88613120f683ffc5f Mon Sep 17 00:00:00 2001 +From a9d0ef0da8e28b36abcaf6e464cd2531c8ab5b94 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 11 Jun 2020 14:36:40 +0100 -Subject: [PATCH 279/580] media: i2c: imx290: Convert HMAX setting into +Subject: [PATCH 279/661] media: i2c: imx290: Convert HMAX setting into V4L2_CID_HBLANK Userspace needs to know HBLANK if it is to work out exposure times @@ -167289,10 +167289,10 @@ index c193b7b8d8e5..b12213f6355b 100644 2.18.4 -From 0fc94ccca3d8af4ddff8f8d6fb0650d0794db886 Mon Sep 17 00:00:00 2001 +From de909eba3286d6f778b2d8ccc25aa3f35fc2a3ff Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 11 Jun 2020 18:09:12 +0100 -Subject: [PATCH 280/580] media: i2c: imx290: Add support for V4L2_CID_VBLANK +Subject: [PATCH 280/661] media: i2c: imx290: Add support for V4L2_CID_VBLANK In order to calculate framerate and durations userspace needs the vertical blanking information. This can be configurable, @@ -167436,10 +167436,10 @@ index b12213f6355b..357614af64f7 100644 2.18.4 -From 7459cf58f257720d4bad62c9646e23d5e8f9133d Mon Sep 17 00:00:00 2001 +From 14922bfeb159fd0ac5415f84ad2cece7227e83d9 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 11 Jun 2020 18:19:13 +0100 -Subject: [PATCH 281/580] media: i2c: imx290: Add exposure control to the +Subject: [PATCH 281/661] media: i2c: imx290: Add exposure control to the driver. Adds support for V4L2_CID_EXPOSURE so that userspace can control @@ -167535,10 +167535,10 @@ index 357614af64f7..2eae36b0ad5c 100644 2.18.4 -From 71e90e2eb9ad07ea3693bc0267333af7206c79a6 Mon Sep 17 00:00:00 2001 +From c85ab24735a0c7cfbd6fbd34e0ead863650cec76 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 11 Jun 2020 18:34:16 +0100 -Subject: [PATCH 282/580] media: i2c: imx290: Add H and V flip controls +Subject: [PATCH 282/661] media: i2c: imx290: Add H and V flip controls The sensor supports horizontal and vertical flips, so support them through V4L2_CID_HFLIP and V4L2_CID_VFLIP. @@ -167624,10 +167624,10 @@ index 2eae36b0ad5c..3d6734da7d64 100644 2.18.4 -From e3ba033777bc78f8775d0454eec1619603b344e4 Mon Sep 17 00:00:00 2001 +From ad09faa4f7df2fa3e4329f8d1438e3a5100e14f4 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 25 Jun 2020 16:52:14 +0100 -Subject: [PATCH 283/580] media: dt-bindings: media: i2c: Add mono version to +Subject: [PATCH 283/661] media: dt-bindings: media: i2c: Add mono version to IMX290 bindings The IMX290 module is available as either monochrome or colour and @@ -167666,10 +167666,10 @@ index a3cc21410f7c..294e63650d9e 100644 2.18.4 -From d01a92f8013e6b4036c5032e761e451737f43353 Mon Sep 17 00:00:00 2001 +From 7d67245163974c7e1ed2231b589937e653680290 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 25 Jun 2020 17:03:11 +0100 -Subject: [PATCH 284/580] media : i2c: imx290: Add support for the mono sensor +Subject: [PATCH 284/661] media : i2c: imx290: Add support for the mono sensor variant. The IMX290 module is available as either mono or colour (Bayer). @@ -167857,10 +167857,10 @@ index 3d6734da7d64..09df70849928 100644 2.18.4 -From b6c18f15671c878ea455744176d968a694c7ed78 Mon Sep 17 00:00:00 2001 +From d5b78ae810f4057a6a1883f60384b7573eaf3430 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 26 Jun 2020 18:11:49 +0100 -Subject: [PATCH 285/580] media: i2c: imx290: Switch set_hmax to use +Subject: [PATCH 285/661] media: i2c: imx290: Switch set_hmax to use imx290_write_buffered_reg imx290_set_hmax was using two independent writes to set up hmax, @@ -167906,10 +167906,10 @@ index 09df70849928..b824dfe29bbd 100644 2.18.4 -From 8de36c0ffda95f3acb74731954b10958086c2c57 Mon Sep 17 00:00:00 2001 +From adc773235066f20cd4a488813f26c1aba24c01e2 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 2 Jul 2020 13:53:20 +0100 -Subject: [PATCH 286/580] serial: 8250: bcm2835aux - defer if clock is zero +Subject: [PATCH 286/661] serial: 8250: bcm2835aux - defer if clock is zero See: https://github.com/raspberrypi/linux/issues/3700 @@ -167940,10 +167940,10 @@ index fd95860cd661..fc36e5963e30 100644 2.18.4 -From 4811d4a04219668f024dd7bf7d2a3729b11fb272 Mon Sep 17 00:00:00 2001 +From a85c82bdd048ee865f097ab68f8f5b5fa83f94f8 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 May 2020 16:59:03 +0100 -Subject: [PATCH 287/580] media: Add a pixel format for MIPI packed 12bit luma +Subject: [PATCH 287/661] media: Add a pixel format for MIPI packed 12bit luma only. This is the format used by monochrome 12bit image sensors. @@ -168048,10 +168048,10 @@ index e9fbb04a3519..e72c28ea0235 100644 2.18.4 -From 491702839bf4fef2c7b42b63ee89fd0955bb80a1 Mon Sep 17 00:00:00 2001 +From d652687da7341c6a744cd3d006147354c4306c5b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 25 Jun 2020 17:51:03 +0100 -Subject: [PATCH 288/580] media: Add a pixel format for MIPI packed 14bit luma +Subject: [PATCH 288/661] media: Add a pixel format for MIPI packed 14bit luma only. This is the format used by monochrome 14bit image sensors. @@ -168165,10 +168165,10 @@ index e72c28ea0235..53d526dbe004 100644 2.18.4 -From b19da540a6e659a223e95e4e3c02ae6f7aeb219b Mon Sep 17 00:00:00 2001 +From 891f602d65076694f374798aab39f774f4bf5734 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 25 Jun 2020 17:53:32 +0100 -Subject: [PATCH 289/580] media: bcm2835-unicam: Add support for 12bit mono +Subject: [PATCH 289/661] media: bcm2835-unicam: Add support for 12bit mono packed format Now that V4L2_PIX_FMT_Y12P is defined, allow passing raw 12bit @@ -168196,10 +168196,10 @@ index a65e1da55142..5edb58cc9f03 100644 2.18.4 -From d5ec107a9ec7395f634e599fc18e0476f2b2aca3 Mon Sep 17 00:00:00 2001 +From 2756b34cc346525bf8f864caa3926def155a6a43 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 25 Jun 2020 18:03:47 +0100 -Subject: [PATCH 290/580] media: bcm2835-unicam: Add support for 14bit mono +Subject: [PATCH 290/661] media: bcm2835-unicam: Add support for 14bit mono sources Now that V4L2_PIX_FMT_Y14 and V4L2_PIX_FMT_Y14P are defined, @@ -168231,10 +168231,10 @@ index 5edb58cc9f03..778153943160 100644 2.18.4 -From 23848135eadf8a7d449179c49f2e9fbd7bac9acd Mon Sep 17 00:00:00 2001 +From 94e7173e2e50f59d0ef7499711a3cf5f34beb14b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 1 Jul 2020 10:57:57 +0100 -Subject: [PATCH 291/580] media: bcm2835-unicam: Add support for unpacked 14bit +Subject: [PATCH 291/661] media: bcm2835-unicam: Add support for unpacked 14bit Bayer formats Now that the 14bit non-packed Bayer formats are defined, add them @@ -168279,10 +168279,10 @@ index 778153943160..c97ecfc0e55b 100644 2.18.4 -From c12bdc0e1fd8b245edb05b2af1799594650eede1 Mon Sep 17 00:00:00 2001 +From 21da7cf3c5dd9bf13a7a9c05d57d71efbd3c5eca Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 1 Jul 2020 20:28:27 +0100 -Subject: [PATCH 292/580] bcm2835-dma: Add NO_WAIT_RESP flag +Subject: [PATCH 292/661] bcm2835-dma: Add NO_WAIT_RESP flag Use bit 27 of the dreq value (the second cell of the DT DMA descriptor) to request that the WAIT_RESP bit is not set. @@ -168339,10 +168339,10 @@ index ac0458a8027f..84b1009da23b 100644 2.18.4 -From fdc26fb852c13b2a9cf9239cb4baf9f47ef1979e Mon Sep 17 00:00:00 2001 +From afe8de8ca9f9f7887f542214028167c6fcc35994 Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Fri, 17 May 2019 18:23:03 +0800 -Subject: [PATCH 293/580] media: i2c: add ov9281 driver. +Subject: [PATCH 293/661] media: i2c: add ov9281 driver. Change-Id: I7b77250bbc56d2f861450cf77271ad15f9b88ab1 Signed-off-by: Zefa Chen @@ -169568,10 +169568,10 @@ index 000000000000..4a6324a3e5da 2.18.4 -From 3038bb0c45f94f31ed506ea33ac114e23de22f0f Mon Sep 17 00:00:00 2001 +From 594cac1ac0a2ba77297534cdfb337b0b7f141db5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 14 Apr 2020 15:47:09 +0100 -Subject: [PATCH 294/580] media: i2c: ov9281: fix mclk issue when probe +Subject: [PATCH 294/661] media: i2c: ov9281: fix mclk issue when probe multiple camera. Takes the ov9281 part only from the Rockchip's patch. @@ -169634,10 +169634,10 @@ index 4a6324a3e5da..0d6759942f79 100644 2.18.4 -From 845715b1693e6490f974caa0b2ece330f25b8559 Mon Sep 17 00:00:00 2001 +From 83ef482ba603e0481477388a630fc7b65828cf43 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 14 Apr 2020 15:51:50 +0100 -Subject: [PATCH 295/580] media: i2c: ov9281: add enum_frame_interval function +Subject: [PATCH 295/661] media: i2c: ov9281: add enum_frame_interval function for iq tool 2.2 and hal3 Adds the ov9281 parts of the Rockchip patch adding enum_frame_interval to @@ -169737,10 +169737,10 @@ index 0d6759942f79..273aa904683c 100644 2.18.4 -From 776221d1daaa2bb4ae647fde3b1b33b0ccead40c Mon Sep 17 00:00:00 2001 +From 9b60871e4687256a7e4444f0a7919f1afbc16a91 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 14 Apr 2020 16:12:33 +0100 -Subject: [PATCH 296/580] media: i2c: ov9281: Fixup for recent kernel releases, +Subject: [PATCH 296/661] media: i2c: ov9281: Fixup for recent kernel releases, and remove custom code The Rockchip driver was based on a 4.4 kernel, and had several custom @@ -170420,10 +170420,10 @@ index 273aa904683c..7b9bea476cfb 100644 2.18.4 -From 47cfbe842fc263a40925443fe659e484dea60cc7 Mon Sep 17 00:00:00 2001 +From 1f26ebf8e966d1c66104abd0d7995e923cd4700f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 6 Jul 2020 17:51:32 +0100 -Subject: [PATCH 297/580] media: i2c: ov9281: Read chip ID via 2 reads +Subject: [PATCH 297/661] media: i2c: ov9281: Read chip ID via 2 reads Vision Components have made an OV9281 module which blocks reading back the majority of registers to comply with NDAs, and in doing @@ -170468,10 +170468,10 @@ index 7b9bea476cfb..bb8efc3d3cba 100644 2.18.4 -From 939e204ecf206232552d8b4642c1f83af248514d Mon Sep 17 00:00:00 2001 +From 8f367a8a81de9e109e3b5056bac9ef19e1a40fe3 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 7 Jul 2020 10:31:53 +0100 -Subject: [PATCH 298/580] media: i2c: imx290: Explicitly set v&h blank on mode +Subject: [PATCH 298/661] media: i2c: imx290: Explicitly set v&h blank on mode change __v4l2_ctrl_modify_range only updates the current value should @@ -170520,10 +170520,10 @@ index b824dfe29bbd..b28834823f86 100644 2.18.4 -From d0ebb1b479a537ddd495483ff5cd3723d3041cf3 Mon Sep 17 00:00:00 2001 +From f74267a44152d35f6c616b77a7b03a6c3d95d51e Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 7 Jul 2020 11:23:48 +0100 -Subject: [PATCH 299/580] media: i2c: imx290: Add support for g_selection to +Subject: [PATCH 299/661] media: i2c: imx290: Add support for g_selection to report cropping Userspace needs to know the cropping arrangements for each mode, @@ -170682,10 +170682,10 @@ index b28834823f86..24bf40d729b7 100644 2.18.4 -From 609df8e376c62e96f8bc69fbfe5f6b41dd3c666c Mon Sep 17 00:00:00 2001 +From 97ec35eb2d982a8067c2ddc97c38fa01fa279af2 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 7 Jul 2020 11:51:26 +0100 -Subject: [PATCH 300/580] media: i2c: imx290: Set the colorspace fields in the +Subject: [PATCH 300/661] media: i2c: imx290: Set the colorspace fields in the format The colorspace fields were left untouched in imx290_set_fmt @@ -170719,10 +170719,10 @@ index 24bf40d729b7..2e646fb01856 100644 2.18.4 -From 5f0698f03b1ad61b0cf6b03c538e316597ac886c Mon Sep 17 00:00:00 2001 +From eab3237c57cc51133551b9eb773b13e5ffd8c43a Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 7 Jul 2020 14:23:40 +0100 -Subject: [PATCH 301/580] media: bcm2835-unicam: Reinstate V4L2_CAP_READWRITE +Subject: [PATCH 301/661] media: bcm2835-unicam: Reinstate V4L2_CAP_READWRITE in the caps v4l2-compliance throws a failure if the device doesn't advertise @@ -170753,10 +170753,10 @@ index c97ecfc0e55b..20b46a9e04c3 100644 2.18.4 -From 6db9ebaa0c14873eb6496951c13143c70f7955a3 Mon Sep 17 00:00:00 2001 +From 6422b5ecac7ae4758896b1fbbf8f1a3a1691568f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 7 Jul 2020 14:52:43 +0100 -Subject: [PATCH 302/580] media: bcm2835-unicam: Ensure type is VIDEO_CAPTURE +Subject: [PATCH 302/661] media: bcm2835-unicam: Ensure type is VIDEO_CAPTURE in [g|s]_selection [g|s]_selection pass in a buffer type that needs to be validated @@ -170795,10 +170795,10 @@ index 20b46a9e04c3..de288f87ff2f 100644 2.18.4 -From f1be27fcbcb1a8179f64164a8a6e96421c8f806d Mon Sep 17 00:00:00 2001 +From 2ed554a5a89ccf693feb95cc7ee9988af89d0498 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Mon, 11 May 2020 13:02:22 +0100 -Subject: [PATCH 303/580] media: bcm2835: unicam: Set VPU min clock freq to +Subject: [PATCH 303/661] media: bcm2835: unicam: Set VPU min clock freq to 250Mhz. When streaming with Unicam, the VPU must have a clock frequency of at @@ -170928,10 +170928,10 @@ index de288f87ff2f..295db7564614 100644 2.18.4 -From 680c46a1d26da520e33f0382a280a717c517b5ae Mon Sep 17 00:00:00 2001 +From 1a5e68099947ab99d164a69e3e5724cabf9f56fd Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Mon, 11 May 2020 13:06:27 +0100 -Subject: [PATCH 304/580] dt-bindings: bcm2835-unicam: Update documentation +Subject: [PATCH 304/661] dt-bindings: bcm2835-unicam: Update documentation with new clock params Update the documentation to reflect the new "VPU" clock needed @@ -170972,10 +170972,10 @@ index 7714fb374b34..164d0377dcd2 100644 2.18.4 -From 2b649fb7b53d7fd502066c18d02d830fef29c045 Mon Sep 17 00:00:00 2001 +From 22b34e2de27c9ba2ac58214030561ffd72c8abe1 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sat, 4 Jul 2020 01:45:08 +0300 -Subject: [PATCH 305/580] media: i2c: ov5647: Parse and register properties +Subject: [PATCH 305/661] media: i2c: ov5647: Parse and register properties Parse device properties and register controls for them using the V4L2 fwnode properties helpers. @@ -171027,10 +171027,10 @@ index 6d84d2785f74..86a821a172b3 100644 2.18.4 -From 7d5b11e158eb5c83abb1d3d5f56846e48d7a3a14 Mon Sep 17 00:00:00 2001 +From f6089549199d859e4cf87252c5ca139db1efb2d9 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 13 Jul 2020 10:33:19 +0100 -Subject: [PATCH 306/580] leds: Add the actpwr trigger +Subject: [PATCH 306/661] leds: Add the actpwr trigger The actpwr trigger is a meta trigger that cycles between an inverted mmc0 and default-on. It is written in a way that could fairly easily @@ -171273,10 +171273,10 @@ index 000000000000..1a52107ceb03 2.18.4 -From f067e6c752848c5f29495e689f9ccecce548821a Mon Sep 17 00:00:00 2001 +From 5442cb00ab166aa9b9e41288fdb00511a1d41d15 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 21 Jul 2020 17:34:09 +0100 -Subject: [PATCH 307/580] staging: vchiq_arm: children inherit DMA config +Subject: [PATCH 307/661] staging: vchiq_arm: children inherit DMA config Although it is no longer necessary for vchiq's children to have a different DMA configuration to the parent, they do still need to @@ -171315,10 +171315,10 @@ index c3ca18e4e85c..a936102dbc34 100644 2.18.4 -From b2df3d2703aeab52f2e223ccb8a115d91c8a1c20 Mon Sep 17 00:00:00 2001 +From a81fde1b1a91c2c05666585cff0b1faac891f071 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 22 Jul 2020 17:59:31 +0100 -Subject: [PATCH 308/580] bcm2835-dma: Advertise the full DMA range +Subject: [PATCH 308/661] bcm2835-dma: Advertise the full DMA range Unless the DMA mask is set wider than 32 bits, DMA mapping will use a bounce buffer. @@ -171398,10 +171398,10 @@ index 84b1009da23b..d1127b9058a4 100644 2.18.4 -From 4b44df9e48d573f1159c53675ac3a6be17e45a8a Mon Sep 17 00:00:00 2001 +From f906bfb73f64acd863e3f1306223c910f837e28a Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 29 Jul 2020 13:47:55 +0100 -Subject: [PATCH 309/580] ARM: proc-v7: Force misalignment of early stmia +Subject: [PATCH 309/661] ARM: proc-v7: Force misalignment of early stmia In an attempt to prevent the problem of CPUn not starting, explicitly misalign the scratch space used to save registers acros the cache @@ -171464,10 +171464,10 @@ index 28c9d32fa99a..3e77e8982df3 100644 2.18.4 -From 9113737fe0346750d6c0b467d49bf1baf29d0a7a Mon Sep 17 00:00:00 2001 +From d8a7a3253962a196e141b28fb9c4eca53a1aba33 Mon Sep 17 00:00:00 2001 From: Hristo Venev Date: Wed, 19 Aug 2020 17:02:22 +0300 -Subject: [PATCH 310/580] media: bcm2835: unicam: Select MEDIA_CONTROLLER and +Subject: [PATCH 310/661] media: bcm2835: unicam: Select MEDIA_CONTROLLER and VIDEO_V4L2_SUBDEV_API That is what almost all other drivers appear to be doing. @@ -171497,10 +171497,10 @@ index ec46e3ef053c..7d5a0e6ba762 100644 2.18.4 -From 94fddb5f722068fcde71787eced2f3064244373a Mon Sep 17 00:00:00 2001 +From 3d931e5b46053304527beff63c5e8cb3478b4a04 Mon Sep 17 00:00:00 2001 From: Hristo Venev Date: Wed, 19 Aug 2020 17:05:53 +0300 -Subject: [PATCH 311/580] staging: media: rpivid: Select MEDIA_CONTROLLER and +Subject: [PATCH 311/661] staging: media: rpivid: Select MEDIA_CONTROLLER and MEDIA_CONTROLLER_REQUEST_API MEDIA_CONTROLLER_REQUEST_API is a hidden option. If rpivid depends on it, @@ -171535,10 +171535,10 @@ index 58b470c80db1..304c3edf0e71 100644 2.18.4 -From d0db656638b6f57ff1f25c4536dbe142cec0ce62 Mon Sep 17 00:00:00 2001 +From 6634cb6c8ee80d687eeb8df684dceb5aa1d193cb Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 27 Aug 2020 16:30:26 +0100 -Subject: [PATCH 312/580] media: bcm2835-unicam: Drop WARN on uing direct cache +Subject: [PATCH 312/661] media: bcm2835-unicam: Drop WARN on uing direct cache alias Pi 0&1 pass all ARM accesses through the VPU L2 cache, therefore @@ -171575,10 +171575,10 @@ index 295db7564614..35ddb97f7f75 100644 2.18.4 -From b16758b454b0beb08efb1dcdd7f39ab65c9fb043 Mon Sep 17 00:00:00 2001 +From 1187d463754589f92c2933f3f359926bca2bcf05 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 10 Jul 2020 12:40:50 +0100 -Subject: [PATCH 313/580] media: i2c: tc358743: Only allow supported pixel fmts +Subject: [PATCH 313/661] media: i2c: tc358743: Only allow supported pixel fmts in set_fmt Fix commit "media: tc358743: Return an appropriate colorspace from @@ -171611,10 +171611,10 @@ index b3b8d6e15ea2..eef6ab823c6c 100644 2.18.4 -From 27b963e55cbe42f1ce02a7218ce656c865d52d14 Mon Sep 17 00:00:00 2001 +From d8f379f8b8bd12d1e44e9fd919a6a08036efd51c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 7 Jul 2020 18:29:10 +0100 -Subject: [PATCH 314/580] media: i2c: ov9281: Add support for 8 bit readout +Subject: [PATCH 314/661] media: i2c: ov9281: Add support for 8 bit readout The sensor supports 8 bit mode as well as 10bit, so add the relevant code to allow selection of this. @@ -171805,10 +171805,10 @@ index bb8efc3d3cba..9610c24ceff1 100644 2.18.4 -From 3e2537b04cf810a6c280291042c33a7ca3f65188 Mon Sep 17 00:00:00 2001 +From 228bfab357812a6cff67d53c4f9b73155c26a22b Mon Sep 17 00:00:00 2001 From: popcornmix Date: Thu, 3 Sep 2020 14:02:21 +0100 -Subject: [PATCH 315/580] bcm2835-mmc: uninitialized_var is no more +Subject: [PATCH 315/661] bcm2835-mmc: uninitialized_var is no more --- drivers/mmc/host/bcm2835-mmc.c | 2 +- @@ -171831,10 +171831,10 @@ index caf46be8eb0d..cdc1318e5936 100644 2.18.4 -From f1ca804852276959d5d2733b4323730632ad0027 Mon Sep 17 00:00:00 2001 +From bc69c9566d2a3045b99f38b5249b43ab1c0db152 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Thu, 3 Sep 2020 14:02:41 +0100 -Subject: [PATCH 316/580] dwc_otg: whitelist_table is now productlist_table +Subject: [PATCH 316/661] dwc_otg: whitelist_table is now productlist_table --- drivers/usb/core/otg_productlist.h | 2 +- @@ -171857,10 +171857,10 @@ index 1839e169469b..b16e528859a8 100644 2.18.4 -From f8e38bc0978d5311db399748794d2ffe9ca93a0b Mon Sep 17 00:00:00 2001 +From e854e22bd6ed473a4c84ce4c55b7e7c22ff9ac71 Mon Sep 17 00:00:00 2001 From: detule Date: Tue, 2 Oct 2018 04:10:08 -0400 -Subject: [PATCH 317/580] vchiq_2835_arm: Implement a DMA pool for small bulk +Subject: [PATCH 317/661] vchiq_2835_arm: Implement a DMA pool for small bulk transfers (#2699) During a bulk transfer we request a DMA allocation to hold the @@ -171985,10 +171985,10 @@ index 76179739de12..2a1d8d6541b2 100644 2.18.4 -From 178a6fa6bafef928e41c8922f2dada7dd277223f Mon Sep 17 00:00:00 2001 +From 0e02ea1c2118f644b2c448295b8c4bd25802fb70 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 3 Sep 2020 17:09:07 +0100 -Subject: [PATCH 318/580] include/firmware: Add enum for +Subject: [PATCH 318/661] include/firmware: Add enum for RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID Used by audio and FKMS. @@ -172014,10 +172014,10 @@ index d0c827064999..d0ee609a9043 100644 2.18.4 -From 4251b0977c3c41ec6bc2f9b680890d4b1937f95a Mon Sep 17 00:00:00 2001 +From 1ec60c492e0408571c1c6b5de4fbce27a3a7be4e Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 27 Apr 2020 19:07:50 +0100 -Subject: [PATCH 319/580] vc4_hdmi: BCM2835 requires a fixed hsm clock for CEC +Subject: [PATCH 319/661] vc4_hdmi: BCM2835 requires a fixed hsm clock for CEC to work Signed-off-by: popcornmix @@ -172137,10 +172137,10 @@ index 0526a9cf608a..32d09132fb44 100644 2.18.4 -From 0ffcadfd11ace61a40301fb7d8b4b3affa5e1ada Mon Sep 17 00:00:00 2001 +From bde1a9d6df4f6fcb4b9592980bb4bc9811bd32c0 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Thu, 7 May 2020 18:16:07 +0100 -Subject: [PATCH 320/580] vc4_hdmi_regs: Add Intr2 register block +Subject: [PATCH 320/661] vc4_hdmi_regs: Add Intr2 register block Signed-off-by: Dom Cobley --- @@ -172241,10 +172241,10 @@ index 6c0dfbbe1a7e..10dd6097f2b5 100644 2.18.4 -From 143516b8e4bd7883feb2e6ba9cc2ffad5a21355a Mon Sep 17 00:00:00 2001 +From 4d677cf1770d9d78b518548efb6b2fe957408ef3 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Thu, 7 May 2020 18:16:08 +0100 -Subject: [PATCH 321/580] vc4_hdmi_regs: Make interrupt mask variant specific +Subject: [PATCH 321/661] vc4_hdmi_regs: Make interrupt mask variant specific Signed-off-by: Dom Cobley --- @@ -172352,10 +172352,10 @@ index be2c32a519b3..39630e9de1b0 100644 2.18.4 -From 1aa4802143cc733c907fa7427a58dd2d3039efa7 Mon Sep 17 00:00:00 2001 +From 14935f92444c301caec0c93ffa5f9bd50b0c1b5e Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Thu, 7 May 2020 18:16:08 +0100 -Subject: [PATCH 322/580] vc4_hdmi: Make irq shared +Subject: [PATCH 322/661] vc4_hdmi: Make irq shared Signed-off-by: Dom Cobley --- @@ -172380,10 +172380,10 @@ index 727619248923..e8a20404fe9b 100644 2.18.4 -From 72b9343847e27a37b286fe684167e2c06ae15521 Mon Sep 17 00:00:00 2001 +From 1ee688fc669b7a19cf114785fbefa60ba4149e29 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 19 May 2020 14:54:28 +0100 -Subject: [PATCH 323/580] drm/vc4: Adopt the dma configuration from the HVS or +Subject: [PATCH 323/661] drm/vc4: Adopt the dma configuration from the HVS or V3D component vc4_drv isn't necessarily under the /soc node in DT as it is a @@ -172440,10 +172440,10 @@ index 839610f8092a..de02c57ed276 100644 2.18.4 -From b5c8dd2b8e5b4105234abbdf84ea42d01d737ebc Mon Sep 17 00:00:00 2001 +From 30c5f189305ed429e422c4c6bae4c281bc507b53 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Tue, 23 Jun 2020 18:37:01 +0100 -Subject: [PATCH 324/580] vc4_hdmi: Set HD_CTL_WHOLSMP and HD_CTL_CHALIGN_SET +Subject: [PATCH 324/661] vc4_hdmi: Set HD_CTL_WHOLSMP and HD_CTL_CHALIGN_SET Symptom is random switching of speakers when using multichannel. @@ -172488,10 +172488,10 @@ index e8a20404fe9b..dd7c15bcce6d 100644 2.18.4 -From e0445a4cfddc0148f6699e5fbc7b2b8bb7b5720a Mon Sep 17 00:00:00 2001 +From f3392087053dc7ee6c6287b295d817568a3d53ac Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 10 Mar 2020 22:21:15 +0000 -Subject: [PATCH 325/580] vc4_hdmi: Set HDMI_MAI_FMT +Subject: [PATCH 325/661] vc4_hdmi: Set HDMI_MAI_FMT The hardware uses this for generating the right audio data island packets when using formats other than PCM @@ -172620,10 +172620,10 @@ index 39630e9de1b0..c10402e103d6 100644 2.18.4 -From 24610d4c2dfa6ac2a13fd2f2a28259a8106c1710 Mon Sep 17 00:00:00 2001 +From 761f30bd20fb44e1878dcedb731c900b05004bbb Mon Sep 17 00:00:00 2001 From: Matthias Reichl Date: Tue, 17 Mar 2020 12:12:22 +0100 -Subject: [PATCH 326/580] drm/vc4: add iec958 controls to vc4_hdmi +Subject: [PATCH 326/661] drm/vc4: add iec958 controls to vc4_hdmi Although vc4 get an IEC958 formatted stream passed in from userspace the driver needs the info from the channel status bits to properly @@ -172747,10 +172747,10 @@ index 16cc0e9abc36..c75d4c9e1515 100644 2.18.4 -From 0c21d3b8eaae4377415e11ae8a908348acfeaae2 Mon Sep 17 00:00:00 2001 +From 6549d9c4553d3ec6b9b8c3d1751d0060ea90a326 Mon Sep 17 00:00:00 2001 From: Matthias Reichl Date: Thu, 19 Mar 2020 20:00:35 +0100 -Subject: [PATCH 327/580] drm/vc4: move setup from hw_params to prepare +Subject: [PATCH 327/661] drm/vc4: move setup from hw_params to prepare Configuring HDMI audio registers in prepare allows us to take IEC958 bits into account which are set by the alsa hook after @@ -172811,10 +172811,10 @@ index 866f9e083ae4..b0780168e574 100644 2.18.4 -From 3ca155f06e3d23e5b805a498241429d7a6c82ba5 Mon Sep 17 00:00:00 2001 +From 3812f217623880efad4fc4a6a057abb8411d7351 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Fri, 10 Jul 2020 11:51:16 +0100 -Subject: [PATCH 328/580] drm/vc4: enable HBR MAI format on HBR streams +Subject: [PATCH 328/661] drm/vc4: enable HBR MAI format on HBR streams Signed-off-by: Matthias Reichl --- @@ -172842,10 +172842,10 @@ index b0780168e574..08cc24f23675 100644 2.18.4 -From 2eec85b51139aece4a6fe3696b605b19e6ed8b30 Mon Sep 17 00:00:00 2001 +From eafa7da26f1e3c6f2ac9b568cd82e29cc80d9297 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Thu, 25 Jun 2020 18:48:40 +0100 -Subject: [PATCH 329/580] vc4_hdmi: Remove firmware logic for MAI threshold +Subject: [PATCH 329/661] vc4_hdmi: Remove firmware logic for MAI threshold setting This was a workaround for bugs in hardware on earlier Pi models @@ -172895,10 +172895,10 @@ index 08cc24f23675..156d9e8ad869 100644 2.18.4 -From 83156ea622eef219849c1bcd8ee4b381cf920cc8 Mon Sep 17 00:00:00 2001 +From b2a7826a0d0c9c9df31953c87dbd924775d7d395 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Tue, 30 Jun 2020 11:23:49 +0100 -Subject: [PATCH 330/580] vc_hdmi: Set VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE +Subject: [PATCH 330/661] vc_hdmi: Set VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE Without this bit set, HDMI_MAI_FORMAT doesn't pick up the format and samplerate from DVP_CFG_MAI0_FMT and you @@ -172925,10 +172925,10 @@ index 156d9e8ad869..69b16d4d3e25 100644 2.18.4 -From 0846e839510e3d1827b43a7e9905d792ed111726 Mon Sep 17 00:00:00 2001 +From b4d65d996d075ff2b3ec3b5534e25b790947930e Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 20 Apr 2020 18:00:38 +0100 -Subject: [PATCH 331/580] vc4: Report channel mapping back to userspace +Subject: [PATCH 331/661] vc4: Report channel mapping back to userspace This follows logic in hdmi-codec.c to use speaker layout from ELD to choose a suitable speaker mapping based on @@ -173437,10 +173437,10 @@ index c75d4c9e1515..1680e1a56149 100644 2.18.4 -From ed70d37111bd91be4766753c07d6c2ee81d1fd7b Mon Sep 17 00:00:00 2001 +From e8b1710f5ed1fb691bfed8c378753c3668cb3878 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 24 Jan 2020 14:25:41 +0000 -Subject: [PATCH 332/580] drm/vc4: Add support for DRM_FORMAT_P030 to vc4 +Subject: [PATCH 332/661] drm/vc4: Add support for DRM_FORMAT_P030 to vc4 planes This currently doesn't handle non-zero source rectangles correctly, @@ -173606,10 +173606,10 @@ index af4b8944a603..ec591839810a 100644 2.18.4 -From 348e51c855915bcc1a2eb202459a237a908a9629 Mon Sep 17 00:00:00 2001 +From 7df746f4bf559c50e2e528d8d20379f90ff5ba1d Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 17 Sep 2019 18:28:17 +0100 -Subject: [PATCH 333/580] drm/vc4: Add support for YUV color encodings and +Subject: [PATCH 333/661] drm/vc4: Add support for YUV color encodings and ranges The BT601/BT709 color encoding and limited vs full @@ -173753,10 +173753,10 @@ index c10402e103d6..1f1ed7efaff7 100644 2.18.4 -From cc3e66e0a54a3b68a5dd4298231e799ea0e575f1 Mon Sep 17 00:00:00 2001 +From 875e24e1fdc0271e2b336076362b66e9a12cec8e Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 7 Sep 2020 17:32:27 +0100 -Subject: [PATCH 334/580] drm/vc4: Add firmware-kms mode +Subject: [PATCH 334/661] drm/vc4: Add firmware-kms mode This is a squash of all firmware-kms related patches from previous branches, up to and including @@ -176137,10 +176137,10 @@ index d0ee609a9043..05c6989ec4c6 100644 2.18.4 -From 1ad74d2b55baa7a4b7191e634d0d43e8fbcc276c Mon Sep 17 00:00:00 2001 +From fb9fc4735002c1948491bd765528b3899e8a920b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 19 May 2020 16:20:30 +0100 -Subject: [PATCH 335/580] drm/vc4: Add FKMS as an acceptable node for dma +Subject: [PATCH 335/661] drm/vc4: Add FKMS as an acceptable node for dma ranges. Under FKMS, the firmware (via FKMS) also requires the VideoCore cache @@ -176170,10 +176170,10 @@ index c8f9031fa946..d6576841d0fe 100644 2.18.4 -From 4c1c5d4c6f390d2820d191dcc75b2745d78d035f Mon Sep 17 00:00:00 2001 +From ce712c030a4672cb72b9e16a47f114d3934fd199 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Fri, 8 May 2020 10:00:12 +0100 -Subject: [PATCH 336/580] media: i2c: Add driver for Sony IMX477 sensor +Subject: [PATCH 336/661] media: i2c: Add driver for Sony IMX477 sensor Adds a driver for the 12MPix Sony IMX477 CSI2 sensor. Whilst the sensor supports 2 or 4 CSI2 data lanes, this driver @@ -178449,10 +178449,10 @@ index 000000000000..ec56b0cfd57b 2.18.4 -From 2325fcb4c0e47202efb735a6820992c03d67f3f5 Mon Sep 17 00:00:00 2001 +From 76d8a6eac60ab046a11de538e484a857d6be11d8 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Fri, 8 May 2020 09:41:17 +0100 -Subject: [PATCH 337/580] media: i2c: imx477: Add support for adaptive frame +Subject: [PATCH 337/661] media: i2c: imx477: Add support for adaptive frame control Use V4L2_CID_EXPOSURE_AUTO_PRIORITY to control if the driver should @@ -178637,10 +178637,10 @@ index ec56b0cfd57b..bd0e2c291a32 100644 2.18.4 -From 97ad8aa7150a5519f727856b8c6e477392f9d0ea Mon Sep 17 00:00:00 2001 +From 85395990ce7e1a8cc7da6ee90846e11ec8117a1e Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Tue, 19 May 2020 16:56:33 +0100 -Subject: [PATCH 338/580] media: i2c: imx477: Return correct result on sensor +Subject: [PATCH 338/661] media: i2c: imx477: Return correct result on sensor id verification The test should return -EIO if the register read id does not match @@ -178668,10 +178668,10 @@ index bd0e2c291a32..e42a8633087d 100644 2.18.4 -From 568da0bef29898a5b92840ca638464778518875a Mon Sep 17 00:00:00 2001 +From f8adeb3f85a654dd29c1c77a2bbc01c2b259c073 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sat, 4 Jul 2020 01:45:08 +0300 -Subject: [PATCH 339/580] media: i2c: imx477: Parse and register properties +Subject: [PATCH 339/661] media: i2c: imx477: Parse and register properties Parse device properties and register controls for them using the V4L2 fwnode properties helpers. @@ -178719,10 +178719,10 @@ index e42a8633087d..3fbb173fa079 100644 2.18.4 -From 67dee33ab56be7f642734402b9b0dad90d9bc6fb Mon Sep 17 00:00:00 2001 +From 55ab38d511f50132b956ed5459836a06fe90ce9b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 13 May 2020 18:28:27 +0100 -Subject: [PATCH 340/580] media: bcm2835-unicam: Always service interrupts +Subject: [PATCH 340/661] media: bcm2835-unicam: Always service interrupts From when bringing up the driver, there was a check in the isr to ignore interrupts (claiming them handled) should the driver @@ -178776,10 +178776,10 @@ index 35ddb97f7f75..d4ba911fe7e7 100644 2.18.4 -From 3df1fb370c0a9dd14a6bda196c6fb38a493bf06c Mon Sep 17 00:00:00 2001 +From a0ccdb178e6b55c7057a0bd10f4e159feb151407 Mon Sep 17 00:00:00 2001 From: Jacko Dirks Date: Tue, 5 May 2020 14:33:31 +0200 -Subject: [PATCH 341/580] media: bcm2835: unicam: Fix uninitialized warning +Subject: [PATCH 341/661] media: bcm2835: unicam: Fix uninitialized warning Signed-off-by: Jacko Dirks --- @@ -178803,10 +178803,10 @@ index d4ba911fe7e7..8b091d3a0d15 100644 2.18.4 -From 739f4d96675c39e658337300d3a3bd55fa51b001 Mon Sep 17 00:00:00 2001 +From 584eef173dbff81d4bb97f8d36ef739599940353 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 23 Jun 2020 15:14:05 +0100 -Subject: [PATCH 342/580] media: bcm2835-unicam: Fixup review comments from +Subject: [PATCH 342/661] media: bcm2835-unicam: Fixup review comments from Hans. Updates the driver based on the upstream review comments from @@ -179055,10 +179055,10 @@ index 8b091d3a0d15..7dc96c3e8e83 100644 2.18.4 -From 91a1f38a0c42e0028bee41444db75a8767cab139 Mon Sep 17 00:00:00 2001 +From 2d8026bc2171348373666eaad7c981ed5ffe4c78 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 19 May 2020 11:46:47 +0100 -Subject: [PATCH 343/580] media: bcm2835-unicam: Retain packing information on +Subject: [PATCH 343/661] media: bcm2835-unicam: Retain packing information on G_FMT The change to retrieve the pixel format always on g_fmt didn't @@ -179109,10 +179109,10 @@ index 7dc96c3e8e83..98ae97c367ea 100644 2.18.4 -From 4485f5f582ff0d857b9ea0bccc0d522c5e53f59b Mon Sep 17 00:00:00 2001 +From bd0959ec03b5454d035d160d810da2538fbae08d Mon Sep 17 00:00:00 2001 From: David Plowman Date: Thu, 28 May 2020 11:09:48 +0100 -Subject: [PATCH 344/580] media: bcm2835-unicam: change minimum number of +Subject: [PATCH 344/661] media: bcm2835-unicam: change minimum number of vb2_queue buffers to 1 Since the unicam driver was modified to write to a dummy buffer when no @@ -179143,10 +179143,10 @@ index 98ae97c367ea..6501fb205e20 100644 2.18.4 -From e76c174c30222bbdfa2268a4c6f0c9e571790f1d Mon Sep 17 00:00:00 2001 +From f62ca5dae1c50a8af5457779568dacb54f5493f6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 1 Sep 2020 18:15:27 +0100 -Subject: [PATCH 345/580] staging/fbtft: Add support for display variants +Subject: [PATCH 345/661] staging/fbtft: Add support for display variants Display variants are intended as a replacement for the now-deleted fbtft_device drivers. Drivers can register additional compatible @@ -179358,10 +179358,10 @@ index 76f8c090a837..f4f5ff0dc0c0 100644 2.18.4 -From e1ab32ee330be7eaccb7f91741dad29fff842b86 Mon Sep 17 00:00:00 2001 +From 8c432e357adf8046d6d8ac385b79e4bd6e9a862b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 3 Feb 2020 09:32:22 +0000 -Subject: [PATCH 346/580] brcmfmac: Increase power saving delay to 2s +Subject: [PATCH 346/661] brcmfmac: Increase power saving delay to 2s Increase the delay before entering the lower power state to 2 seconds (the maximum allowed) in order to reduce the packet latencies, @@ -179397,10 +179397,10 @@ index 38ef415cfbba..380a5ece63da 100644 2.18.4 -From 064ea97937244c388028258f56de5fe2500d773d Mon Sep 17 00:00:00 2001 +From 43641ae26ab0b993dfadefdce7881896ebebcc4d Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 21 Sep 2020 14:02:44 +0100 -Subject: [PATCH 347/580] rpivid_h265: Fix width/height typo +Subject: [PATCH 347/661] rpivid_h265: Fix width/height typo Signed-off-by: popcornmix --- @@ -179424,10 +179424,10 @@ index 47d4de42c584..b677910e237c 100644 2.18.4 -From 80fb26d15b0531bbc4c6c2e247692035976b3c0a Mon Sep 17 00:00:00 2001 +From 926caedc555c2c062bdbdd656d269f93e9e17bea Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 25 Sep 2020 15:07:23 +0100 -Subject: [PATCH 348/580] net: bcmgenet: Reset RBUF on first open +Subject: [PATCH 348/661] net: bcmgenet: Reset RBUF on first open If the RBUF logic is not reset when the kernel starts then there may be some data left over from any network boot loader. If the @@ -179500,10 +179500,10 @@ index ae7011c1e1f7..3cbfe5bebc57 100644 2.18.4 -From 9ed88ad17f4bbb024577c50de126b52482d5a5fb Mon Sep 17 00:00:00 2001 +From c290e68eac4c36358064e0d55f03fc3a40618c2d Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 28 Sep 2020 20:23:30 +0100 -Subject: [PATCH 349/580] char: Add broadcom char drivers back to build files +Subject: [PATCH 349/661] char: Add broadcom char drivers back to build files See: https://github.com/raspberrypi/linux/issues/3875 Signed-off-by: popcornmix @@ -179538,10 +179538,10 @@ index ffce287ef415..463ff9f136e4 100644 2.18.4 -From aaae5b523f1677d7fe3001e6869710739f4bb505 Mon Sep 17 00:00:00 2001 +From 072de597c2d7a0e47ec30ca6cacfeb5ee014f978 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 30 Sep 2020 19:23:43 +0100 -Subject: [PATCH 350/580] USB: gadget: f_hid: avoid crashes and log spam +Subject: [PATCH 350/661] USB: gadget: f_hid: avoid crashes and log spam Disconnecting and reconnecting the USB cable can lead to crashes and a variety of kernel log spam. Try to fix or minimise both. @@ -179604,10 +179604,10 @@ index 1125f4715830..8315fca29cff 100644 2.18.4 -From 524dcfc001798d7bca9ee366450f7132ed195dd0 Mon Sep 17 00:00:00 2001 +From 202442ba77ed5ebe61727b71b79874a261bf5d6a Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Wed, 7 Oct 2020 15:09:29 +0100 -Subject: [PATCH 351/580] dwc_otg: initialise sched_frame for periodic QHs that +Subject: [PATCH 351/661] dwc_otg: initialise sched_frame for periodic QHs that were parked If a periodic QH has no remaining QTDs, then it is removed from all @@ -179643,10 +179643,10 @@ index 2823dc9af63f..4503af692aef 100644 2.18.4 -From ea08834f8fbed3a4f44a75959f2327c552bc3c81 Mon Sep 17 00:00:00 2001 +From e352819843a6a65c7215bf487b286f691d392d17 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 8 Oct 2020 15:35:14 +0100 -Subject: [PATCH 352/580] staging: bcm2835-camera: Replace deprecated +Subject: [PATCH 352/661] staging: bcm2835-camera: Replace deprecated V4L2_PIX_FMT_BGR32 V4L2_PIX_FMT_BGR32 is deprecated as it is ambiguous over where @@ -179679,10 +179679,10 @@ index bea37cb163fc..e0a96dbb843d 100644 2.18.4 -From d84865398cff1d5851bd18aefa4c2aee841330fb Mon Sep 17 00:00:00 2001 +From 264168a8603bfb40e679d0a1829a460e1086a059 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 8 Oct 2020 18:49:52 +0100 -Subject: [PATCH 353/580] staging: vc04_services: Add new vc-sm-cma driver +Subject: [PATCH 353/661] staging: vc04_services: Add new vc-sm-cma driver Add Broadcom VideoCore Shared Memory support. @@ -182643,10 +182643,10 @@ index 000000000000..988fdd967922 2.18.4 -From 1523c5d10561f1e0470b1ba84467998a56279d5a Mon Sep 17 00:00:00 2001 +From c838123ef705a804a049eb70dacb83826faa0259 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 May 2020 18:09:04 +0100 -Subject: [PATCH 354/580] staging: vchiq-mmal: Add support for 14bit Bayer +Subject: [PATCH 354/661] staging: vchiq-mmal: Add support for 14bit Bayer Add in the missing defines. @@ -182676,10 +182676,10 @@ index 44ba91aa6d47..be8af09a6c80 100644 2.18.4 -From a2f5dc42978fb1d439b385fc31adff937a759c1e Mon Sep 17 00:00:00 2001 +From 08b33fb05293f69f3067709c20fad93b2f919e00 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 May 2020 18:11:14 +0100 -Subject: [PATCH 355/580] staging: mmal-vchiq: Add monochrome image formats +Subject: [PATCH 355/661] staging: mmal-vchiq: Add monochrome image formats Adds support for monochrome image formats in the various MIPI packings. @@ -182711,10 +182711,10 @@ index be8af09a6c80..897e6cdf8dd9 100644 2.18.4 -From 39393092088829c2e5d93aead61409a52b3d7bee Mon Sep 17 00:00:00 2001 +From 62644d7ab13de868759e6f60d008724395d9828a Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 25 Sep 2018 16:07:55 +0100 -Subject: [PATCH 356/580] staging: mmal-vchiq: Use vc-sm-cma to support zero +Subject: [PATCH 356/661] staging: mmal-vchiq: Use vc-sm-cma to support zero copy With the vc-sm-cma driver we can support zero copy of buffers between @@ -182885,10 +182885,10 @@ index e87f88f99338..247521fbcc1d 100644 2.18.4 -From cceb60efb6e4df5525807b844bbbc7fb2134003e Mon Sep 17 00:00:00 2001 +From 19599d31f23664640a265b7afaebfc25bee4c195 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 8 Oct 2020 20:24:12 +0100 -Subject: [PATCH 357/580] staging: vc04_services: Add a V4L2 M2M codec driver +Subject: [PATCH 357/661] staging: vc04_services: Add a V4L2 M2M codec driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -185975,10 +185975,10 @@ index 000000000000..d490ff67f747 2.18.4 -From f86cbf0fc9952cdf944ff9942e813cf8128ef144 Mon Sep 17 00:00:00 2001 +From ea8bd5bf21d124d163d973ae1f35c376b408d81a Mon Sep 17 00:00:00 2001 From: Matthias Reichl Date: Sun, 11 Oct 2020 00:48:55 +0200 -Subject: [PATCH 358/580] bcm2835-dma: only reserve channel 0 if legacy dma +Subject: [PATCH 358/661] bcm2835-dma: only reserve channel 0 if legacy dma driver is enabled If CONFIG_DMA_BCM2708 isn't enabled there's no need to mask out @@ -186013,10 +186013,10 @@ index d1127b9058a4..0cbfa9d559a2 100644 2.18.4 -From 1e587e6d1d8db4c800e3c43e17c77ceda9fdbbab Mon Sep 17 00:00:00 2001 +From fd078dcd42eed8ef1865248d0c9e0e8501917539 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 12 Oct 2020 17:03:14 +0100 -Subject: [PATCH 359/580] uapi: bcm2835-isp: Add bcm2835-isp uapi header file +Subject: [PATCH 359/661] uapi: bcm2835-isp: Add bcm2835-isp uapi header file This file defines the userland interface to the bcm2835-isp driver that will follow in a separate commit. @@ -186358,10 +186358,10 @@ index 000000000000..cf8c0437f159 2.18.4 -From a9f48389b409fa85f56e2c0f68e39b283fd15574 Mon Sep 17 00:00:00 2001 +From 8547b002e6a4b4542e2de3360fca11448c7bf283 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 23 Apr 2020 10:17:37 +0100 -Subject: [PATCH 360/580] staging: vc04_services: ISP: Add a more complex ISP +Subject: [PATCH 360/661] staging: vc04_services: ISP: Add a more complex ISP processing component Driver for the BCM2835 ISP hardware block. This driver uses the MMAL @@ -188793,10 +188793,10 @@ index 89059bca0b77..5b596b5c057f 100644 2.18.4 -From acb3813bd42b7c8838a2e210c4bd4cbb4e789b3b Mon Sep 17 00:00:00 2001 +From 323c2e9181893d7a26bd0a828f2d7feacef752b6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 31 Jul 2019 17:36:34 +0100 -Subject: [PATCH 361/580] drm/vc4: A present but empty dmas disables audio +Subject: [PATCH 361/661] drm/vc4: A present but empty dmas disables audio Overlays are unable to remove properties in the base DTB, but they can overwrite them. Allow a present but empty 'dmas' property @@ -188832,10 +188832,10 @@ index 69994693c23d..05f841ff4f19 100644 2.18.4 -From 20447426cdd500fcc65fb5cedb55101748e5bbb9 Mon Sep 17 00:00:00 2001 +From e3cad57f028e7251e9e71f1d406ef6ae8cbec532 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 6 Oct 2020 18:44:42 +0100 -Subject: [PATCH 362/580] drm/vc4: Add debugfs node that dumps the current +Subject: [PATCH 362/661] drm/vc4: Add debugfs node that dumps the current display lists This allows easy analysis of display lists when debugging. @@ -188908,10 +188908,10 @@ index ad691571d759..b5015d036d46 100644 2.18.4 -From 6b1901e34b3b8ce49e33eca566199dc39e725fca Mon Sep 17 00:00:00 2001 +From 60e0cce5fd51cfb68984598e9093f129fed0d098 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 30 Sep 2020 12:00:54 +0100 -Subject: [PATCH 363/580] gpio: Add gpio-fsm driver +Subject: [PATCH 363/661] gpio: Add gpio-fsm driver The gpio-fsm driver implements simple state machines that allow GPIOs to be controlled in response to inputs from other GPIOs - real and @@ -190104,10 +190104,10 @@ index 000000000000..eb40cfdc71df 2.18.4 -From f68b08614d4b42795bd2080ae7cc9748a4ceebed Mon Sep 17 00:00:00 2001 +From 2445297d49a048ac3bb828704d16eb64a83e39ad Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 21 Oct 2020 18:34:56 +0100 -Subject: [PATCH 364/580] drm/vc4: Add all the HDMI registers into the debugfs +Subject: [PATCH 364/661] drm/vc4: Add all the HDMI registers into the debugfs dumps The vc5 HDMI registers hadn't been added into the debugfs @@ -190215,10 +190215,10 @@ index 1680e1a56149..1eb1fc0d95a3 100644 2.18.4 -From 731b7411a1ce040781e09356aa665129988aa746 Mon Sep 17 00:00:00 2001 +From a4f48a7bd74cee568d25bfee7cb575584bf59bdb Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 19 Mar 2020 10:04:46 +0000 -Subject: [PATCH 365/580] ARM: dts: bcm271x: Use a53 pmu, drop RPI364 +Subject: [PATCH 365/661] ARM: dts: bcm271x: Use a53 pmu, drop RPI364 The upstream bcm2837.dtsi uses cortex-a53-pmu, so we can do the same but with a fallback to the cortex-a7-pmu which is supported by the @@ -190298,10 +190298,10 @@ index 1fd86f81f542..bf69a4b0b172 100644 2.18.4 -From 03674b1815c4c4a998db5661238c8616b9884400 Mon Sep 17 00:00:00 2001 +From 07e9c2b8073e9c871563d0c909f33142092ce081 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 23 Oct 2020 14:15:41 +0100 -Subject: [PATCH 366/580] overlays: Add option to disable composite to +Subject: [PATCH 366/661] overlays: Add option to disable composite to vc4-kms-v3d Composite gets enabled automatically if HDMI isn't detected, @@ -190342,10 +190342,10 @@ index 6d34a2bff49b..5a4efdeed663 100644 2.18.4 -From 15bf08ee520118b86b3a8fe87f6703e0136f1411 Mon Sep 17 00:00:00 2001 +From cdf0f9c6bf25596278d19748792d5fb51e766827 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 11 Mar 2020 12:07:57 +0000 -Subject: [PATCH 367/580] overlays: imx219: Correct link frequency to match the +Subject: [PATCH 367/661] overlays: imx219: Correct link frequency to match the upstream driver The upstream driver is checking the link frequency parameter, and @@ -190373,10 +190373,10 @@ index 3484bde5a9e8..dce07b335c4e 100644 2.18.4 -From 427593ebde16a4dff8c1de69b1b1f0626a7ee4ee Mon Sep 17 00:00:00 2001 +From 50fc5a7b774a828c55a5dead95e392885ac3874c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 23 Oct 2020 15:45:11 +0100 -Subject: [PATCH 368/580] dts: Add CM4 to arm64 dt files +Subject: [PATCH 368/661] dts: Add CM4 to arm64 dt files Signed-off-by: Dave Stevenson --- @@ -190410,10 +190410,10 @@ index 000000000000..8064a58155f1 2.18.4 -From 1cd181bd518047b8f8a932c88c43ea97617a6563 Mon Sep 17 00:00:00 2001 +From c9f1375d82973aec19cae66f5c5146ee274f29e5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 26 Oct 2020 12:38:27 +0000 -Subject: [PATCH 369/580] drm/vc4: Add the 2711 HVS as a suitable DMA node +Subject: [PATCH 369/661] drm/vc4: Add the 2711 HVS as a suitable DMA node With vc4-drv node not being under /soc on Pi4, we need to adopt the correct DMA parameters from a suitable sub-component. @@ -190440,10 +190440,10 @@ index d6576841d0fe..617c113b033f 100644 2.18.4 -From 1a19f5ccc9befbd4120025f095cd6427e387bb4b Mon Sep 17 00:00:00 2001 +From 970a2c930de7bfe4ba58cba84da2d2135d5700b0 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Mon, 26 Oct 2020 14:03:35 +0000 -Subject: [PATCH 370/580] xhci: quirks: add link TRB quirk for VL805 +Subject: [PATCH 370/661] xhci: quirks: add link TRB quirk for VL805 The VL805 controller can't cope with the TR Dequeue Pointer for an endpoint being set to a Link TRB. The hardware-maintained endpoint context ends up @@ -190511,10 +190511,10 @@ index 4f24ad7eccd9..2cc777f66cdf 100644 2.18.4 -From 6ac8394a3f5f4c77f32b6f130795aa35c05e414a Mon Sep 17 00:00:00 2001 +From 55f54458b41731b2cd3245d6096a1fcac49b6ca3 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Oct 2020 15:01:21 +0000 -Subject: [PATCH 371/580] dts: Tidy the Raspberry Pi Makefile entries +Subject: [PATCH 371/661] dts: Tidy the Raspberry Pi Makefile entries Signed-off-by: Phil Elwell --- @@ -190562,10 +190562,10 @@ index 1e861e2bf2e0..996e670a6018 100644 2.18.4 -From eac1158ceab053dcee3c7700af1f19c69692c573 Mon Sep 17 00:00:00 2001 +From 30d4cabd4a209385100895fe84cd9793ad0dcaff Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Oct 2020 10:23:22 +0000 -Subject: [PATCH 372/580] staging: bcm2835-audio: Add disable-headphones flag +Subject: [PATCH 372/661] staging: bcm2835-audio: Add disable-headphones flag Add a property to allow the headphone output to be disabled. Use an integer property rather than a boolean so that an overlay can clear it. @@ -190602,10 +190602,10 @@ index a0cba3823e5e..ccda115ab9e0 100644 2.18.4 -From 8d77680e6ad5a1e1a1d2de810c76a77f3110a2ba Mon Sep 17 00:00:00 2001 +From 09217414c92b9854c4e03afd617c42d7d3ce9953 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Oct 2020 10:18:50 +0000 -Subject: [PATCH 373/580] ARM: dts: Disable headphone audio on Zeroes, CM4 +Subject: [PATCH 373/661] ARM: dts: Disable headphone audio on Zeroes, CM4 Signed-off-by: Phil Elwell --- @@ -190654,10 +190654,10 @@ index 0ca3a0126220..fa7b16040f36 100644 2.18.4 -From 2b4a34d1170dfa23e4156dc31e6bbf8f65afd177 Mon Sep 17 00:00:00 2001 +From 6b0aebc021ff88b58d394d96f7277a1a6df74e39 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Oct 2020 10:21:23 +0000 -Subject: [PATCH 374/580] overlays: Enable headphone audio in audremap +Subject: [PATCH 374/661] overlays: Enable headphone audio in audremap Signed-off-by: Phil Elwell --- @@ -190686,10 +190686,10 @@ index d624bb3a3fea..7324890ead86 100644 2.18.4 -From 5de1ebc8ff1dc6de626c0bde7f32b388454a6cc1 Mon Sep 17 00:00:00 2001 +From 29a96fbd2b7f4fdd0df8f0af43e14e50d6ec5bb8 Mon Sep 17 00:00:00 2001 From: Serge Schneider Date: Mon, 26 Oct 2020 16:38:21 +0000 -Subject: [PATCH 375/580] rpisense-fb: Set pseudo_pallete to prevent crash on +Subject: [PATCH 375/661] rpisense-fb: Set pseudo_pallete to prevent crash on fbcon takeover Signed-off-by: Serge Schneider @@ -190722,10 +190722,10 @@ index 26432a5a0b4b..325977def531 100644 2.18.4 -From 3ce4d499ff100e26563c88077cdfafa9fc1e2447 Mon Sep 17 00:00:00 2001 +From 11aba9c4a83f20c486689ed564ec4162aae135dd Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Oct 2020 10:35:43 +0000 -Subject: [PATCH 376/580] ARM: dts: Expand PCIe space on BCM2711 +Subject: [PATCH 376/661] ARM: dts: Expand PCIe space on BCM2711 Attempts to connect external GPUs to Compute Module 4's PCIe bus have highlighted that the existing "outbound window" - the fraction of the @@ -190758,10 +190758,10 @@ index b4a18b627359..8ad6c3012fe3 100644 2.18.4 -From 945ba7698b38ef62383389445c241d6093b1afd2 Mon Sep 17 00:00:00 2001 +From 8e63c5d11705cd4d7297fb16d5863dddfff14b76 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 26 Oct 2020 21:51:29 +0000 -Subject: [PATCH 377/580] configs: Set RASPBERRYPI_FIRMWARE for arm64 bcm2711 +Subject: [PATCH 377/661] configs: Set RASPBERRYPI_FIRMWARE for arm64 bcm2711 RASPBERRYPI_FIRMWARE was missing from the arm64 bcm2711_defconfig. bcmrpi3_defconfig was also missing a few options. Add the misssing @@ -190912,10 +190912,10 @@ index d542d2522076..6247c74639f7 100644 2.18.4 -From 2d602aede01e16d8e74e7087e6ffefbca8c63cfa Mon Sep 17 00:00:00 2001 +From 48b52d116783c96e0a1e387e87c7a9ad99ea0947 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 27 Oct 2020 09:59:49 +0000 -Subject: [PATCH 378/580] dwc_otg: Minimise header and fix build warnings +Subject: [PATCH 378/661] dwc_otg: Minimise header and fix build warnings Delete a large amount of unused declaration from "usb.h", some of which were causing build warnings, and get the module building cleanly. @@ -191817,10 +191817,10 @@ index e55ea9c74be4..76e94b4ebb43 100644 2.18.4 -From eb5836045993841b7b982b045705b08d63ba3d29 Mon Sep 17 00:00:00 2001 +From cb095882eba2bd76bbb609e7f43c7f52bfcc9c56 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 27 Oct 2020 12:10:04 +0000 -Subject: [PATCH 379/580] gpio-fsm: Fix a build warning +Subject: [PATCH 379/661] gpio-fsm: Fix a build warning Signed-off-by: Phil Elwell --- @@ -191845,10 +191845,10 @@ index eb8b4d58d2d0..2cab50e51315 100644 2.18.4 -From 3ade5aa724d334428176e469216bba16f0900f00 Mon Sep 17 00:00:00 2001 +From d22cbaa4db4467d631049b9736b182bc71bdf397 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 27 Oct 2020 12:10:40 +0000 -Subject: [PATCH 380/580] rpivid_h625: Fix build warnings +Subject: [PATCH 380/661] rpivid_h625: Fix build warnings Signed-off-by: Phil Elwell --- @@ -191919,10 +191919,10 @@ index b677910e237c..fc3caed58187 100644 2.18.4 -From d0c9d9d8d3b74573eb137ddbc43a5f6ce118907d Mon Sep 17 00:00:00 2001 +From d520a313f14f546f1bb885cf13d3bf81820b07ec Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 27 Oct 2020 12:12:22 +0000 -Subject: [PATCH 381/580] bcm2708_fb: Fix a build warning +Subject: [PATCH 381/661] bcm2708_fb: Fix a build warning Signed-off-by: Phil Elwell --- @@ -191947,10 +191947,10 @@ index dac5c021ce52..365c5b96b8a0 100644 2.18.4 -From d03acdde125fcf72304d8eb7f07de34d8f8b53a4 Mon Sep 17 00:00:00 2001 +From 6569602273d4f58775cdaa8ea9c056ab478a0d2b Mon Sep 17 00:00:00 2001 From: David Knell Date: Wed, 28 Oct 2020 14:18:42 +0000 -Subject: [PATCH 382/580] PiFi-40 defconfigs +Subject: [PATCH 382/661] PiFi-40 defconfigs Signed-off-by: David Knell --- @@ -192025,10 +192025,10 @@ index 6247c74639f7..bc02ce537715 100644 2.18.4 -From d744d04ad8a7e07e9ca1d3d56766e2c662a8c2bc Mon Sep 17 00:00:00 2001 +From 93c1dc6b55d4e96ccaeb6c38154e663062f77320 Mon Sep 17 00:00:00 2001 From: David Knell Date: Wed, 28 Oct 2020 14:20:56 +0000 -Subject: [PATCH 383/580] PiFi-40 Devicetree files +Subject: [PATCH 383/661] PiFi-40 Devicetree files Signed-off-by: David Knell --- @@ -192127,10 +192127,10 @@ index 000000000000..51a20e54977f 2.18.4 -From aec991c6de23efedf12de2f8f8dd0e5126507c60 Mon Sep 17 00:00:00 2001 +From bab570b9a9953695157a74dca2f839a052096c92 Mon Sep 17 00:00:00 2001 From: David Knell Date: Wed, 28 Oct 2020 14:21:37 +0000 -Subject: [PATCH 384/580] PiFi-40 driver, Makefile and Kconfig +Subject: [PATCH 384/661] PiFi-40 driver, Makefile and Kconfig Signed-off-by: David Knell --- @@ -192470,10 +192470,10 @@ index 000000000000..ae699fb0485c 2.18.4 -From 5efda6a22471f967f2a6808bec81ac8af67f38b1 Mon Sep 17 00:00:00 2001 +From 8416452410edfde08bd2e784178cddcfc857a5ed Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Tue, 27 Oct 2020 12:24:14 +0000 -Subject: [PATCH 385/580] bcm2835-pcm: Fix up multichannel pcm audio +Subject: [PATCH 385/661] bcm2835-pcm: Fix up multichannel pcm audio Fixes: a9c1660ff5f02d048c5f31abf1fd1108ccf9ef87 Signed-off-by: Dom Cobley @@ -192531,10 +192531,10 @@ index 3c0033101e6e..fa5cf5b9550f 100644 2.18.4 -From 73c50c20d7512930dcc9aabb48dcb8648d4910ba Mon Sep 17 00:00:00 2001 +From 32746a97aeb8e88b3fbe6c53ac5646ae559b215a Mon Sep 17 00:00:00 2001 From: Tim Gover Date: Thu, 22 Oct 2020 15:30:55 +0100 -Subject: [PATCH 386/580] watchdog: bcm2835: Ignore params after the partition +Subject: [PATCH 386/661] watchdog: bcm2835: Ignore params after the partition number Use sscanf to extract the partition number and ignore extra parameters @@ -192566,10 +192566,10 @@ index 62937e6f83ca..de25e3682f03 100644 2.18.4 -From fc96b88911191b80a7236791d6f0b2fbe093e944 Mon Sep 17 00:00:00 2001 +From 74b067eb56da02d16bef51127f0a6a41e86c59c8 Mon Sep 17 00:00:00 2001 From: Tim Gover Date: Tue, 20 Oct 2020 11:55:37 +0100 -Subject: [PATCH 387/580] firmware: raspberrypi: Add support for tryonce reboot +Subject: [PATCH 387/661] firmware: raspberrypi: Add support for tryonce reboot flag Define a new mailbox (SET_REBOOT_FLAGS) which may be used to @@ -192646,10 +192646,10 @@ index 05c6989ec4c6..6b393bbe7f52 100644 2.18.4 -From c0d2283e18c5b642603bda845adef65250d98fde Mon Sep 17 00:00:00 2001 +From 282223c12442b9128678f7dacfe861620fa92ef6 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Tue, 14 May 2019 17:00:41 +0100 -Subject: [PATCH 388/580] phy: broadcom: split out the BCM54213PE from the +Subject: [PATCH 388/661] phy: broadcom: split out the BCM54213PE from the BCM54210E IDs The last nibble is a revision ID, and the 54213pe is a later rev @@ -192724,10 +192724,10 @@ index 54665952d6ad..92948c26da2a 100644 2.18.4 -From d890cb1d76bf086acf9dc290b3595e48be0a4b66 Mon Sep 17 00:00:00 2001 +From 4bd679a032ce807ae9de2dcebecf901ec44d7c12 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 29 Oct 2020 14:10:56 +0000 -Subject: [PATCH 389/580] phy: broadcom: Add bcm54213pe configuration +Subject: [PATCH 389/661] phy: broadcom: Add bcm54213pe configuration Signed-off-by: Phil Elwell --- @@ -192764,10 +192764,10 @@ index 671517aae345..8b0ac38742d0 100644 2.18.4 -From d70982c21018e439cd1693f391264bf67f17064a Mon Sep 17 00:00:00 2001 +From 3b86b9e787571a692506cb1356f2ad6c4a054cd1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 2 Nov 2020 14:56:18 +0000 -Subject: [PATCH 390/580] configs: Add CONFIG_MAX31856=m +Subject: [PATCH 390/661] configs: Add CONFIG_MAX31856=m Enable support for MAX31856 temperature sensors. @@ -192846,10 +192846,10 @@ index bc02ce537715..680b51ab0642 100644 2.18.4 -From 25eefbdaa40fbd92c37b86f9ba7bcb7a29df03df Mon Sep 17 00:00:00 2001 +From d0c9fc81d5ed5904b0a9811eabe863feaf173301 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 22 Oct 2020 17:11:12 +0100 -Subject: [PATCH 391/580] overlays: Add MAX31856 support to maxtherm overlay +Subject: [PATCH 391/661] overlays: Add MAX31856 support to maxtherm overlay Extend the maxtherm overlay with support for the MAX31856. The driver reads the thermocouple type from a property, which is much @@ -192956,10 +192956,10 @@ index 34d5727069ec..9964e246c14f 100644 2.18.4 -From b2b3f4d0a841a041dc2f784b526d2a0d1d5f24e9 Mon Sep 17 00:00:00 2001 +From e014bfa676797988c395c6bb7888afb7b202c89f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 14 Jul 2020 14:21:33 +0100 -Subject: [PATCH 392/580] ARM: dts: Add bcm2711-rpi-400.dts +Subject: [PATCH 392/661] ARM: dts: Add bcm2711-rpi-400.dts Signed-off-by: Phil Elwell --- @@ -193627,10 +193627,10 @@ index 000000000000..90c2b5a195d4 2.18.4 -From b30022ad94ec7e3834735fd8e2f6f7478039ca62 Mon Sep 17 00:00:00 2001 +From 394ca7c3379dec80c366d6bc32a67ba5a696a25b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 4 Nov 2020 11:25:02 +0000 -Subject: [PATCH 393/580] overlays: Deprecate and delete the sdtweak overlay +Subject: [PATCH 393/661] overlays: Deprecate and delete the sdtweak overlay The sdtweak overlay has been superseded by the board-specific sd_* parameters such as sd_poll_once, sd_overclock etc. @@ -193752,10 +193752,10 @@ index 38157d2f9bf3..000000000000 2.18.4 -From 8adfab319df6346bae904c47da89819127d44f40 Mon Sep 17 00:00:00 2001 +From e356cab033e5921e124abb4d410eb541e7aa14d0 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 5 Nov 2020 11:39:35 +0000 -Subject: [PATCH 394/580] ARM: dts: bcm27xx: Remove enable_headphones setting +Subject: [PATCH 394/661] ARM: dts: bcm27xx: Remove enable_headphones setting The enable_headphones parameter of the snd_bcm2835 module is forced to 1 if enable_compat_alsa is 0, so setting them both on the kernel @@ -193882,10 +193882,10 @@ index fa7b16040f36..49c69fdaef49 100644 2.18.4 -From 939e93d3242981f87a67b0b1e13d0e09c0d9c742 Mon Sep 17 00:00:00 2001 +From 04275f8e1c9cd4f1256712405aa1263f6dd2985b Mon Sep 17 00:00:00 2001 From: menschel Date: Fri, 6 Nov 2020 23:32:22 +0100 -Subject: [PATCH 395/580] configs: Add CAN_MCP251XFD=m and CAN_ISOTP=m +Subject: [PATCH 395/661] configs: Add CAN_MCP251XFD=m and CAN_ISOTP=m * Add mcp251xfd driver module to the RPi kernel builds. * Add isotp can protocol module to the RPi kernel builds. @@ -193977,10 +193977,10 @@ index 680b51ab0642..ff74c23ef24e 100644 2.18.4 -From a68bdb23a4ee3bbbb72cbb3f1d1a04b5ee07401e Mon Sep 17 00:00:00 2001 +From 0d984c0250e11a8886fcd66e2a7b3866772c4287 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 9 Nov 2020 19:49:32 +0000 -Subject: [PATCH 396/580] vc4_hdmi: Report that 3d/stereo is allowed +Subject: [PATCH 396/661] vc4_hdmi: Report that 3d/stereo is allowed Signed-off-by: Dom Cobley --- @@ -194003,10 +194003,10 @@ index c04e54752991..63e9dd62cde8 100644 2.18.4 -From 6918ae05e5c6a2110877bc3fded2465d0a9c5b90 Mon Sep 17 00:00:00 2001 +From 2294daf6d9536b14e739ee8d5f7a61017db6342b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 11 Nov 2020 17:08:33 +0000 -Subject: [PATCH 397/580] PCI: brcmstb: Restore initial fundamental reset +Subject: [PATCH 397/661] PCI: brcmstb: Restore initial fundamental reset [1] replaced a single reset function with a pointer to one of two implementations, but also removed the call asserting the reset @@ -194044,10 +194044,10 @@ index fea54f6fb7b1..bd0263d739c9 100644 2.18.4 -From 85202ea8e3c41a612bd527d35a2f8bb5ac81f938 Mon Sep 17 00:00:00 2001 +From f018b6e548a19a86519ff711e9c3999e423eb435 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Tue, 10 Nov 2020 20:04:08 +0000 -Subject: [PATCH 398/580] vc4: Clear unused infoframe packet RAM registers +Subject: [PATCH 398/661] vc4: Clear unused infoframe packet RAM registers Using a hdmi analyser the bytes in packet ram registers beyond the length were visible in the @@ -194095,10 +194095,10 @@ index 63e9dd62cde8..4a3e020364af 100644 2.18.4 -From 69029ecd030d7bdb2a6556ff45f5cb7ffc0c0caf Mon Sep 17 00:00:00 2001 +From 625e714fb23f845432bfb4928827800a2bf2c7d8 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 6 Nov 2020 18:45:10 +0000 -Subject: [PATCH 399/580] Input: edt-ft5x06: Poll the device if no interrupt is +Subject: [PATCH 399/661] Input: edt-ft5x06: Poll the device if no interrupt is configured. Not all systems have the interrupt line wired up, so switch to @@ -194198,10 +194198,10 @@ index 6ff81d48da86..7e8acc0c19be 100644 2.18.4 -From 8f96c85c4fa847a7e751d4a47f546eb6ae8cfc99 Mon Sep 17 00:00:00 2001 +From 30938288c8ca9034af62ddd388772bfbd305ca48 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 6 Nov 2020 18:52:25 +0000 -Subject: [PATCH 400/580] dtoverlays: Add an overlay for the EDT FT5406 +Subject: [PATCH 400/661] dtoverlays: Add an overlay for the EDT FT5406 touchscreen This touchscreen controller is used by the 7" DSI panel, and @@ -194305,10 +194305,10 @@ index 000000000000..407af59bf468 2.18.4 -From 4be4b6378cdf4b804e84ff34937324f679fb1b60 Mon Sep 17 00:00:00 2001 +From a87c5ed6e2b6cacfc30e3f57e1b70d24db527028 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 23 Apr 2020 10:17:18 +0100 -Subject: [PATCH 401/580] drm/panel/raspberrypi-touchscreen: Use independent +Subject: [PATCH 401/661] drm/panel/raspberrypi-touchscreen: Use independent I2C actions with delay. We now have the hardware I2C controller pinmuxed to the drive the @@ -194369,10 +194369,10 @@ index 5e9ccefb88f6..7ebb5ee2a47d 100644 2.18.4 -From 43e5511ab5861e8be1cb083bb66f8b51393bb4e0 Mon Sep 17 00:00:00 2001 +From 3d06e177da7d66b36e005d4f61bab35a895a7afe Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 10 Nov 2020 11:21:56 +0000 -Subject: [PATCH 402/580] drm/panel/raspberrypi-ts: Insert delay before polling +Subject: [PATCH 402/661] drm/panel/raspberrypi-ts: Insert delay before polling for startup state In switching to the hardware I2C controller there is an issue @@ -194401,10 +194401,10 @@ index 7ebb5ee2a47d..abb8a8586b6f 100644 2.18.4 -From b76abb75f99d59a4f99fc7b8d902c48e8d9943a8 Mon Sep 17 00:00:00 2001 +From 6e7a3b274fe9415a4792332ffa3540547ba49dbc Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 10 Nov 2020 17:49:35 +0000 -Subject: [PATCH 403/580] Add devicetree support for RaspberryPi 7" panel over +Subject: [PATCH 403/661] Add devicetree support for RaspberryPi 7" panel over DSI I2C Signed-off-by: Dave Stevenson @@ -194512,10 +194512,10 @@ index 000000000000..086f4ffd633a 2.18.4 -From 96d8306fc1be679607e18d20bf78c7af48e9d148 Mon Sep 17 00:00:00 2001 +From 58eb297facde5887c239c9927579f83e484433dc Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Fri, 15 Nov 2019 00:54:07 +0100 -Subject: [PATCH 404/580] mcp251xfd: add overlay +Subject: [PATCH 404/661] mcp251xfd: add overlay Signed-off-by: Marc Kleine-Budde --- @@ -194806,10 +194806,10 @@ index 000000000000..65c861bbd340 2.18.4 -From ee70852d50ac13430b62a59f8801c1a7d50bee6f Mon Sep 17 00:00:00 2001 +From cd8e5a04f02cd519d748dc30e16a4a0aa9da0304 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 23 Nov 2020 14:53:14 +0000 -Subject: [PATCH 405/580] configs: Regenerate the defconfigs +Subject: [PATCH 405/661] configs: Regenerate the defconfigs The CAN_ISOTP setting was in the wrong position, and it's better for bisecting and reverting if this doesn't get rolled into the next @@ -194921,10 +194921,10 @@ index ff74c23ef24e..6939accc59bf 100644 2.18.4 -From 426db5292181bb4285037047b660a04e3db8fc2e Mon Sep 17 00:00:00 2001 +From baef4cb9b6bf742ea739d74ebb4da894aeedf84e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 23 Nov 2020 14:56:18 +0000 -Subject: [PATCH 406/580] configs: Restore BRIDGE_NETFILTER=m +Subject: [PATCH 406/661] configs: Restore BRIDGE_NETFILTER=m CONFIG_BRIDGE_NETFILTER=m used to be the default when CONFIG_NETFILTER was enabled, but that was removed in 5.9. The way that defconfigs work @@ -195006,10 +195006,10 @@ index 6939accc59bf..88ae301afcb4 100644 2.18.4 -From 13f1dc18b8edcc2a1cfe5b739c75d0b90d2999ef Mon Sep 17 00:00:00 2001 +From cb6cf6a020a8e1a47e5359d367410aa4278c7cb6 Mon Sep 17 00:00:00 2001 From: MichaIng Date: Mon, 23 Nov 2020 16:17:31 +0100 -Subject: [PATCH 407/580] configs: Enable WireGuard kernel module on armhf +Subject: [PATCH 407/661] configs: Enable WireGuard kernel module on armhf configs CONFIG_WIREGUARD=m implies CONFIG_ARM_CRYPTO=y, hence the latter is removed. @@ -195085,10 +195085,10 @@ index d8484c28caed..77c400a1ecd9 100644 2.18.4 -From 8962db50b7e6ea6d62aa0ad10ae2f8042a05098b Mon Sep 17 00:00:00 2001 +From 86c9a2178a3fa809960f86aaaf99bcef8e34d39c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Sun, 22 Nov 2020 11:01:08 +0000 -Subject: [PATCH 408/580] media: ov9281: Add 1280x720 and 640x480 modes +Subject: [PATCH 408/661] media: ov9281: Add 1280x720 and 640x480 modes Breaks out common register set and adds the different registers for 1280x720 (cropped) and 640x480 (skipped) modes @@ -195300,10 +195300,10 @@ index 9610c24ceff1..12621c2dccd5 100644 2.18.4 -From 932b1f357f91fd8cfb60ed7281bc353a50b7bdd9 Mon Sep 17 00:00:00 2001 +From b2b43f21760ac56b31f0c8d50185e9625cb97400 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 11 Nov 2020 17:18:01 +0000 -Subject: [PATCH 409/580] drm/vc4: Add support for DSI0 +Subject: [PATCH 409/661] drm/vc4: Add support for DSI0 DSI0 was partially supported, but didn't register with the main driver, and the code was inconsistent as to whether it checked @@ -195381,10 +195381,10 @@ index eaf276978ee7..1680adf9fe31 100644 2.18.4 -From af405a7c111bb566140622c768357df974c21969 Mon Sep 17 00:00:00 2001 +From 6658d61b1de033e202bb74e4a58e6dd18bce219c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 12 Nov 2020 17:01:52 +0000 -Subject: [PATCH 410/580] dt-bindings: Add compatible for BCM2711 DSI1 +Subject: [PATCH 410/661] dt-bindings: Add compatible for BCM2711 DSI1 DSI1 on BCM2711 doesn't require the DMA workaround that is used on BCM2835/6/7, therefore it needs a new compatible string. @@ -195410,10 +195410,10 @@ index eb44e072b6e5..90ee069ada8d 100644 2.18.4 -From e04ac9c0cac6cb768a3a9bb6be1007f3908af95d Mon Sep 17 00:00:00 2001 +From 7eedbb6c2f586e7908ad58eb11badddc676a74d8 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 12 Nov 2020 17:18:13 +0000 -Subject: [PATCH 411/580] drm/vc4: Add configuration for BCM2711 DSI1. +Subject: [PATCH 411/661] drm/vc4: Add configuration for BCM2711 DSI1. BCM2711 DSI1 doesn't have the issue with the ARM not being able to write to the registers, therefore remove the DMA @@ -195455,10 +195455,10 @@ index 1680adf9fe31..0cd40d31e82d 100644 2.18.4 -From 05af89a350ffff5c971f0cbc849335a9d1b695c3 Mon Sep 17 00:00:00 2001 +From 8e2fa8ed5a5f45ca06ef1030e30de37df16add10 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 12 Nov 2020 18:42:30 +0000 -Subject: [PATCH 412/580] dt: Use compatible string for BCM2711 DSI1 +Subject: [PATCH 412/661] dt: Use compatible string for BCM2711 DSI1 Updates the compatible string for DSI1 on BCM2711 to differentiate it from BCM2835. @@ -195484,10 +195484,10 @@ index 8ad6c3012fe3..7c2d374cb749 100644 2.18.4 -From 929b9795706dbfeea71aa5fb174054f7995018df Mon Sep 17 00:00:00 2001 +From 698dcf29714d248902d0c342b2b198ef21ca9cb7 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 30 Nov 2020 16:16:03 +0000 -Subject: [PATCH 413/580] drm/vc4: Correct DSI register definition +Subject: [PATCH 413/661] drm/vc4: Correct DSI register definition The DSI1_PHY_AFEC0_PD_DLANE1 and DSI1_PHY_AFEC0_PD_DLANE3 register definitions were swapped, so trying to use more than a single data @@ -195524,10 +195524,10 @@ index 0cd40d31e82d..bac5e07c05de 100644 2.18.4 -From a1ae3c864f0a2bbede2589111407351942b83914 Mon Sep 17 00:00:00 2001 +From 072045bf71fcb81b339272285f398e81501f28c2 Mon Sep 17 00:00:00 2001 From: Sudeep Date: Fri, 23 Oct 2020 15:47:17 +0530 -Subject: [PATCH 414/580] Allo boss2 driver +Subject: [PATCH 414/661] Allo boss2 driver Signed-off-by: Sudeep --- @@ -196720,10 +196720,10 @@ index 000000000000..5ad7f16964aa 2.18.4 -From 5803e126db4d08bd97c73d8d0f2b66a402b1dfb2 Mon Sep 17 00:00:00 2001 +From 4f245437694860dd14f4019fc29b6aeaf17aac44 Mon Sep 17 00:00:00 2001 From: Sudeep Date: Fri, 23 Oct 2020 15:51:15 +0530 -Subject: [PATCH 415/580] Add allo boss2 overlay +Subject: [PATCH 415/661] Add allo boss2 overlay Signed-off-by: Sudeep --- @@ -196829,10 +196829,10 @@ index 000000000000..a6adfb495eb9 2.18.4 -From 99925c9ba9f56e4e5392eadd18045f6d7a9fff35 Mon Sep 17 00:00:00 2001 +From 764698a25a4b3da8b9773a01434fa5cf7f4d12a5 Mon Sep 17 00:00:00 2001 From: Sudeep Date: Fri, 23 Oct 2020 15:52:38 +0530 -Subject: [PATCH 416/580] Add allo boss2 config +Subject: [PATCH 416/661] Add allo boss2 config Signed-off-by: Sudeep --- @@ -196907,10 +196907,10 @@ index 88ae301afcb4..2359f9c08650 100644 2.18.4 -From f9d996e2767e4a867fadb5d9e8ca064c34545284 Mon Sep 17 00:00:00 2001 +From c1fb5547373a418a3b23655bfedb00e7b5db948d Mon Sep 17 00:00:00 2001 From: paul-1 <6473457+paul-1@users.noreply.github.com> Date: Wed, 4 Nov 2020 19:17:48 -0500 -Subject: [PATCH 417/580] Overlay: Update Allo Piano Plus dac driver for 5.4.y +Subject: [PATCH 417/661] Overlay: Update Allo Piano Plus dac driver for 5.4.y kernels. Create unique names for the two instances of the codec driver. @@ -196943,10 +196943,10 @@ index 374c553db062..d47a35def4f7 100644 2.18.4 -From df5b30dc657ad738b22b462d054ef6c93fefa8dd Mon Sep 17 00:00:00 2001 +From d62c2a367f2721793cb75e8ffe5db3d254923822 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 2 Dec 2020 15:22:23 +0000 -Subject: [PATCH 418/580] media: bcm2835-unicam: Correctly handle error +Subject: [PATCH 418/661] media: bcm2835-unicam: Correctly handle error propagation for stream on On a failure in start_streaming(), the error code would not propagate to @@ -196976,10 +196976,10 @@ index 6501fb205e20..c13a0a20fd12 100644 2.18.4 -From 290d9f4bc8cfb81e85f5aa87ec466858b104cf9b Mon Sep 17 00:00:00 2001 +From e7dcad10de52c4b8177ae3b384ae69c46d5175e3 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 2 Dec 2020 15:26:09 +0000 -Subject: [PATCH 419/580] media: bcm2835-unicam: Return early from +Subject: [PATCH 419/661] media: bcm2835-unicam: Return early from stop_streaming() if stopped clk_disable_unprepare() is called unconditionally in stop_streaming(). @@ -197046,10 +197046,10 @@ index c13a0a20fd12..60309de02369 100644 2.18.4 -From af1a09539835120961d544c3e71e7001b4222925 Mon Sep 17 00:00:00 2001 +From c7c1802c872351ed8f37d4d301a2ece1fc900cc4 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 2 Dec 2020 16:48:41 +0000 -Subject: [PATCH 420/580] media: bcm2835-unicam: Clear clock state when +Subject: [PATCH 420/661] media: bcm2835-unicam: Clear clock state when stopping streaming Commit 65e08c465020d4c5b51afb452efc2246d80fd66f failed to clear the @@ -197077,10 +197077,10 @@ index 60309de02369..a8b3f5433f04 100644 2.18.4 -From 88fb83d2710a61fb8a2255bceea5b779564ce687 Mon Sep 17 00:00:00 2001 +From 53af4969ef43805a3728c283a724db75656c5db7 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 3 Dec 2020 13:44:42 +0000 -Subject: [PATCH 421/580] PCI: brcmstb: Advertise MSI-X support +Subject: [PATCH 421/661] PCI: brcmstb: Advertise MSI-X support Although the BRCMSTB PCIe interface doesn't technically support the MSI-X spec, in practise it seems to work provided no more than 32 @@ -197110,10 +197110,10 @@ index bd0263d739c9..840f264f7a9b 100644 2.18.4 -From 8fc7185289da02a16c29bb93bf84b0efe91c2c63 Mon Sep 17 00:00:00 2001 +From 71c470840045f1dda1b04ad3c82a706b546a235c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 7 Dec 2020 09:35:57 +0000 -Subject: [PATCH 422/580] ARM: dts: CM4 audio pins are not connected +Subject: [PATCH 422/661] ARM: dts: CM4 audio pins are not connected Signed-off-by: Phil Elwell --- @@ -197137,10 +197137,10 @@ index 49c69fdaef49..dbe8afe9ac5f 100644 2.18.4 -From 13919f4a36bd9a0d155fe7b81d9f858e5f35ffe4 Mon Sep 17 00:00:00 2001 +From 712ad29acc2fb2a739fcc7aba7d5b9b5fe92225e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 7 Dec 2020 08:33:19 +0000 -Subject: [PATCH 423/580] configs: Add RTC_DRV_PCF85063=m +Subject: [PATCH 423/661] configs: Add RTC_DRV_PCF85063=m Include the driver module for the PCF85063 and PCF85063A RTC devices. @@ -197217,10 +197217,10 @@ index 2359f9c08650..5d6f27ec87f6 100644 2.18.4 -From a3a7db8bf666282b0e78bd743b4a70db848eba71 Mon Sep 17 00:00:00 2001 +From 0a9bceb0c93210e33006769810f395b18353253f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 7 Dec 2020 08:49:53 +0000 -Subject: [PATCH 424/580] overlays: Add PCF85063 and PCF85063A to i2c-rtc +Subject: [PATCH 424/661] overlays: Add PCF85063 and PCF85063A to i2c-rtc Add support for the PCF85063 and PCF85063A RTC devices to the i2c-rtc overlay. @@ -197564,10 +197564,10 @@ index 735ca303e4fa..759f532d5be1 100644 2.18.4 -From bab1339a3461dde998402854ecd5f9326e5ae6f4 Mon Sep 17 00:00:00 2001 +From d4ddb6ca4a4677996dccb2d2c71aa46b79773730 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 7 Dec 2020 17:18:39 +0000 -Subject: [PATCH 425/580] overlays: Fix cut-and-paste error in README +Subject: [PATCH 425/661] overlays: Fix cut-and-paste error in README Signed-off-by: Phil Elwell --- @@ -197594,10 +197594,10 @@ index d4cf4176a54b..2fa2bbb943cd 100644 2.18.4 -From f4cc458cbc561a6af955ed2a53eaa2638a46523f Mon Sep 17 00:00:00 2001 +From 8cf4124521b3775653d117fca990704a8994736f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 4 Nov 2020 18:31:02 +0000 -Subject: [PATCH 426/580] staging/bcm2835-codec: Ensure OUTPUT timestamps are +Subject: [PATCH 426/661] staging/bcm2835-codec: Ensure OUTPUT timestamps are always forwarded The firmware by default tries to ensure that decoded frame @@ -197655,10 +197655,10 @@ index 5b596b5c057f..efda4dc039c3 100644 2.18.4 -From bff6614254013219853b5ccc01a1b601dc42293a Mon Sep 17 00:00:00 2001 +From 12eb4a120d9c12b5ad0733f7f8b78209b95189e1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 15 Dec 2020 16:38:37 +0000 -Subject: [PATCH 427/580] net: lan78xx: Ack pending PHY ints when resetting +Subject: [PATCH 427/661] net: lan78xx: Ack pending PHY ints when resetting lan78xx_link_reset explicitly clears the MAC's view of the PHY's IRQ status. In doing so it potentially leaves the PHY with a pending @@ -197693,10 +197693,10 @@ index 58f5b90f11d4..3cf5ad0bf0c1 100644 2.18.4 -From e9c2d442a928d9cf392337ec73e687fffe113a0b Mon Sep 17 00:00:00 2001 +From 0dd81f6d2ea41cb929e5a3f188aea71c7d0ba901 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 15 Dec 2020 17:02:17 +0000 -Subject: [PATCH 428/580] overlays: mpu6050: Add 'addr' parameter +Subject: [PATCH 428/661] overlays: mpu6050: Add 'addr' parameter The mpu6050 starts up at address 0x68 by default, but can be set to 0x69 if the ADO pin is pulled high. Give the overlay an addr parameter @@ -197737,10 +197737,10 @@ index 3109d90562ae..1b4c06535687 100644 2.18.4 -From f33c5ceb253e622b7afdfade9228e38f7e679553 Mon Sep 17 00:00:00 2001 +From 4e21765e35f139ec4d7ac6000ddce13b3be6a922 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Tue, 15 Dec 2020 16:26:51 +0000 -Subject: [PATCH 429/580] drm/vc4: Make normalize_zpos conditional on using +Subject: [PATCH 429/661] drm/vc4: Make normalize_zpos conditional on using fkms Eric's view was that there was no point in having zpos @@ -197772,10 +197772,10 @@ index 65513a90d606..5d0974cdeaaa 100644 2.18.4 -From d75d60c811f6c92e7598aa4c4fa3baf2583fd6e3 Mon Sep 17 00:00:00 2001 +From a5a0365f6d0db893c9693279a92d4def70689db1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 16 Dec 2020 09:28:17 +0000 -Subject: [PATCH 430/580] overlays: Add missing addresses to ads1015/ads1115 +Subject: [PATCH 430/661] overlays: Add missing addresses to ads1015/ads1115 The overlays for the ads1015 and ads1115 I2C ADCs omitted the addresses in the main device node names. As well as breaking the conventions for @@ -197821,10 +197821,10 @@ index 4fc571c2db33..e44ced704ee2 100644 2.18.4 -From dd06f4f934fea04c2cacd64ea5f5580418ec8ef7 Mon Sep 17 00:00:00 2001 +From 3befdf38391a06704c8ba136b92d2cf6e4677151 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 9 Dec 2020 11:30:12 +0000 -Subject: [PATCH 431/580] media: i2c: imx477: Selection compliance fixes +Subject: [PATCH 431/661] media: i2c: imx477: Selection compliance fixes To comply with the intended usage of the V4L2 selection target when used to retrieve a sensor image properties, adjust the rectangles @@ -197907,10 +197907,10 @@ index 3fbb173fa079..f68e7718b09c 100644 2.18.4 -From b602e469c5f2bc7de2dfa8a82ed180338aa8bf88 Mon Sep 17 00:00:00 2001 +From b8745a0aa88adf542e60662f8f67a6fcc76d7aa3 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Sun, 13 Dec 2020 16:45:58 +0000 -Subject: [PATCH 432/580] staging/vc04_services/codec: Add support for CID +Subject: [PATCH 432/661] staging/vc04_services/codec: Add support for CID MPEG_HEADER_MODE Control V4L2_CID_MPEG_VIDEO_HEADER_MODE controls whether the encoder @@ -197977,10 +197977,10 @@ index 3791ab4b4244..c368246cbb6a 100644 2.18.4 -From 681d09168e495406dd7502a0ca835802fa587313 Mon Sep 17 00:00:00 2001 +From ff6e057f7b44f0307bdf9355b78f3307a5c65cc7 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Sun, 13 Dec 2020 16:54:43 +0000 -Subject: [PATCH 433/580] staging/vc04_services/codec: Clear last buf dequeued +Subject: [PATCH 433/661] staging/vc04_services/codec: Clear last buf dequeued flag on START It appears that the V4L2 M2M framework requires the driver to manually @@ -198020,10 +198020,10 @@ index c368246cbb6a..9673d807ca67 100644 2.18.4 -From 69ea7f494ccf96a474a666fa777c351fd5e06ff9 Mon Sep 17 00:00:00 2001 +From d06ab564bb1d5e033881fbb71b287201427f956d Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 8 Oct 2020 14:44:08 +0200 -Subject: [PATCH 434/580] drm/atomic: Pass the full state to CRTC atomic +Subject: [PATCH 434/661] drm/atomic: Pass the full state to CRTC atomic enable/disable Commit 351f950db4ab28c321a1bd4b92e4bb03e34c4703 upstream. @@ -198941,7 +198941,7 @@ index 3a153648b369..999deb64bd70 100644 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c -index 3a244ef7f30f..cdbd0e83a521 100644 +index 3aa9a7406085..abeccffcbd07 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1742,7 +1742,7 @@ static int tegra_dc_wait_idle(struct tegra_dc *dc, unsigned long timeout) @@ -199042,10 +199042,10 @@ index 4fcc0a542b8a..931c55126148 100644 } diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 482219fb4db2..f04f5cc8c839 100644 +index 1d2416d466a3..c4f22e78b765 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -472,8 +472,10 @@ int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) +@@ -489,8 +489,10 @@ int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) } static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, @@ -199057,7 +199057,7 @@ index 482219fb4db2..f04f5cc8c839 100644 struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state); struct drm_device *dev = crtc->dev; -@@ -499,8 +501,10 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, +@@ -516,8 +518,10 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, } static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, @@ -199293,10 +199293,10 @@ index 4efec30f8bad..bde42988c4b5 100644 2.18.4 -From 653eed3a94844a6e9d96f9a4b59ab84feffcb9f1 Mon Sep 17 00:00:00 2001 +From a17e958c72599013aa87a5786ba9e29ecf1513c7 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 28 Oct 2020 13:32:21 +0100 -Subject: [PATCH 435/580] drm/atomic: Pass the full state to CRTC atomic_check +Subject: [PATCH 435/661] drm/atomic: Pass the full state to CRTC atomic_check MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -200196,10 +200196,10 @@ index cf4ead0dc2e3..091b1fa25756 100644 return -EINVAL; } diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index f04f5cc8c839..06088854c647 100644 +index c4f22e78b765..2f5d87f1db3b 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -584,18 +584,21 @@ void vc4_crtc_get_margins(struct drm_crtc_state *state, +@@ -601,18 +601,21 @@ void vc4_crtc_get_margins(struct drm_crtc_state *state, } static int vc4_crtc_atomic_check(struct drm_crtc *crtc, @@ -200384,10 +200384,10 @@ index bde42988c4b5..b97441deaf93 100644 2.18.4 -From d7a5b03405a9abbe5110bb9bcc388fd195e4a39b Mon Sep 17 00:00:00 2001 +From 1baf43844efe26e35f12689a099b56d894e9a19c Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 28 Oct 2020 13:32:22 +0100 -Subject: [PATCH 436/580] drm/atomic: Pass the full state to CRTC atomic begin +Subject: [PATCH 436/661] drm/atomic: Pass the full state to CRTC atomic begin and flush MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -201245,7 +201245,7 @@ index 8f91391832db..45d9eb552d86 100644 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); struct drm_pending_vblank_event *event = crtc->state->event; diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c -index cdbd0e83a521..4f00d1b39cc4 100644 +index abeccffcbd07..d1fd1ccf455d 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1918,7 +1918,7 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, @@ -201482,10 +201482,10 @@ index b97441deaf93..f2de050085be 100644 2.18.4 -From 96da4f37ea12986091f09b18b851bface67b8242 Mon Sep 17 00:00:00 2001 +From 86fdfcb60628b43d6ffd63d4c1cb745872858fda Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 7 Dec 2020 16:57:11 +0100 -Subject: [PATCH 437/580] drm/vc4: hvs: Align the HVS atomic hooks to the new +Subject: [PATCH 437/661] drm/vc4: hvs: Align the HVS atomic hooks to the new API Since the CRTC setup in vc4 is split between the PixelValves/TXP and the @@ -201502,10 +201502,10 @@ Signed-off-by: Maxime Ripard 4 files changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 06088854c647..e02e499885ed 100644 +index 2f5d87f1db3b..3b331b617e4e 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -503,8 +503,6 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, +@@ -520,8 +520,6 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) { @@ -201514,7 +201514,7 @@ index 06088854c647..e02e499885ed 100644 struct drm_device *dev = crtc->dev; struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc); -@@ -517,7 +515,7 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -534,7 +532,7 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, */ drm_crtc_vblank_on(crtc); @@ -201603,10 +201603,10 @@ index 34612edcabbd..4a26750b5e93 100644 2.18.4 -From bfc6be25a076d015d9d7d09637ad8317684d4a70 Mon Sep 17 00:00:00 2001 +From e535a0f27d03002d9b75ebff1524d6847d12a3c5 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:36 +0100 -Subject: [PATCH 438/580] drm/vc4: Pass the atomic state to encoder hooks +Subject: [PATCH 438/661] drm/vc4: Pass the atomic state to encoder hooks We'll need to access the connector state in our encoder setup, so let's just pass the whole DRM state to our private encoder hooks. @@ -201620,10 +201620,10 @@ Signed-off-by: Maxime Ripard 3 files changed, 25 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index e02e499885ed..a3439756594c 100644 +index 3b331b617e4e..339567dd015c 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -403,7 +403,9 @@ static void require_hvs_enabled(struct drm_device *dev) +@@ -420,7 +420,9 @@ static void require_hvs_enabled(struct drm_device *dev) SCALER_DISPCTRL_ENABLE); } @@ -201634,7 +201634,7 @@ index e02e499885ed..a3439756594c 100644 { struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc); struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); -@@ -435,13 +437,13 @@ static int vc4_crtc_disable(struct drm_crtc *crtc, unsigned int channel) +@@ -452,13 +454,13 @@ static int vc4_crtc_disable(struct drm_crtc *crtc, unsigned int channel) mdelay(20); if (vc4_encoder && vc4_encoder->post_crtc_disable) @@ -201650,7 +201650,7 @@ index e02e499885ed..a3439756594c 100644 return 0; } -@@ -468,7 +470,7 @@ int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) +@@ -485,7 +487,7 @@ int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) if (channel < 0) return 0; @@ -201659,7 +201659,7 @@ index e02e499885ed..a3439756594c 100644 } static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, -@@ -484,7 +486,7 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, +@@ -501,7 +503,7 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, /* Disable vblank irq handling before crtc is disabled. */ drm_crtc_vblank_off(crtc); @@ -201668,7 +201668,7 @@ index e02e499885ed..a3439756594c 100644 /* * Make sure we issue a vblank event after disabling the CRTC if -@@ -518,14 +520,14 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -535,14 +537,14 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, vc4_hvs_atomic_enable(crtc, state); if (vc4_encoder->pre_crtc_configure) @@ -201685,7 +201685,7 @@ index e02e499885ed..a3439756594c 100644 /* When feeding the transposer block the pixelvalve is unneeded and * should not be enabled. -@@ -534,7 +536,7 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -551,7 +553,7 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN); if (vc4_encoder->post_crtc_enable) @@ -201774,10 +201774,10 @@ index 4a3e020364af..8a93a584bc2a 100644 2.18.4 -From 7070661ec320173b776d1fc5e9321557bd13823a Mon Sep 17 00:00:00 2001 +From cce7bf3f3fa8cffbc1f3ad4fd0b15aab0449a4a5 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:38 +0100 -Subject: [PATCH 439/580] drm/vc4: hdmi: Don't access the connector state in +Subject: [PATCH 439/661] drm/vc4: hdmi: Don't access the connector state in reset if kmalloc fails drm_atomic_helper_connector_reset uses kmalloc which, from an API @@ -201815,10 +201815,10 @@ index 8a93a584bc2a..b14f7bd5a014 100644 2.18.4 -From 44bf3f598e02bee7d7bd40db83d8129e60d612ee Mon Sep 17 00:00:00 2001 +From 4d5179680f3ff4ad3dd04001b09dede205c657a2 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:39 +0100 -Subject: [PATCH 440/580] drm/vc4: hdmi: Create a custom connector state +Subject: [PATCH 440/661] drm/vc4: hdmi: Create a custom connector state When run with a higher bpc than 8, the clock of the HDMI controller needs to be adjusted. Let's create a connector state that will be used at @@ -201911,10 +201911,10 @@ index 1eb1fc0d95a3..c4f24e1f1b20 100644 2.18.4 -From 4eabab9b02ec494271b3d03b2377009939fa9ec7 Mon Sep 17 00:00:00 2001 +From 47d33807cf6a9e40ac1f68a31b531ef96911b6b9 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:40 +0100 -Subject: [PATCH 441/580] drm/vc4: hdmi: Store pixel frequency in the connector +Subject: [PATCH 441/661] drm/vc4: hdmi: Store pixel frequency in the connector state The pixel rate is for now quite simple to compute, but with more features @@ -202016,10 +202016,10 @@ index c4f24e1f1b20..71816aba852b 100644 2.18.4 -From 76a68d703ec6472dd700ce38c6012814a35c0c32 Mon Sep 17 00:00:00 2001 +From 9b70cd66bac9132f08587c6aa74910b532f73f23 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:41 +0100 -Subject: [PATCH 442/580] drm/vc4: hdmi: Use the connector state pixel rate for +Subject: [PATCH 442/661] drm/vc4: hdmi: Use the connector state pixel rate for the PHY The PHY initialisation parameters are not based on the pixel clock but @@ -202128,10 +202128,10 @@ index 057796b54c51..36535480f8e2 100644 2.18.4 -From 63b3e6e0372a78655085d033deea2180c4404d80 Mon Sep 17 00:00:00 2001 +From 400c23824013f1719fa8323b6cff695cc2a7996e Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:43 +0100 -Subject: [PATCH 443/580] drm/vc4: hdmi: Enable 10/12 bpc output +Subject: [PATCH 443/661] drm/vc4: hdmi: Enable 10/12 bpc output The BCM2711 supports higher bpc count than just 8, so let's support it in our driver. @@ -202341,10 +202341,10 @@ index 10dd6097f2b5..9e85266e53f5 100644 2.18.4 -From e3eb72bcc359ce33a9e7353da4e7c64e678b8707 Mon Sep 17 00:00:00 2001 +From ed46db17af041e31373e2267699a15cdc9ce1745 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 1 Dec 2020 14:57:41 +0000 -Subject: [PATCH 444/580] drm/vc4: Fixup fkms for API change +Subject: [PATCH 444/661] drm/vc4: Fixup fkms for API change Atomic flush and check changed API, so fix up the downstream-only FKMS driver. @@ -202397,10 +202397,10 @@ index f83efe013a5b..44b1addeb22e 100644 2.18.4 -From 6fbfaebed77d76b95dd99f0362c80cec5dc55612 Mon Sep 17 00:00:00 2001 +From 97addf2ae543861f3e324cbe2f1e0fa7c30bf98b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 30 Dec 2020 20:00:38 +0000 -Subject: [PATCH 445/580] overlays: Rebuild "upstream" with latest ovmerge +Subject: [PATCH 445/661] overlays: Rebuild "upstream" with latest ovmerge The latest ovmerge drops disabled fragments, causing the "upstream" overlay to change. @@ -202696,10 +202696,10 @@ index 6195e02bf9ff..e0f7cc8ba9ea 100644 2.18.4 -From 172eb76b0e510adf95b100d6e3ca577264630f83 Mon Sep 17 00:00:00 2001 +From 9390eadcad6da05c21e7ced7de96eb5b8c701790 Mon Sep 17 00:00:00 2001 From: menschel Date: Wed, 30 Dec 2020 21:55:34 +0100 -Subject: [PATCH 446/580] Add overlay for Seeed Studio CAN BUS FD HAT (#4034) +Subject: [PATCH 446/661] Add overlay for Seeed Studio CAN BUS FD HAT (#4034) This patch adds the overlay for the Seeed Studio CAN BUS FD HAT with two CAN FD Channels and an RTC. @@ -202924,10 +202924,10 @@ index 000000000000..e843d0b19745 2.18.4 -From 0a699e428cb2e7c5f75dfd4a491c76300b2660b7 Mon Sep 17 00:00:00 2001 +From f004956d80e4f54b2f214338e7c7560b82bc082a Mon Sep 17 00:00:00 2001 From: gesangtome Date: Fri, 1 Jan 2021 18:03:17 +0800 -Subject: [PATCH 447/580] vc-sm-cma: fixed kbuild problem +Subject: [PATCH 447/661] vc-sm-cma: fixed kbuild problem error logs: drivers/staging/vc04_services/vc-sm-cma/Kconfig:1:error: recursive dependency detected! @@ -202960,10 +202960,10 @@ index a7c1a7bf516e..5df9198cdab1 100644 2.18.4 -From ff9c56e8f2f8975bd222237795241ca9200a6830 Mon Sep 17 00:00:00 2001 +From a99330998ca7c786179a17db51ba9c8e6ac72cde Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Sat, 2 Jan 2021 10:51:58 +0000 -Subject: [PATCH 448/580] staging/vc04-services/codec: Fix logical precedence +Subject: [PATCH 448/661] staging/vc04-services/codec: Fix logical precedence issue Two issues identified with operator precedence in logical @@ -203002,10 +203002,10 @@ index 9673d807ca67..8a8f1e8db7d0 100644 2.18.4 -From bcd0e08951fae5821b45b25e425947eaa2111592 Mon Sep 17 00:00:00 2001 +From 4f3359fd6d553e4f5e5af13d1492063b3d2c3010 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 5 Jan 2021 14:34:20 +0000 -Subject: [PATCH 449/580] staging/mmal-vchiq: Fix incorrect static +Subject: [PATCH 449/661] staging/mmal-vchiq: Fix incorrect static vchiq_instance. For some reason lost in history function vchiq_mmal_init used @@ -203041,10 +203041,10 @@ index 0f98494812c8..014fbace54cd 100644 2.18.4 -From dabc650e87d9fac8d628ae087a98e1590368778a Mon Sep 17 00:00:00 2001 +From 393adacf4fb89caf0cef8e2807667d417896e284 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 Jan 2021 10:43:20 +0000 -Subject: [PATCH 450/580] staging/vc04_services: Add additional unpacked raw +Subject: [PATCH 450/661] staging/vc04_services: Add additional unpacked raw formats Support has been added for the unpacked (16bpp) versions of @@ -203098,10 +203098,10 @@ index 8eb6334ee055..59f7ad3a5b3b 100644 2.18.4 -From 8c7f7e2424ff8e567e0127a299548323496e7eb6 Mon Sep 17 00:00:00 2001 +From 15071125839f695be336ec72a6802ac1bca3107f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 Jan 2021 10:45:16 +0000 -Subject: [PATCH 451/580] staging/bcm2835-codec: Add the unpacked (16bpp) raw +Subject: [PATCH 451/661] staging/bcm2835-codec: Add the unpacked (16bpp) raw formats Now that the firmware supports the unpacked (16bpp) variants @@ -203271,10 +203271,10 @@ index 8a8f1e8db7d0..c883db63808f 100644 2.18.4 -From 3d6fd34f909071d6a1b9eede01383ebcccd3520d Mon Sep 17 00:00:00 2001 +From 7ae1b4565638a07e9a344436845df59cc82fbad2 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 Jan 2021 11:41:26 +0000 -Subject: [PATCH 452/580] staging/bcm2835-codec: Log the number of excess +Subject: [PATCH 452/661] staging/bcm2835-codec: Log the number of excess supported formats When logging that the firmware has provided more supported formats @@ -203320,10 +203320,10 @@ index c883db63808f..94691ab7175a 100644 2.18.4 -From 0ee6a1972620e4b2eff78ce54112a0d7d569977a Mon Sep 17 00:00:00 2001 +From a519ae2533ae8f3c45751580c4262a5f9801396c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 Jan 2021 11:37:10 +0000 -Subject: [PATCH 453/580] staging/bcm2835-isp: Add the unpacked (16bpp) raw +Subject: [PATCH 453/661] staging/bcm2835-isp: Add the unpacked (16bpp) raw formats Now that the firmware supports the unpacked (16bpp) variants @@ -203502,10 +203502,10 @@ index 8bb3d115b27a..9a313ffcabf5 100644 2.18.4 -From 9ee78d7e7d060f9d23c57aab849b5493b32e1fe1 Mon Sep 17 00:00:00 2001 +From 084be10afb457d5eb497bc2ea66930a306d9c827 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 Jan 2021 11:43:22 +0000 -Subject: [PATCH 454/580] staging/bcm2835-isp: Log the number of excess +Subject: [PATCH 454/661] staging/bcm2835-isp: Log the number of excess supported formats When logging that the firmware has provided more supported formats @@ -203537,10 +203537,10 @@ index 9a313ffcabf5..afac2ad65790 100644 2.18.4 -From 05fabf4f9cdc81d5f62ba4cd5556a3f045b0620b Mon Sep 17 00:00:00 2001 +From 9e8fc7566bfb046b283f8545be339058e1bfe7b2 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 30 Dec 2020 14:51:29 +0000 -Subject: [PATCH 455/580] bcm2835-dma: Add bcm2835-dma: Add DMA_WIDE_SOURCE and +Subject: [PATCH 455/661] bcm2835-dma: Add bcm2835-dma: Add DMA_WIDE_SOURCE and DMA_WIDE_DEST flags Use (reserved) bits 24 and 25 of the dreq value @@ -203607,10 +203607,10 @@ index 0cbfa9d559a2..5517d2135168 100644 2.18.4 -From f60acfaf3d42f47a5fadaa6025290a30211472fc Mon Sep 17 00:00:00 2001 +From 88e593087ad536068d6b689d463b8f417a87f336 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 11 Jan 2021 14:49:33 +0000 -Subject: [PATCH 456/580] bcm2835-dma: Move WAIT_RESP from extra to info +Subject: [PATCH 456/661] bcm2835-dma: Move WAIT_RESP from extra to info Questionable: Might want to drop Signed-off-by: popcornmix @@ -203638,10 +203638,10 @@ index 5517d2135168..8b97b9f10a1a 100644 2.18.4 -From 526b0629994d2b3869627b53927499bd3193a128 Mon Sep 17 00:00:00 2001 +From 96859af7360bbd94675c6c05b32c3b68c58bca16 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 6 Jan 2021 18:16:10 +0000 -Subject: [PATCH 457/580] bcm2835-dma: Avoid losing CS flags after interrupt +Subject: [PATCH 457/661] bcm2835-dma: Avoid losing CS flags after interrupt Signed-off-by: Dom Cobley --- @@ -203665,10 +203665,10 @@ index 8b97b9f10a1a..94a1b40b1645 100644 2.18.4 -From 24bdd43d4084415f10aa56c96756a02680cf3206 Mon Sep 17 00:00:00 2001 +From 8e8a98cd9e086b59fb67c48d9463c6bc39d85907 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 11 Jan 2021 13:06:23 +0000 -Subject: [PATCH 458/580] dt: Enable DMA_WIDE_SOURCE and DMA_WIDE_DEST for hdmi +Subject: [PATCH 458/661] dt: Enable DMA_WIDE_SOURCE and DMA_WIDE_DEST for hdmi audio Signed-off-by: popcornmix @@ -203716,10 +203716,10 @@ index bd77ba3a3562..47b958428d0c 100644 2.18.4 -From aa62a0e5bc9d45c828c43c368fa4ab60925e6264 Mon Sep 17 00:00:00 2001 +From 4ad19b2d474d947cff74ead9571b25baf6dbbf76 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 6 Jan 2021 18:16:29 +0000 -Subject: [PATCH 459/580] bcm2711-rpi.dtsi: Bump hdmi audio dma panic priority +Subject: [PATCH 459/661] bcm2711-rpi.dtsi: Bump hdmi audio dma panic priority to max Set panic priority to 15 and leave normal priority at 0 @@ -203755,10 +203755,10 @@ index 3dbfd601ca39..8053ef54acc8 100644 2.18.4 -From 2a646d90474c076eca3c118dbacf933aec6c3586 Mon Sep 17 00:00:00 2001 +From 73db49fae57a6af51cf043ea1b4ab70f7669ceec Mon Sep 17 00:00:00 2001 From: Paul Elder Date: Tue, 22 Dec 2020 14:27:46 +0900 -Subject: [PATCH 460/580] media: i2c: ov5647: Selection compliance fixes +Subject: [PATCH 460/661] media: i2c: ov5647: Selection compliance fixes To comply with the intended usage of the V4L2 selection target when used to retrieve a sensor image properties, adjust the rectangles @@ -203849,10 +203849,10 @@ index 86a821a172b3..40d0d45a2481 100644 2.18.4 -From c0cf06ea1340e3c3effa0812c3b23218e648ee71 Mon Sep 17 00:00:00 2001 +From a7990066094f7a29f0ba0e1de040b199f9cb846a Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Sat, 2 Jan 2021 21:08:59 +0100 -Subject: [PATCH 461/580] overlays: give Seeed Studio CAN BUS FD HAT a -v2 +Subject: [PATCH 461/661] overlays: give Seeed Studio CAN BUS FD HAT a -v2 postfix There are several versions of the Seeed Studio CAN BUS FD HAT. This is the @@ -203907,10 +203907,10 @@ rename to arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts 2.18.4 -From f0f013884c584de14a8fb5deb35c62de6aa99b32 Mon Sep 17 00:00:00 2001 +From 4e18b2313b125e086a89e89143ca17fea2d0b8f2 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Sat, 2 Jan 2021 21:38:58 +0100 -Subject: [PATCH 462/580] overlays: Add overlay for Seeed Studio CAN BUS FD HAT +Subject: [PATCH 462/661] overlays: Add overlay for Seeed Studio CAN BUS FD HAT v1 (based on mcp2517fd) This patch adds the overlay for the Seeed Studio CAN BUS FD HAT v1 with two CAN @@ -204110,10 +204110,10 @@ index 000000000000..210d027a073e 2.18.4 -From 50fa0ef167c057c02b84e08e0041da99bbdd8212 Mon Sep 17 00:00:00 2001 +From bd3e04653ebd98bf98b5e20bc256be4cca454102 Mon Sep 17 00:00:00 2001 From: Aaron Shaw Date: Sat, 2 Jan 2021 02:34:03 +0000 -Subject: [PATCH 463/580] overlays: add wm8960-soundcard overlay +Subject: [PATCH 463/661] overlays: add wm8960-soundcard overlay add overlay for waveshare wm8960 simple-audio-card @@ -204250,10 +204250,10 @@ index 000000000000..289fa4dacdf1 2.18.4 -From f8dcab437a048b0a2d85b6b748eecba383e1bfae Mon Sep 17 00:00:00 2001 +From 9fdaea72f88511fd284710112c009500d7d232cf Mon Sep 17 00:00:00 2001 From: Aaron Shaw Date: Sat, 26 Dec 2020 03:13:14 +0000 -Subject: [PATCH 464/580] overlays: add spi override to merus-amp overlay +Subject: [PATCH 464/661] overlays: add spi override to merus-amp overlay adds an override to the merus-amp overlay to turn the spi bus off @@ -204302,10 +204302,10 @@ index 4501fbdc253d..bbffd7d26324 100644 2.18.4 -From 05f2597990c26f05660ad0ffebc328135cc69d71 Mon Sep 17 00:00:00 2001 +From da2ad4ea6ede2eb9b9550cfe2161e3cde6ec91fe Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 Jan 2021 17:28:57 +0000 -Subject: [PATCH 465/580] dt: Add a camera regulator node to all downstream Pi +Subject: [PATCH 465/661] dt: Add a camera regulator node to all downstream Pi platforms The current firmware fixup of camera sensor overlays is not @@ -204663,10 +204663,10 @@ index 000000000000..55237d03ed94 2.18.4 -From 14d07686d2df4167eba4051952bc2ed2099084cb Mon Sep 17 00:00:00 2001 +From 3cc40efd1e555a035848a906bea55868b1a39d55 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 Jan 2021 17:42:31 +0000 -Subject: [PATCH 466/580] dtoverlays: Update sensor overlays to use cam1_reg +Subject: [PATCH 466/661] dtoverlays: Update sensor overlays to use cam1_reg where possible Update those overlays that use the regulator framework to use the @@ -204920,10 +204920,10 @@ index 40b298d3dd86..b7a9c8c539da 100644 2.18.4 -From 1ea5d454dff8fbb2c49b356813d02f9254d3e09f Mon Sep 17 00:00:00 2001 +From b94570f3c51d53f49bbd4c982fabc3947c01f644 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Sat, 9 Jan 2021 17:03:32 +0100 -Subject: [PATCH 467/580] overlays: seeed-can-fd-hat: clarify how to identify +Subject: [PATCH 467/661] overlays: seeed-can-fd-hat: clarify how to identify HAT version It turns out the used CAN SPI chip is not a good way to identify the version of @@ -204971,10 +204971,10 @@ index 5076ca440742..bc889782a30b 100644 2.18.4 -From 31c95444cab892c9fcf2011e5089040e53d8a858 Mon Sep 17 00:00:00 2001 +From f9921fce97f06396cbeb263b3b062bc93b908a86 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 13 Jan 2021 21:25:38 +0000 -Subject: [PATCH 468/580] SQUASH: Revert: "overlays: Make the i2c-gpio overlay +Subject: [PATCH 468/661] SQUASH: Revert: "overlays: Make the i2c-gpio overlay safe again" This revert and its neighbour are opposites. When squashing, delete @@ -205003,10 +205003,10 @@ index 63231b5d7c0c..2323a61edf07 100644 2.18.4 -From 1bfdec57e6b2e578822572f60ca81057ac6b9d70 Mon Sep 17 00:00:00 2001 +From 3d99477665638f23a99f58bee33ab0b8b8b04e7d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 13 Jan 2021 21:27:56 +0000 -Subject: [PATCH 469/580] SQUASH: Revert "overlays: Fix dtc warnings in +Subject: [PATCH 469/661] SQUASH: Revert "overlays: Fix dtc warnings in i2c-gpio" This reverts commit 1c15edc0dca002c8536e9f1f5e1ec43017815018. @@ -205037,10 +205037,10 @@ index 2323a61edf07..63231b5d7c0c 100644 2.18.4 -From d4819ff7b86b19747ad0385d845346a6e0af3ee6 Mon Sep 17 00:00:00 2001 +From cf69fbdbf405bab3353aed7ccf15c2c742affb6f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 19 Jan 2021 08:57:21 +0000 -Subject: [PATCH 470/580] configs: Enable BCM2835 thermal driver in kernel8 +Subject: [PATCH 470/661] configs: Enable BCM2835 thermal driver in kernel8 The arm64 version of bcm2711_defconfig is intended for Pi 4, but the Raspberry Pi OS kernel8.img built from it is also used for Pi 3. It is @@ -205071,10 +205071,10 @@ index 325ff25a243d..eeb52d96e26b 100644 2.18.4 -From a6a177d248d04b8477ef76f56b3ce41acd0baca6 Mon Sep 17 00:00:00 2001 +From 7a07c58599860316068586e60deee4ee5a1681d0 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 14 Jan 2021 09:18:42 +0000 -Subject: [PATCH 471/580] uapi: bcm2835-isp: Add colour denoise configuration +Subject: [PATCH 471/661] uapi: bcm2835-isp: Add colour denoise configuration Add a configuration structure for colour denoise to the bcm2835_isp driver. @@ -205133,10 +205133,10 @@ index cf8c0437f159..c50e3ca81565 100644 2.18.4 -From 96134e050d01514b8cd425d71af99c4c0bd6bff1 Mon Sep 17 00:00:00 2001 +From 0d25d00f50ba52d38553bb61dee06426f06d4a9f Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 14 Jan 2021 09:20:52 +0000 -Subject: [PATCH 472/580] staging: vc04_services: ISP: Add colour denoise +Subject: [PATCH 472/661] staging: vc04_services: ISP: Add colour denoise control Add colour denoise control to the bcm2835 driver through a new v4l2 @@ -205218,10 +205218,10 @@ index efda4dc039c3..79438d23912f 100644 2.18.4 -From bc461a1d004c37b4ba4740852c31a03e83b4755e Mon Sep 17 00:00:00 2001 +From 28d434949ca439ca075d4e64f5c8dde4eaf1a5cb Mon Sep 17 00:00:00 2001 From: popcornmix Date: Thu, 21 Jan 2021 18:27:08 +0000 -Subject: [PATCH 473/580] configs: Add CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +Subject: [PATCH 473/661] configs: Add CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m Signed-off-by: popcornmix --- @@ -205296,10 +205296,10 @@ index 5d6f27ec87f6..5b6a5d59b394 100644 2.18.4 -From 1e8a1d9240ede7f0145759c302aaca643e60ac1a Mon Sep 17 00:00:00 2001 +From 1dd088532322e0160a0bb75ccc12048f7913f7e2 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 22 Jan 2021 09:28:06 +0000 -Subject: [PATCH 474/580] configs: Add CONFIG_USB_NET_AQC111=m +Subject: [PATCH 474/661] configs: Add CONFIG_USB_NET_AQC111=m See: https://github.com/raspberrypi/linux/pull/4086 @@ -205376,10 +205376,10 @@ index 5b6a5d59b394..655b1d87720b 100644 2.18.4 -From 1b7f051a56274a3a5d7a5e05973ff19798d6d8ac Mon Sep 17 00:00:00 2001 +From 8a67f4e20590788eea7edc111441c1bfb0488bdb Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Thu, 10 Dec 2020 19:22:45 +0100 -Subject: [PATCH 475/580] dt-bindings: nvmem: Add bindings for rmem driver +Subject: [PATCH 475/661] dt-bindings: nvmem: Add bindings for rmem driver Firmware/co-processors might use reserved memory areas in order to pass data stemming from an nvmem device otherwise non accessible to Linux. @@ -205458,10 +205458,10 @@ index 000000000000..29b53871aa02 2.18.4 -From 1b58d5153a7f308dbdae9164507a6dc033ba5f5c Mon Sep 17 00:00:00 2001 +From 8b9918445e62857f80a7d55787d8062a4d529476 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Thu, 10 Dec 2020 12:13:49 +0100 -Subject: [PATCH 476/580] nvmem: Add driver to expose reserved memory as nvmem +Subject: [PATCH 476/661] nvmem: Add driver to expose reserved memory as nvmem Firmware/co-processors might use reserved memory areas in order to pass data stemming from an nvmem device otherwise non accessible to Linux. @@ -205634,10 +205634,10 @@ index b557a0fcd4ba..281856ac1988 100644 2.18.4 -From ccefdd99b4eb81937e30b9c4ba1a3adbc9dac59c Mon Sep 17 00:00:00 2001 +From 004e57d4573aebf34230135e2407e48a065edf2b Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Fri, 11 Dec 2020 12:22:01 +0100 -Subject: [PATCH 477/580] ARM: dts: bcm2711: Add reserved memory template to +Subject: [PATCH 477/661] ARM: dts: bcm2711: Add reserved memory template to hold firmware configuration RPi4's co-processor will copy the board's bootloader[1] configuration @@ -205700,10 +205700,10 @@ index dae841ce309f..22c562d4196a 100644 2.18.4 -From 208487936073d5c9ab0c8979c605edac101a232a Mon Sep 17 00:00:00 2001 +From 345495d299d97475fc6ea42093d770cc442f18b3 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Fri, 11 Dec 2020 13:04:37 +0100 -Subject: [PATCH 478/580] arm64: defconfig: Enable nvmem's rmem driver +Subject: [PATCH 478/661] arm64: defconfig: Enable nvmem's rmem driver It'll be used by the RPi4 family of boards to access its bootloader configuration. @@ -205729,10 +205729,10 @@ index 5cfe3cf6f2ac..a9f496d74639 100644 2.18.4 -From d6b9a550c1fa111f3d3b027765a259bcc1a86aaa Mon Sep 17 00:00:00 2001 +From ae20846a2376975ffddd89f40d34854b6d9fe839 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Fri, 11 Dec 2020 13:15:41 +0100 -Subject: [PATCH 479/580] ARM: multi_v7_defconfig: Enable nvmem's rmem driver +Subject: [PATCH 479/661] ARM: multi_v7_defconfig: Enable nvmem's rmem driver It'll be used by the RPi4 family of boards to access its bootloader configuration. @@ -205758,10 +205758,10 @@ index a611b0c1e540..ea2715c9f923 100644 2.18.4 -From a3398902e9fd30116affb9e1566429fbb47443a4 Mon Sep 17 00:00:00 2001 +From f7ac0e4ea3cdc573d6b67a48d24cb8f21fcd8f24 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 22 Jan 2021 12:08:19 +0000 -Subject: [PATCH 480/580] configs: Add NVMEM_RMEM=m for 2711 +Subject: [PATCH 480/661] configs: Add NVMEM_RMEM=m for 2711 Signed-off-by: Phil Elwell --- @@ -205797,10 +205797,10 @@ index 590a235f9e25..4c4068953a97 100644 2.18.4 -From 44812cb53f0a2fc0cde4524cb458281234b9b591 Mon Sep 17 00:00:00 2001 +From 852b735773bb68914167457f8a1ba2afaa1e8ffb Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 22 Jan 2021 16:15:06 +0000 -Subject: [PATCH 481/580] configs: Add CRYPTO_ADIANTUM=m +Subject: [PATCH 481/661] configs: Add CRYPTO_ADIANTUM=m See: https://github.com/raspberrypi/linux/issues/3648 @@ -205877,10 +205877,10 @@ index 655b1d87720b..1ca2f13a2af5 100644 2.18.4 -From c6a81823026a606774396f3c3bbf73f148155331 Mon Sep 17 00:00:00 2001 +From 2bd98fbc53f3c0c7410a8746d69106f5818c352c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 28 Jan 2021 11:30:04 +0000 -Subject: [PATCH 482/580] spi: bcm2835: Workaround/fix for zero-length +Subject: [PATCH 482/661] spi: bcm2835: Workaround/fix for zero-length transfers A relatively recent commit ([1]) contained optimisation for the PIO @@ -205933,10 +205933,10 @@ index 5c7aa77f504e..aab6c7e5c114 100644 2.18.4 -From e27f2956cf485028411252f1a3c4b225c4c77cd3 Mon Sep 17 00:00:00 2001 +From 649be800500c8c0160b0ca8332556875aef400a1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 29 Jan 2021 10:34:11 +0000 -Subject: [PATCH 483/580] kbuild: Silence unavoidable dtc overlay warnings +Subject: [PATCH 483/661] kbuild: Silence unavoidable dtc overlay warnings Much effort has been put into finding ways to avoid warnings from dtc about overlays, usually to do with the presence of #address-cells and @@ -205970,10 +205970,10 @@ index 9c0df5bde46c..43758c8d4b68 100644 2.18.4 -From 9e8d43bb45de9b5435eec520651bcab52cceee2a Mon Sep 17 00:00:00 2001 +From 17e6a7a88cca6eb53bb2d19cb5ed85eebdddf0d1 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 1 Feb 2021 12:45:29 +0000 -Subject: [PATCH 484/580] configs: Enable CONFIG_MEDIA_CEC_RC +Subject: [PATCH 484/661] configs: Enable CONFIG_MEDIA_CEC_RC See: https://www.raspberrypi.org/forums/viewtopic.php?f=44&t=301072 --- @@ -206056,10 +206056,10 @@ index 1ca2f13a2af5..aa89eb5704cb 100644 2.18.4 -From d5ac478b638fd9acdba5ef5c869148cb783816b0 Mon Sep 17 00:00:00 2001 +From 43e14d4d4a858ce59252698f36620a9cf66d9909 Mon Sep 17 00:00:00 2001 From: Joerg Schambacher Date: Fri, 29 Jan 2021 08:26:44 +0100 -Subject: [PATCH 485/580] Adds the DT-overlays to support Hifiberry AMP100 +Subject: [PATCH 485/661] Adds the DT-overlays to support Hifiberry AMP100 Adds new DT-overlay to control AMP100. @@ -206199,10 +206199,10 @@ index 000000000000..ebdef55d6110 2.18.4 -From 1174164073e896a03e4fba0b7b11f2b660e0b27f Mon Sep 17 00:00:00 2001 +From 9c85e9c9caacbae9b987e67bec2c60211e8aa1ef Mon Sep 17 00:00:00 2001 From: Joerg Schambacher Date: Fri, 29 Jan 2021 16:16:39 +0100 -Subject: [PATCH 486/580] Enhances the Hifiberry DAC+ driver for Hifiberry +Subject: [PATCH 486/661] Enhances the Hifiberry DAC+ driver for Hifiberry AMP100 support Adds the necessary GPIO handling and ALSA mixer extensions. @@ -206443,10 +206443,10 @@ index 157ab4c2cc85..bdcac1b6992c 100644 2.18.4 -From a4d8ca6198f26ab6a0d09feb6e962eb314cc39aa Mon Sep 17 00:00:00 2001 +From 36a24f928eb07822d31d0e1730b5d745a3310c3e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 3 Feb 2021 16:23:43 +0000 -Subject: [PATCH 487/580] ARM: dts: Declare Pi400 and CM4 have no audio pins +Subject: [PATCH 487/661] ARM: dts: Declare Pi400 and CM4 have no audio pins The audio_pins node is left as a placeholder for the audremap overlay, and it must have (empty) brcm,function and brcm,pins properties @@ -206492,10 +206492,10 @@ index 7ab0aba5f1a3..9ab2feb4424f 100644 2.18.4 -From 803e6181c14b6754a6dda945c60d0d275361270f Mon Sep 17 00:00:00 2001 +From 346dbf9042712c7a21620ba186db842073455f8b Mon Sep 17 00:00:00 2001 From: David Plowman Date: Thu, 4 Feb 2021 17:29:32 +0000 -Subject: [PATCH 488/580] media: i2c: imx290: Replace V4L2_CID_GAIN with +Subject: [PATCH 488/661] media: i2c: imx290: Replace V4L2_CID_GAIN with V4L2_CID_ANALOGUE_GAIN Most software (including libcamera) requires V4L2_CID_ANALOGUE_GAIN, @@ -206536,10 +206536,10 @@ index 2e646fb01856..a2df46e4aabc 100644 2.18.4 -From c58e93b764104549a250d0ac336734d0927395a1 Mon Sep 17 00:00:00 2001 +From 6096a62b2a1e415aa41d2182ca0d31c872a0ab9d Mon Sep 17 00:00:00 2001 From: David Plowman Date: Thu, 4 Feb 2021 21:21:44 +0000 -Subject: [PATCH 489/580] media: i2c: imx290: Fix number of controls in +Subject: [PATCH 489/661] media: i2c: imx290: Fix number of controls in v4l2_ctrl_handler_init The number is only a hint, but may as well be correct. @@ -206570,10 +206570,10 @@ index a2df46e4aabc..33ce80686163 100644 2.18.4 -From 08842d8ffb4d11f3819703390072473d1cffe40c Mon Sep 17 00:00:00 2001 +From fe769473fcb63e2646f8dab35d326b61af94ac77 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 5 Feb 2021 09:20:31 +0000 -Subject: [PATCH 490/580] i2c: bcm2835: Handle untimely DONE signal +Subject: [PATCH 490/661] i2c: bcm2835: Handle untimely DONE signal Under certain circumstance the DONE flag can appear to be set early. Fortunately the TA flag is often still set at that time, and it can be @@ -206639,10 +206639,10 @@ index 5b2589b6b9cc..90ca593d8ae3 100644 2.18.4 -From 6e132a5ab76d4ac567e66d95e1fce59f9983a683 Mon Sep 17 00:00:00 2001 +From 9ba055d24fa738397bbbda528e463368662f82c3 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 5 Feb 2021 12:04:06 +0000 -Subject: [PATCH 491/580] configs: Add MICREL_PHY=y +Subject: [PATCH 491/661] configs: Add MICREL_PHY=y Signed-off-by: Phil Elwell --- @@ -206678,10 +206678,10 @@ index 6acc0dbe9187..a2531896a8b6 100644 2.18.4 -From 879dc52fbece898de5b357523de7f0acddbc4e10 Mon Sep 17 00:00:00 2001 +From 1ec55407010433d08b0be8e5443c90da8eeb2bfb Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 8 Dec 2020 17:11:26 +0100 -Subject: [PATCH 492/580] Revert "vc4_hdmi: Move hdmi reset to bind" +Subject: [PATCH 492/661] Revert "vc4_hdmi: Move hdmi reset to bind" This reverts commit fdb112d44c1b0659aec1ef841939dff0f0dee49e. --- @@ -206716,10 +206716,10 @@ index 4dd0951f4ab1..24f1d8386db7 100644 2.18.4 -From e6a0353bc64852ed8efcdb489e9d55e26798ed49 Mon Sep 17 00:00:00 2001 +From 0da617888d882da2f8321fb185367fd13fbcb126 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 8 Dec 2020 17:13:32 +0100 -Subject: [PATCH 493/580] Revert "vc4_hdmi: Make irq shared" +Subject: [PATCH 493/661] Revert "vc4_hdmi: Make irq shared" This reverts commit cd59e087d8bba4ba834565b4d48ba983143b5f27. --- @@ -206744,10 +206744,10 @@ index 24f1d8386db7..6aa97ac11a7c 100644 2.18.4 -From fa8ee1e2c35c026b88b6869cd486a6b599396ee0 Mon Sep 17 00:00:00 2001 +From 82e7b855c6b218ce742b353f9e35a45171bd4f69 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 8 Dec 2020 17:13:33 +0100 -Subject: [PATCH 494/580] Revert "vc4_hdmi_regs: Make interrupt mask variant +Subject: [PATCH 494/661] Revert "vc4_hdmi_regs: Make interrupt mask variant specific" This reverts commit 37c74a07cf22a7385c93170a723d22b95ff20a51. @@ -206856,10 +206856,10 @@ index 1f1ed7efaff7..78fd28599aeb 100644 2.18.4 -From b27d0ada43b9638df725510182ee5cb463a77b4f Mon Sep 17 00:00:00 2001 +From 401d86ee5b4d1b703e64ca3fca93c847b56c0a90 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 8 Dec 2020 17:13:35 +0100 -Subject: [PATCH 495/580] Revert "vc4_hdmi_regs: Add Intr2 register block" +Subject: [PATCH 495/661] Revert "vc4_hdmi_regs: Add Intr2 register block" This reverts commit c865bb1bb6b481acfa4157e4331db278a176f887. --- @@ -206987,10 +206987,10 @@ index 9e85266e53f5..20a1438a72cb 100644 2.18.4 -From 0995b0a228028c9fcd5e6e29699e04d3b0af93f3 Mon Sep 17 00:00:00 2001 +From a9692ca025ad6ccf911b45a8fab86f948b2b8d1e Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 8 Dec 2020 17:13:38 +0100 -Subject: [PATCH 496/580] Revert "vc4_hdmi: BCM2835 requires a fixed hsm clock +Subject: [PATCH 496/661] Revert "vc4_hdmi: BCM2835 requires a fixed hsm clock for CEC to work" This reverts commit 1cad24365e9f4325d68d4a16025f77abe3eda2f7. @@ -207110,10 +207110,10 @@ index b0ba2421cc04..f18f1d775241 100644 2.18.4 -From 11a252f3a1c82656d910620b020731c803a6988a Mon Sep 17 00:00:00 2001 +From 533579ae01560c10888a31db3f8da0a3dce74a86 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:22:55 +0100 -Subject: [PATCH 497/580] ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835 +Subject: [PATCH 497/661] ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835 The BCM2711 has a number of instances of interrupt controllers handled by the driver behind the BRCMSTB_L2_IRQ Kconfig option (irq-brcmstb-l2). @@ -207155,10 +207155,10 @@ index 5c4ac1c9f4e0..2c5620822895 100644 2.18.4 -From 3b6c95252d02c839e2c2af68e487878bbbd9fa90 Mon Sep 17 00:00:00 2001 +From 64d344c5500993bd2f263686afbe3d1c55d9ac6b Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 11 Jan 2021 15:22:56 +0100 -Subject: [PATCH 498/580] drm/vc4: hdmi: Move hdmi reset to bind +Subject: [PATCH 498/661] drm/vc4: hdmi: Move hdmi reset to bind The hdmi reset got moved to a later point in the commit 9045e91a476b ("drm/vc4: hdmi: Add reset callback"). @@ -207205,10 +207205,10 @@ index 9c943fc99c0c..83693ad916d3 100644 2.18.4 -From 78c7c190eb7406cb22f96bf1b84ddd4afebc4c3e Mon Sep 17 00:00:00 2001 +From 73fde75e5b56713a1e92d59a74f2a36866cd2a5e Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:02 +0100 -Subject: [PATCH 499/580] drm/vc4: hdmi: Introduce a CEC clock +Subject: [PATCH 499/661] drm/vc4: hdmi: Introduce a CEC clock While the BCM2835 had the CEC clock derived from the HSM clock, the BCM2711 has a dedicated parent clock for it. @@ -207273,10 +207273,10 @@ index f18f1d775241..c9b4b7678df4 100644 2.18.4 -From 8436843813c3ef88208cd4d79e22d50c8343cc27 Mon Sep 17 00:00:00 2001 +From 3e0b717ff54c4d9fc93b977c2d1b024aef25244a Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:03 +0100 -Subject: [PATCH 500/580] drm/vc4: hdmi: Split the interrupt handlers +Subject: [PATCH 500/661] drm/vc4: hdmi: Split the interrupt handlers The BCM2711 has two different interrupt sources to transmit and receive CEC messages, provided through an external interrupt chip shared between @@ -207420,10 +207420,10 @@ index e1862ffbc5e6..5643a4fb5b98 100644 2.18.4 -From 76e5631309e2804ecd9340d5e20fb92a4630cbe5 Mon Sep 17 00:00:00 2001 +From e17bd166fc979f9a3e71e7293718c4aa1f4d97f7 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:04 +0100 -Subject: [PATCH 501/580] drm/vc4: hdmi: Support BCM2711 CEC interrupt setup +Subject: [PATCH 501/661] drm/vc4: hdmi: Support BCM2711 CEC interrupt setup The HDMI controller found in the BCM2711 has an external interrupt controller for the CEC and hotplug interrupt shared between the two @@ -207544,10 +207544,10 @@ index c9b4b7678df4..ae1be14812b8 100644 2.18.4 -From e4e614793f333d4c1fec4354a637f08a477095de Mon Sep 17 00:00:00 2001 +From 2e0b5b87fb8a3205b34fbb17299621173a5cf7de Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 11 Jan 2021 15:23:05 +0100 -Subject: [PATCH 502/580] drm/vc4: hdmi: Remove cec_available flag +Subject: [PATCH 502/661] drm/vc4: hdmi: Remove cec_available flag Now that our HDMI controller supports CEC for the BCM2711, let's remove that flag. @@ -207600,10 +207600,10 @@ index ae1be14812b8..cb2af9f144df 100644 2.18.4 -From 897e5a1206ee401f62164e1ba19f2cf98419c23d Mon Sep 17 00:00:00 2001 +From e1114fd069a16d0c5d2f669761d2537f51faded9 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:06 +0100 -Subject: [PATCH 503/580] drm/vc4: hdmi: Don't register the CEC adapter if +Subject: [PATCH 503/661] drm/vc4: hdmi: Don't register the CEC adapter if there's no interrupts We introduced the BCM2711 support to the vc4 HDMI controller with 5.10, @@ -207643,10 +207643,10 @@ index 66963eeb4db0..e0cff1935fbd 100644 2.18.4 -From 20b63108c66c64111cc7dad34bc309c9b018eb54 Mon Sep 17 00:00:00 2001 +From e515ac157519b1ecfc275846a5b3226ffc2e7ad1 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:07 +0100 -Subject: [PATCH 504/580] dt-binding: display: bcm2711-hdmi: Add CEC and +Subject: [PATCH 504/661] dt-binding: display: bcm2711-hdmi: Add CEC and hotplug interrupts The CEC and hotplug interrupts were missing when that binding was @@ -207700,10 +207700,10 @@ index 7ce06f9f9f8e..6e8ac910bdd8 100644 2.18.4 -From a071a181b7c5ec1e07191132be6a6b2440324392 Mon Sep 17 00:00:00 2001 +From 2f060e7d43142979db9e5b3934d8a2ade37cf98f Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:08 +0100 -Subject: [PATCH 505/580] ARM: dts: bcm2711: Add the BSC interrupt controller +Subject: [PATCH 505/661] ARM: dts: bcm2711: Add the BSC interrupt controller The BSC controllers used for the HDMI DDC have an interrupt controller shared between both instances. Let's add it to avoid polling. @@ -207755,10 +207755,10 @@ index 7c2d374cb749..786faf7050fc 100644 2.18.4 -From af05632517e4c286c8320c77139c67ac6546a0b0 Mon Sep 17 00:00:00 2001 +From 5231248e823727df9a01f962b6a613f7264da4c7 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 11 Jan 2021 15:23:09 +0100 -Subject: [PATCH 506/580] ARM: dts: bcm2711: Add the CEC interrupt controller +Subject: [PATCH 506/661] ARM: dts: bcm2711: Add the CEC interrupt controller The CEC and hotplug interrupts go through an interrupt controller shared between the two HDMI controllers. @@ -207819,10 +207819,10 @@ index 786faf7050fc..9e0d9b2ca586 100644 2.18.4 -From 238d6d054dfff41b910bdda1a820c3a805844039 Mon Sep 17 00:00:00 2001 +From 42c87dc71d81fef923c9bc1f0b328c2606706ff9 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 9 Dec 2020 16:37:01 +0000 -Subject: [PATCH 507/580] bcm2711: Disable bsc_intr and aon_intr by default and +Subject: [PATCH 507/661] bcm2711: Disable bsc_intr and aon_intr by default and enable in overlay Signed-off-by: Dom Cobley @@ -207880,10 +207880,10 @@ index f721f12d729d..8e9220f303f0 100644 2.18.4 -From 0e61c39f8b8501eeda794ffacf1b449c55b7a960 Mon Sep 17 00:00:00 2001 +From 94f5b49ddeb64215cbd337f322cd62a27e54da0b Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 15 Dec 2020 16:42:42 +0100 -Subject: [PATCH 508/580] drm/vc4: hdmi: Limit the BCM2711 to the max without +Subject: [PATCH 508/661] drm/vc4: hdmi: Limit the BCM2711 to the max without scrambling Unlike the previous generations, the HSM clock limitation is way above @@ -207931,10 +207931,10 @@ index e0cff1935fbd..2d1359b1cb38 100644 2.18.4 -From f2eec657918866fa4ee6fc9cc40be811fdf10c90 Mon Sep 17 00:00:00 2001 +From 01097729c651b7ad7ead208bb81dc7c2e75c9f4b Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 11 Jan 2021 17:08:20 +0000 -Subject: [PATCH 509/580] bcm2711: Remove old GIC interrupt +Subject: [PATCH 509/661] bcm2711: Remove old GIC interrupt Now handled through aon_intr @@ -207967,10 +207967,10 @@ index 0ef7bde01555..9d2730c27637 100644 2.18.4 -From eb61dbf5e6b66ecec24775b44ad6c60307ccfedb Mon Sep 17 00:00:00 2001 +From dd97e9f0480c2582b358f1cce2a780c3860735a4 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 8 Feb 2021 11:48:35 +0000 -Subject: [PATCH 510/580] staging:bcm2835-camera: Fix the cherry-pick of AWB +Subject: [PATCH 510/661] staging:bcm2835-camera: Fix the cherry-pick of AWB Greyworld The cherry-pick of the patch that added the greyworld AWB mode @@ -208001,10 +208001,10 @@ index a7af25f90449..f73daa38fa66 100644 2.18.4 -From 4b9ffa798dceb0c6593a50335a925156a73fcf9a Mon Sep 17 00:00:00 2001 +From 07e7178247942f1ed78ae1ec2c487197feee9300 Mon Sep 17 00:00:00 2001 From: David Knell Date: Mon, 8 Feb 2021 03:33:30 +0000 -Subject: [PATCH 511/580] Overlays for PiFi-Mini amp +Subject: [PATCH 511/661] Overlays for PiFi-Mini amp Signed-off-by: David Knell --- @@ -208095,10 +208095,10 @@ index 000000000000..963597d611b5 2.18.4 -From d4f6b0aeea29e988a6664d2f56d06a50cebc1723 Mon Sep 17 00:00:00 2001 +From fc7912ea38cbe43f75c229c91c706a1131f29242 Mon Sep 17 00:00:00 2001 From: David Knell Date: Mon, 8 Feb 2021 03:35:15 +0000 -Subject: [PATCH 512/580] Added PiFi-Mini to rpi-simple-soundcard.c +Subject: [PATCH 512/661] Added PiFi-Mini to rpi-simple-soundcard.c Signed-off-by: David Knell --- @@ -208245,10 +208245,10 @@ index bf61a4239073..c25351e6ee90 100644 2.18.4 -From 1cb3af60ace42b839c87ea3eeb8c4e96fd0829e3 Mon Sep 17 00:00:00 2001 +From 35b84ad5f34dbb690184b5a78801c070b0c58e23 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Tue, 12 Jan 2021 13:55:39 +0000 -Subject: [PATCH 513/580] bcm2835-isp: Allow formats with different colour +Subject: [PATCH 513/661] bcm2835-isp: Allow formats with different colour spaces. Each supported format now includes a mask showing the allowed colour @@ -208965,10 +208965,10 @@ index 4d24aec7203d..5cca8bdd1d65 100644 2.18.4 -From 67bf370a3ceff27a8d69dee120a31fa911e82510 Mon Sep 17 00:00:00 2001 +From bc499d589b94577ae0982de125042ae05ca43baa Mon Sep 17 00:00:00 2001 From: Joerg Schambacher Date: Mon, 1 Feb 2021 16:53:46 +0100 -Subject: [PATCH 514/580] Hifiberry DAC+ADC Pro fix for the PLL when changing +Subject: [PATCH 514/661] Hifiberry DAC+ADC Pro fix for the PLL when changing sample rates Adds 2 msecs delay when switching between oscillators to allow @@ -209027,10 +209027,10 @@ index 4c03927107e3..8b04d30bcbee 100644 2.18.4 -From 7923a895098ef798a9cc7b9a83fdbe3fa5c0d8b7 Mon Sep 17 00:00:00 2001 +From 2ef332660ef28d001158f71eed501034e5fc92d4 Mon Sep 17 00:00:00 2001 From: Mathias Anhalt Date: Sun, 24 Jan 2021 15:15:01 +0100 -Subject: [PATCH 515/580] Fixed picture line bug in all ov9281 modes +Subject: [PATCH 515/661] Fixed picture line bug in all ov9281 modes Signed-off-by: Mathias Anhalt --- @@ -209071,10 +209071,10 @@ index 12621c2dccd5..c646f11ef1d5 100644 2.18.4 -From 5c9bbd92427b3c4173bfe644589628413281546a Mon Sep 17 00:00:00 2001 +From a00b71659bb999eaa5ed498a71e187d041352818 Mon Sep 17 00:00:00 2001 From: Mathias Anhalt Date: Wed, 3 Feb 2021 20:34:09 +0100 -Subject: [PATCH 516/580] Added hflip and vflip controls to ov9281 +Subject: [PATCH 516/661] Added hflip and vflip controls to ov9281 Signed-off-by: Mathias Anhalt --- @@ -209189,10 +209189,10 @@ index c646f11ef1d5..16777b6f8e14 100644 2.18.4 -From 8276be2768abf16d4cc8833d9aa1e90b0dd2c8db Mon Sep 17 00:00:00 2001 +From 2e62e4a472b5bb4e5dc2f7b545b9170519f642d8 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 12 Feb 2021 17:45:57 +0000 -Subject: [PATCH 517/580] Partial revert "bcm2711: Disable bsc_intr and +Subject: [PATCH 517/661] Partial revert "bcm2711: Disable bsc_intr and aon_intr by default and enable in overlay" This reverts commit c765fd45856a34b9e46daa9263faeafe006c3985. @@ -209239,10 +209239,10 @@ index 8e9220f303f0..6a11260a4f1a 100644 2.18.4 -From d0f948226c2aa1370d3134809753e90cb7646c9c Mon Sep 17 00:00:00 2001 +From 2cc30af747528bd2262643266b95fed790fe0b35 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 12 Feb 2021 17:49:25 +0000 -Subject: [PATCH 518/580] Revert "ARM: dts: bcm2711: Add the BSC interrupt +Subject: [PATCH 518/661] Revert "ARM: dts: bcm2711: Add the BSC interrupt controller" This reverts commit 93a3b097c467bd5efc1ae3a271c336fdad3b2108. @@ -209301,10 +209301,10 @@ index be2f9ba08ea8..b4bca5af95e1 100644 2.18.4 -From 3e3391d7e97b1f7be97e342aed03c5cdf7d3571e Mon Sep 17 00:00:00 2001 +From d1af4a75d7bd21aadc7a8607c0a89bcc0b3000f7 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 15 Feb 2021 10:25:35 +0000 -Subject: [PATCH 519/580] gpio-fsm: Rename 'num-soft-gpios' to avoid warning +Subject: [PATCH 519/661] gpio-fsm: Rename 'num-soft-gpios' to avoid warning As of 5.10, the Device Tree parser warns about properties that look like references to "suppliers" of various services. "num-soft-gpios" @@ -209339,10 +209339,10 @@ index 2cab50e51315..708f258fda35 100644 2.18.4 -From 8903c3ec9a6ced1c52f05e1afab52da54a495234 Mon Sep 17 00:00:00 2001 +From 5bf7b8bb22f6c60d96db9cf0ae4195f498c7910b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 15 Feb 2021 10:32:18 +0000 -Subject: [PATCH 520/580] overlays: Rename gpio-fsm property num-soft-gpios +Subject: [PATCH 520/661] overlays: Rename gpio-fsm property num-soft-gpios The gpio-fsm property "num-soft-gpios" triggers a kernel DT checker that warns about the lack of #gpio-cells on a random node with the @@ -209385,10 +209385,10 @@ index afc9f034b5fc..3c997266a67d 100644 2.18.4 -From 4828c7cd7e387f911e81b131279d8efc6acf0568 Mon Sep 17 00:00:00 2001 +From 8c765fe1fbc0e5e4fd8f3705ee88099133969d7e Mon Sep 17 00:00:00 2001 From: Laurentiu Palcu Date: Wed, 27 Nov 2019 14:42:35 +0000 -Subject: [PATCH 521/580] drm: fix HDR static metadata type field numbering +Subject: [PATCH 521/661] drm: fix HDR static metadata type field numbering According to CTA-861 specification, HDR static metadata data block allows a sink to indicate which HDR metadata types it supports by setting the SM_0 to @@ -209422,10 +209422,10 @@ index 9850d59d6f1c..c8ec982ff498 100644 2.18.4 -From 1a083f7287a3fc3504cb4fac31b0f3077d55d143 Mon Sep 17 00:00:00 2001 +From 2f4bd788e16bfc92d0735618a83d53c99ec87dbe Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 2 Dec 2020 18:36:24 +0000 -Subject: [PATCH 522/580] drm/vc4: Add HDR metadata property to the VC5 HDMI +Subject: [PATCH 522/661] drm/vc4: Add HDR metadata property to the VC5 HDMI connectors Now that we can export deeper colour depths, add in the signalling @@ -209529,10 +209529,10 @@ index cb2af9f144df..33b5f120bbeb 100644 2.18.4 -From 510be631d724e4c4e612e7c8cbb0e89ce83c3314 Mon Sep 17 00:00:00 2001 +From 3bb58e54fa256d261435d1242cc5f7b81edb8782 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Fri, 5 Feb 2021 14:07:12 +0000 -Subject: [PATCH 523/580] drm/vc4: Add connector check to trigger mode_change +Subject: [PATCH 523/661] drm/vc4: Add connector check to trigger mode_change when hdr metadata changes Signed-off-by: Dom Cobley @@ -209602,10 +209602,10 @@ index 905e5595dd8d..2eda64df7351 100644 2.18.4 -From 85df4178700173bb10c8a3ad3f77e06f50f0df4e Mon Sep 17 00:00:00 2001 +From 1614876de3a7954ae5f89d0935a8345d7eab9305 Mon Sep 17 00:00:00 2001 From: John Cox Date: Mon, 8 Feb 2021 16:01:37 +0000 -Subject: [PATCH 524/580] staging: rpivid: Fix crash when CMA alloc fails +Subject: [PATCH 524/661] staging: rpivid: Fix crash when CMA alloc fails If realloc to increase coeff size fails then attempt to re-allocate the original size. If that also fails then flag a fatal error to abort @@ -209728,10 +209728,10 @@ index fc3caed58187..e6b07920aa8c 100644 2.18.4 -From 5a9023cee9dbb65176fb6245639dceab5a874ed4 Mon Sep 17 00:00:00 2001 +From 67b1639b3526a2e59a4613ac381ed5e135af071c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 4 Feb 2021 14:23:58 +0000 -Subject: [PATCH 525/580] dt: Add option for dpi without DE and PCLK (for +Subject: [PATCH 525/661] dt: Add option for dpi without DE and PCLK (for VGA666) VGA666 doesn't use the DE or PCLK signals, therefore there is @@ -209764,10 +209764,10 @@ index e657affae46f..12c7b0b2bb5f 100644 2.18.4 -From 22dd361e9bc6bd70c66075413c4927c71cf993ab Mon Sep 17 00:00:00 2001 +From f2dcc4701f0d563753a52306195d0a5b46a8115f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 4 Feb 2021 14:50:59 +0000 -Subject: [PATCH 526/580] defconfigs: Add DRM_DISPLAY_CONNECTOR and +Subject: [PATCH 526/661] defconfigs: Add DRM_DISPLAY_CONNECTOR and DRM_SIMPLE_BRIDGE for VGA666 VGA666 uses "vga-connector" from DRM_DISPLAY_CONNECTOR, and @@ -209852,10 +209852,10 @@ index aa89eb5704cb..f0a791a03abd 100644 2.18.4 -From e375a84f2c73e2bd5c4236c8277db845f8ed175d Mon Sep 17 00:00:00 2001 +From 99aff40e07a8c6ed487feb80bcc4fea617fbfb3c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 4 Feb 2021 14:41:10 +0000 -Subject: [PATCH 527/580] dtoverlays: Add an overlay for the VGA666 when used +Subject: [PATCH 527/661] dtoverlays: Add an overlay for the VGA666 when used with vc4-kms-v3d Includes optional use of GPIOs 0&1 / BSC0 for DDC to read the EDID @@ -210016,10 +210016,10 @@ index 000000000000..6e787099e861 2.18.4 -From 512895a3543204c009c9f3fb3ccf43e0e2692236 Mon Sep 17 00:00:00 2001 +From 5dabb2f5bc0784d091d41b953afae4fa095d6e51 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 12 Feb 2021 17:31:37 +0000 -Subject: [PATCH 528/580] drm/vc4: Change the default DPI format to being +Subject: [PATCH 528/661] drm/vc4: Change the default DPI format to being 18bpp, not 24. DPI hasn't really been used up until now, so the default has @@ -210056,10 +210056,10 @@ index a90f2545baee..db63f4e11b17 100644 2.18.4 -From a89ed4a5894476508c4059436eed082c2fa376c7 Mon Sep 17 00:00:00 2001 +From a3c3d5335199df37bd7421797f046a333c718bc6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Sat, 17 Oct 2020 15:42:54 +0100 -Subject: [PATCH 529/580] gpio-fsm: Show state info in /sys/class/gpio-fsm +Subject: [PATCH 529/661] gpio-fsm: Show state info in /sys/class/gpio-fsm Add gpio-fsm sysfs entries under /sys/class/gpio-fsm. For each state machine show the current state, which state (if any) will be entered @@ -210246,10 +210246,10 @@ index 708f258fda35..d71a81d9b669 100644 2.18.4 -From b46a9eb8e630d23d6e9a7ed513164479dbf04501 Mon Sep 17 00:00:00 2001 +From 08968794dd22b346435bba96d83d3fce8a1ea420 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 17 Feb 2021 09:21:30 +0000 -Subject: [PATCH 530/580] gpio-fsm: Fix shutdown timeout handling +Subject: [PATCH 530/661] gpio-fsm: Fix shutdown timeout handling The driver is intended to jump directly to a shutdown state in the event of a timeout during shutdown, but the sense of the test was @@ -210278,10 +210278,10 @@ index d71a81d9b669..306f5123546c 100644 2.18.4 -From bdbe5af37f9644042820b78db5d176ace96d9ae4 Mon Sep 17 00:00:00 2001 +From 831a6ad1cd28ec71856cdb7084ed4fd5aa09322c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 17 Feb 2021 09:29:26 +0000 -Subject: [PATCH 531/580] overlays: fsm-demo: Ensure all LEDs are turned off +Subject: [PATCH 531/661] overlays: fsm-demo: Ensure all LEDs are turned off If the shutdown process is delayed enough to trigger the shutdown timeout then one or more states in the shutdown sequence might be @@ -210310,10 +210310,10 @@ index 9b5da179914f..e9944f5cd258 100644 2.18.4 -From 2733cd89984a79317ac9e558b125937f9f458320 Mon Sep 17 00:00:00 2001 +From f3c17103e5615297137c48012f95d88b7142f973 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 17 Feb 2021 09:52:27 +0000 -Subject: [PATCH 532/580] configs: Add various missing IPV6 modules +Subject: [PATCH 532/661] configs: Add various missing IPV6 modules See: https://github.com/raspberrypi/linux/issues/4144 @@ -210545,10 +210545,10 @@ index f0a791a03abd..60bda75b6965 100644 2.18.4 -From 18c6b9573c3025dcf03e6db90523c9703e0acc23 Mon Sep 17 00:00:00 2001 +From 25555bc3b91f4f8c31fd0ff78ef52f0c0f70aafb Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 10 Feb 2021 10:18:53 +0000 -Subject: [PATCH 533/580] media: i2c: imx477: Remove auto frame length +Subject: [PATCH 533/661] media: i2c: imx477: Remove auto frame length adjusting The V4L2_CID_EXPOSURE_AUTO_PRIORITY was used to let the sensor control @@ -210693,10 +210693,10 @@ index f68e7718b09c..30055244166b 100644 2.18.4 -From 2acf80028bb1b15fd2f8411a8235fb58cc312689 Mon Sep 17 00:00:00 2001 +From 19ae0846eb926b6a6855da5c5b2e61a7e7175259 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 10 Feb 2021 10:50:32 +0000 -Subject: [PATCH 534/580] media: i2c: imx477: Add very long exposure control to +Subject: [PATCH 534/661] media: i2c: imx477: Add very long exposure control to the driver Add support for very long exposures by using the exposure multiplier @@ -210825,10 +210825,10 @@ index 30055244166b..0143e3129258 100644 2.18.4 -From 33325688c27a52ebced903cd9545dcfaff5f8733 Mon Sep 17 00:00:00 2001 +From c6ab2777a549a950541b4ab4c8463e275986e77a Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 17 Feb 2021 18:08:12 +0000 -Subject: [PATCH 535/580] media: i2c: imx290: Fix up exposure calcuations and +Subject: [PATCH 535/661] media: i2c: imx290: Fix up exposure calcuations and ranges Should now correspond exactly to the datasheet. @@ -210890,10 +210890,10 @@ index 33ce80686163..43e2f294a53b 100644 2.18.4 -From 5f3d39118b923b7de857272da6bd635432aa5ab7 Mon Sep 17 00:00:00 2001 +From 62cbc211339c0ece7cfd05816718c818841d8e20 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Thu, 18 Feb 2021 11:58:29 +0000 -Subject: [PATCH 536/580] media: i2c: imx290: Handle exposure correctly when +Subject: [PATCH 536/661] media: i2c: imx290: Handle exposure correctly when vblank changes When vblank changes we must modify the exposure range. Also, with this @@ -210938,10 +210938,10 @@ index 43e2f294a53b..255f66985306 100644 2.18.4 -From 0ed8681f026397c7eec8d1f13f11457231ef45da Mon Sep 17 00:00:00 2001 +From c2cb1262a7f91955c1691c8de02d64439af22a38 Mon Sep 17 00:00:00 2001 From: pifi-bz <73530753+pifi-bz@users.noreply.github.com> Date: Fri, 19 Feb 2021 13:14:32 +0200 -Subject: [PATCH 537/580] DAC overlays (#4154) +Subject: [PATCH 537/661] DAC overlays (#4154) Adding overlays for PiFi DAC Zero and PiFi DAC HD. @@ -211105,10 +211105,10 @@ index 000000000000..645ea74cb435 2.18.4 -From f4c938378ba87613d0e21f9e1c9688133fd15ff4 Mon Sep 17 00:00:00 2001 +From 3166b3f424a282ca18b5b045f825b1f56c9e3353 Mon Sep 17 00:00:00 2001 From: Peter Harper Date: Mon, 22 Feb 2021 12:34:20 +0000 -Subject: [PATCH 538/580] configs: Change CONFIG_BLK_DEV_NVME=y for 2711 +Subject: [PATCH 538/661] configs: Change CONFIG_BLK_DEV_NVME=y for 2711 See https://github.com/raspberrypi/linux/issues/4163 --- @@ -211146,10 +211146,10 @@ index b5dce7480cff..8a643571a458 100644 2.18.4 -From a2ceb3d37abe6280f2b4541994e0caaf197bad73 Mon Sep 17 00:00:00 2001 +From c95c1ec5c45b5e1442d7a26619a2fd75ae88c896 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 18 Feb 2021 15:05:57 +0000 -Subject: [PATCH 539/580] media: i2c: imx477: Fix crop height for 2028x1080 +Subject: [PATCH 539/661] media: i2c: imx477: Fix crop height for 2028x1080 mode The crop height for this mode was set at 2600 lines, it should be 2160 @@ -211177,10 +211177,10 @@ index 0143e3129258..e3d164555b09 100644 2.18.4 -From ba1dd6adef22f9772e19ed1c99cc9b9943b871cf Mon Sep 17 00:00:00 2001 +From 490997cc87892ac304266333b646305f24b4dba8 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 18 Feb 2021 15:23:11 +0000 -Subject: [PATCH 540/580] media: i2c: imx477: Replace existing 1012x760 mode +Subject: [PATCH 540/661] media: i2c: imx477: Replace existing 1012x760 mode The existing 1012x760 120 fps mode has significant IQ problem using the internal sensor scaler. Replace this mode with a 1332x990 120 fps @@ -211380,10 +211380,10 @@ index e3d164555b09..0c552b9d54c5 100644 2.18.4 -From 7247b58520a0caa1259d4cbcae321fb8a8e623cd Mon Sep 17 00:00:00 2001 +From cf2f6b245c2c7ed1c424f37a684ac72d57173bca Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Fri, 19 Feb 2021 10:30:49 +0000 -Subject: [PATCH 541/580] media: i2c: imx477: Remove internal +Subject: [PATCH 541/661] media: i2c: imx477: Remove internal v4l2_mbus_framefmt from the state The only field in this struct that is used is the format code, so @@ -211456,10 +211456,10 @@ index 0c552b9d54c5..f43c86407d97 100644 2.18.4 -From 4a78d3e30b8fc06412d56019065cf38ca5bce78e Mon Sep 17 00:00:00 2001 +From 0f3b11557d9ebbd568d0c82e6433dfbaef43dd30 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Fri, 19 Feb 2021 11:06:40 +0000 -Subject: [PATCH 542/580] media: i2c: imx477: Remove unused function parameter +Subject: [PATCH 542/661] media: i2c: imx477: Remove unused function parameter The struct imx477 *ctrl parameter is not used in the function imx477_adjust_exposure_range(), so remove it. @@ -211496,10 +211496,10 @@ index f43c86407d97..34bfd22cadc6 100644 2.18.4 -From 72602bbd7e5427938eb76e56b3181f31628c30fd Mon Sep 17 00:00:00 2001 +From 8e09d9d5041661078f9083adcc55c2cf4569dcbb Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 26 Feb 2021 14:19:00 +0000 -Subject: [PATCH 543/580] overlays: i2c-rtc: Add the Dallas DS1340 +Subject: [PATCH 543/661] overlays: i2c-rtc: Add the Dallas DS1340 See: https://github.com/raspberrypi/linux/issues/4180 @@ -211567,10 +211567,10 @@ index 759f532d5be1..408b71ec97b5 100644 2.18.4 -From dea9ee19c7717e472ef3ff7561fbf41eaf5e8dec Mon Sep 17 00:00:00 2001 +From 43e4c4aaa1c3a5f6f500d644299429e21aeb240b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 26 Feb 2021 14:20:05 +0000 -Subject: [PATCH 544/580] overlays: Update the upstream overlay +Subject: [PATCH 544/661] overlays: Update the upstream overlay Signed-off-by: Phil Elwell --- @@ -211598,10 +211598,10 @@ index e0f7cc8ba9ea..f73a1879e690 100644 2.18.4 -From 0bc488d27670ee1b5bc206a760af4da00c326e7d Mon Sep 17 00:00:00 2001 +From 596685fb6c31a7f5224305f9d5db5aa42513a0ed Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 1 Mar 2021 09:12:44 +0000 -Subject: [PATCH 545/580] Revert "Bluetooth: Always request for user +Subject: [PATCH 545/661] Revert "Bluetooth: Always request for user confirmation for Just Works (LE SC)" This reverts commit ffee202a78c2980688bc5d2f7d56480e69a5e0c9. @@ -211649,10 +211649,10 @@ index bf4bef13d935..248cdaf77a5f 100644 2.18.4 -From 14753fc715384b5f1e13444f655b5b734c680117 Mon Sep 17 00:00:00 2001 +From 9ac88bc63ddd6987587b75e58a6662111454fb70 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 1 Mar 2021 09:14:35 +0000 -Subject: [PATCH 546/580] Revert "Bluetooth: Always request for user +Subject: [PATCH 546/661] Revert "Bluetooth: Always request for user confirmation for Just Works" This reverts commit 92516cd97fd4d8ad5b1421a0d51771044f453a5f. @@ -211698,10 +211698,10 @@ index 248cdaf77a5f..0f820decf511 100644 2.18.4 -From f90565f5759864f367f37ecb8f236f46025283c4 Mon Sep 17 00:00:00 2001 +From bfc51fda42b19de04ca5fe104a558024a6390335 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Fri, 5 Mar 2021 15:40:45 +0000 -Subject: [PATCH 547/580] media: bcm2835-unicam: Fix bug in buffer swapping +Subject: [PATCH 547/661] media: bcm2835-unicam: Fix bug in buffer swapping logic If multiple sets of interrupts occur simultaneously, it may be unsafe @@ -211780,10 +211780,10 @@ index a8b3f5433f04..234f0eaf9c8c 100644 2.18.4 -From 7c64d68ae2d1b00c3a772f35ec2c9610d61726f3 Mon Sep 17 00:00:00 2001 +From 43a7eaebf2cb443ff262563ede802b6dea95ba17 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Mon, 8 Mar 2021 15:32:25 +0000 -Subject: [PATCH 548/580] Assign crypto aliases to different AES implementation +Subject: [PATCH 548/661] Assign crypto aliases to different AES implementation modules The kernel modules aes-neon-blk and aes-neon-bs perform poorly, at least on @@ -211895,10 +211895,10 @@ index fb507d569922..cc52829d426a 100644 2.18.4 -From d4931c24adbc58444f397069f94d988344fbcbfd Mon Sep 17 00:00:00 2001 +From dd36fac2e85984d6eb8880aade990fde0c605c7c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 11 Mar 2021 16:11:46 +0000 -Subject: [PATCH 549/580] overlays: Improve the i2c-rtc,i2c_csi_dsi option +Subject: [PATCH 549/661] overlays: Improve the i2c-rtc,i2c_csi_dsi option The i2c_csi_dsi parameter of the i2c-rtc overlay (added for the CM4IO board) causes the RTC devices to be probed on the I2C0 bus appearing @@ -211951,10 +211951,10 @@ index 408b71ec97b5..b9842e11b5e0 100644 2.18.4 -From 8e2f318edbd77dbd4d72bea09a7fafe3beff3966 Mon Sep 17 00:00:00 2001 +From e69bdb5272c7fff69c1a1a06f915c72c61d55a45 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 11 Mar 2021 16:59:05 +0000 -Subject: [PATCH 550/580] configs: Add CONFIG_RTS_HCTOSYS=y +Subject: [PATCH 550/661] configs: Add CONFIG_RTS_HCTOSYS=y The recently improved RTC_HCTOSYS option now works with RTC drivers in modules, making it much more useful in that it removes the need to run @@ -212035,10 +212035,10 @@ index 60bda75b6965..584e82f7de99 100644 2.18.4 -From e754295cbadf54a2f762fe501514f36553800602 Mon Sep 17 00:00:00 2001 +From a23f3d9699bb49207b9cf7cf73cc79772bd7ba02 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 1 Feb 2021 18:48:47 +0000 -Subject: [PATCH 551/580] media/v4l2_m2m: In buffered mode run jobs if either +Subject: [PATCH 551/661] media/v4l2_m2m: In buffered mode run jobs if either port is streaming In order to get the intended behaviour of the stateful video @@ -212074,10 +212074,10 @@ index 34dd8ba5469f..329dc316934e 100644 2.18.4 -From dae9f70b44bad3a6ed3a28d00aa73e36cf6d2312 Mon Sep 17 00:00:00 2001 +From 235be64e54051b8d410b78cb046c51333405e555 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 1 Feb 2021 18:55:37 +0000 -Subject: [PATCH 552/580] staging/bcm2835-codec: Correct logging of size_t to +Subject: [PATCH 552/661] staging/bcm2835-codec: Correct logging of size_t to %zu Fixes: "staging/bcm2835-codec: Log the number of excess supported formats" @@ -212114,10 +212114,10 @@ index 94691ab7175a..0c4d8bf77b91 100644 2.18.4 -From eec53dfaa35a9d99de181bd1be049557620c58b8 Mon Sep 17 00:00:00 2001 +From b3532d4685b81d27565d2fccfc60de3c71bfd5ec Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 2 Feb 2021 15:50:18 +0000 -Subject: [PATCH 553/580] staging/bcm2835-codec: Add support for pixel aspect +Subject: [PATCH 553/661] staging/bcm2835-codec: Add support for pixel aspect ratio If the format is detected by the driver and a V4L2_EVENT_SOURCE_CHANGE @@ -212202,10 +212202,10 @@ index 0c4d8bf77b91..46f659e55f18 100644 2.18.4 -From efe12fc057d3e38111d7855cfa9fb15e56c3d9c4 Mon Sep 17 00:00:00 2001 +From 3cfef57a23ddb68e817b622e1742dfd58d5bb800 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 2 Feb 2021 16:46:39 +0000 -Subject: [PATCH 554/580] staging/bcm2835-codec: Implement additional +Subject: [PATCH 554/661] staging/bcm2835-codec: Implement additional g_selection calls for decode v4l_cropcap calls our vidioc_g_pixelaspect function to get the pixel @@ -212243,10 +212243,10 @@ index 46f659e55f18..7aa6c53e279e 100644 2.18.4 -From aee9b7da8b5452327a5be79dfe466f0fb41f2d25 Mon Sep 17 00:00:00 2001 +From 868c65449c1e15ca37f36523810fae59a5e41649 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 10 Mar 2021 19:07:48 +0000 -Subject: [PATCH 555/580] staging/bcm2835-codec: Add VC-1 support. +Subject: [PATCH 555/661] staging/bcm2835-codec: Add VC-1 support. Providing the relevant licence has been purchased, then Pi0-3 can decode VC-1. @@ -212278,10 +212278,10 @@ index 7aa6c53e279e..5729a8a7d94e 100644 2.18.4 -From f5a3bdbbd6d0be923621fc2b0b34837e4d5c0626 Mon Sep 17 00:00:00 2001 +From ddf7c685df5e29060896f6d10e45fab48fc8b2f0 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Sun, 24 Jan 2021 15:44:10 +0000 -Subject: [PATCH 556/580] vc4/drm: Avoid full hdmi audio fifo writes +Subject: [PATCH 556/661] vc4/drm: Avoid full hdmi audio fifo writes We are getting occasional VC4_HD_MAI_CTL_ERRORF in HDMI_MAI_CTL which seem to correspond with audio dropouts. @@ -212316,10 +212316,10 @@ index 2eda64df7351..f9eb6a557a4d 100644 2.18.4 -From 5af957c624a845dd09483082e7f3b52ccacf12b9 Mon Sep 17 00:00:00 2001 +From f538170bd276232412176e9f8f9e4895ecc6073a Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Fri, 12 Mar 2021 11:26:29 +0000 -Subject: [PATCH 557/580] vc4/drm: Increase hdmi audio axi priority to avoid +Subject: [PATCH 557/661] vc4/drm: Increase hdmi audio axi priority to avoid lost samples With HBR audio (8 channel 192kHz) we get occasional VC4_HD_MAI_CTL_DLATE error flags in @@ -212358,58 +212358,10 @@ index 8053ef54acc8..20581ee97827 100644 2.18.4 -From d7814ac9958a24a2b21700016c3a67bcffef3137 Mon Sep 17 00:00:00 2001 -From: Dom Cobley -Date: Thu, 11 Mar 2021 19:20:01 +0000 -Subject: [PATCH 558/580] drm/vc4: crtc: Reduce PV fifo threshold on hvs4 - -Experimentally have found PV on hvs4 reports fifo full -error with expected settings and does not with one less - -This appears as: -[drm:drm_atomic_helper_wait_for_flip_done] *ERROR* [CRTC:82:crtc-3] flip_done timed out - -with bit 10 of PV_STAT set "HVS driving pixels when the PV FIFO is full" - -Signed-off-by: Dom Cobley ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index a3439756594c..6d71c7e6979a 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -210,6 +210,7 @@ static u32 vc4_get_fifo_full_level(struct vc4_crtc *vc4_crtc, u32 format) - { - const struct vc4_crtc_data *crtc_data = vc4_crtc_to_vc4_crtc_data(vc4_crtc); - const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc); -+ struct vc4_dev *vc4 = to_vc4_dev(vc4_crtc->base.dev); - u32 fifo_len_bytes = pv_data->fifo_depth; - - /* -@@ -238,6 +239,13 @@ static u32 vc4_get_fifo_full_level(struct vc4_crtc *vc4_crtc, u32 format) - if (crtc_data->hvs_output == 5) - return 32; - -+ /* -+ * Experimentally have found PV on hvs4 reports fifo full -+ * error with expected settings and does not with one less -+ */ -+ if (!vc4->hvs->hvs5) -+ return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX - 1; -+ - return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX; - } - } --- -2.18.4 - - -From 1d0a78da5e214cac73606bdc04c3a9bbb4c26689 Mon Sep 17 00:00:00 2001 +From aec06310fc33d74d3dde2f84048e7b65cc2cbe49 Mon Sep 17 00:00:00 2001 From: Assaf Gordon Date: Fri, 12 Mar 2021 00:13:07 -0700 -Subject: [PATCH 559/580] overlays: gpio-led: new overlay +Subject: [PATCH 558/661] overlays: gpio-led: new overlay Add generic connection between the kernel's LED framework and RPI's GPIO pins. @@ -212608,10 +212560,10 @@ index 000000000000..d8e9d53f1b61 2.18.4 -From 57852bd4197beeeff5681a54d2fc356d93a45f1f Mon Sep 17 00:00:00 2001 +From d0154e0beba7703b01c964e29b60692a617a47ae Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Mon, 15 Mar 2021 17:25:02 +0100 -Subject: [PATCH 560/580] overlays: Add pcie-32bit-dma overlay +Subject: [PATCH 559/661] overlays: Add pcie-32bit-dma overlay In order to accommodate full PCI DMA access to memory on newer BCM2711 revisions, we're forced to map PCIe's view of physical memory with an @@ -212707,10 +212659,10 @@ index 000000000000..cca3e83721b7 2.18.4 -From 8da6469f4658826b8496d6ee690fb7fe15383029 Mon Sep 17 00:00:00 2001 +From a721a613f0e9e4c6d627ddfb9e923851884f34ee Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 17 Mar 2021 09:13:28 +0000 -Subject: [PATCH 561/580] Revert "i2c: bcm2835: Handle untimely DONE signal" +Subject: [PATCH 560/661] Revert "i2c: bcm2835: Handle untimely DONE signal" This reverts commit 431ac1d21b5e842c5a564bc0bab31d7dc11611f5. @@ -212774,10 +212726,10 @@ index 90ca593d8ae3..5b2589b6b9cc 100644 2.18.4 -From 33177b6fd13d761a0576649cf0eebf6059927518 Mon Sep 17 00:00:00 2001 +From 2a2c859ed2617fab75248e37e3d23b6c00ab721d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 22 Mar 2021 09:27:16 +0000 -Subject: [PATCH 562/580] ARM: dts: bcm2711: Add aliases for additional SPIs +Subject: [PATCH 561/661] ARM: dts: bcm2711: Add aliases for additional SPIs Without aliases for the new SPI interfaces in BCM2711, spidev instances will be allocated sequential numbers that may not match the number of @@ -212839,10 +212791,10 @@ index 9ab2feb4424f..9a999405ab85 100644 2.18.4 -From 183a59c4a772219dd9bfe2cc9c9d9704da1266df Mon Sep 17 00:00:00 2001 +From 1c1a0c5f7fb128992cba08a8cf7d0b4f1f6cacce Mon Sep 17 00:00:00 2001 From: ProBackup-nl <515451+ProBackup-nl@users.noreply.github.com> Date: Thu, 18 Mar 2021 18:21:43 +0100 -Subject: [PATCH 563/580] Make rpi poe fan less noisy in cool environments +Subject: [PATCH 562/661] Make rpi poe fan less noisy in cool environments MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -212869,10 +212821,10 @@ index 544038b614e1..af812132a8f7 100644 2.18.4 -From 58aa4ba90dd99d55d7d669b37d194cf7fbd520fc Mon Sep 17 00:00:00 2001 +From 7b2404a72191ed8938633858aaef429f142c0141 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 22 Mar 2021 19:43:48 +0000 -Subject: [PATCH 564/580] vc4/drm: Fix source offsets with DRM_FORMAT_P030 +Subject: [PATCH 563/661] vc4/drm: Fix source offsets with DRM_FORMAT_P030 Spec says: bits [31:4] of the given address should point to the 128-bit word containing the desired starting pixel, @@ -212946,10 +212898,10 @@ index 3d33fe3dacea..4198eb81e62d 100644 2.18.4 -From ec3b6fbaec208831bd0cce7a17828925b9b1fdc0 Mon Sep 17 00:00:00 2001 +From e4f2efd69af8fe7a19842a4a00d2c5082ffe1e30 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 15 Mar 2021 13:28:06 +0000 -Subject: [PATCH 565/580] vc4/drm: vc4_plane: Remove subpixel positioning check +Subject: [PATCH 564/661] vc4/drm: vc4_plane: Remove subpixel positioning check There is little harm in ignoring fractional coordinates (they just get truncated). @@ -213014,10 +212966,10 @@ index 4198eb81e62d..5a268ac6d6fc 100644 2.18.4 -From 2f4b61c54c87916369ea4134e7bbe71e3f8a293e Mon Sep 17 00:00:00 2001 +From c263ab0bead1e68a1d3c4f6781e73b070cdf4295 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 22 Feb 2021 18:47:19 +0000 -Subject: [PATCH 566/580] clk-raspberrypi: Also support HEVC clock +Subject: [PATCH 565/661] clk-raspberrypi: Also support HEVC clock Signed-off-by: Dom Cobley --- @@ -213040,10 +212992,10 @@ index f4884a5b598a..94ce38a2d5aa 100644 2.18.4 -From 6a3600a07d1e55bedea11c61444d4926007aedca Mon Sep 17 00:00:00 2001 +From ea04cd2270c4ee9213f7368acd14ade7fdc66dd4 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 22 Feb 2021 18:47:43 +0000 -Subject: [PATCH 567/580] dt: Switch hevc clock from fixed to firmware driver +Subject: [PATCH 566/661] dt: Switch hevc clock from fixed to firmware driver Signed-off-by: Dom Cobley --- @@ -213083,10 +213035,10 @@ index 0a611b31b9d4..bdd1c0e5a915 100644 2.18.4 -From 5637fb1b9bfae1c9a1a8705bcff471acc3edf45a Mon Sep 17 00:00:00 2001 +From 2a85c86e975c46f6b2ba843258b507651356dc50 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Mon, 22 Feb 2021 18:50:50 +0000 -Subject: [PATCH 568/580] rpivid: Request maximum hevc clock +Subject: [PATCH 567/661] rpivid: Request maximum hevc clock Query maximum and minimum clock from driver and use those @@ -213140,10 +213092,10 @@ index 3b9e51ca05b3..b377c17dfb21 100644 2.18.4 -From 080cc91768b48ced1dae8dd20c5ba02b535c36ac Mon Sep 17 00:00:00 2001 +From ebadfee1e050a2414c98fd18612eb606f5fad0ae Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 17 Mar 2021 12:34:57 +0000 -Subject: [PATCH 569/580] staging/bcm2835-camera: Add support for DMABUFs +Subject: [PATCH 568/661] staging/bcm2835-camera: Add support for DMABUFs DMABUFs are all handled by videobuf2, so there is no reason not to enable support for them. @@ -213183,10 +213135,10 @@ index e0a96dbb843d..7bee6e1bc69a 100644 2.18.4 -From 4189da4cbfd321f3074b5207ebc8943ba48b89ec Mon Sep 17 00:00:00 2001 +From 9f25e89aaff0dbe6c4a7fb1d3a6880ccbd6146d1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 19 Feb 2021 10:25:01 +0000 -Subject: [PATCH 570/580] staging: fbtft: Add minipitft13 variant +Subject: [PATCH 569/661] staging: fbtft: Add minipitft13 variant The Adafruit Mini-PiTFT13 display needs offsets applying when rotated, so use the "variant" mechanism to select a custom set_addr_win method @@ -213294,10 +213246,10 @@ index 3a280cc1892c..af4e975e7b30 100644 2.18.4 -From 898906bcdbeb6faaa84fdaa49d983c7543c1e024 Mon Sep 17 00:00:00 2001 +From ad7301b48069e5598295ec34f924a8ff88a2fdc1 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 18 Feb 2021 21:05:44 +0000 -Subject: [PATCH 571/580] overlays: Add minipitft13 overlay +Subject: [PATCH 570/661] overlays: Add minipitft13 overlay minipitft13 is an overlay for the Adafruit 1.3" 240x240 display (code 4484). @@ -213403,10 +213355,10 @@ index 000000000000..b1a0a2a41f72 2.18.4 -From eb5442426c334f0f194ddaef6db97428e2a0b068 Mon Sep 17 00:00:00 2001 +From f27ffe8ae362f54f26dc89604b084618870a2534 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 3 Mar 2021 10:31:13 +0000 -Subject: [PATCH 572/580] overlays: ghost-amp: Minor tweaks +Subject: [PATCH 571/661] overlays: ghost-amp: Minor tweaks 1. Reduce the delay between RELAY1 and RELAY2 to 1000ms. 2. Rename the states to simplify LED control by an external script. @@ -213481,10 +213433,10 @@ index 3c997266a67d..f051dfb0879f 100644 2.18.4 -From 4e54f33d64c59e847d22e8306f6ad34d352e6222 Mon Sep 17 00:00:00 2001 +From 96f59c0c646cd0bf69d7db170a7f7c3b8d224410 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 29 Mar 2021 12:05:06 +0100 -Subject: [PATCH 573/580] overlays: Add README entry for minipitft13 +Subject: [PATCH 572/661] overlays: Add README entry for minipitft13 Signed-off-by: Phil Elwell --- @@ -213517,10 +213469,10 @@ index d8a9ba5e9955..a5f1913d0367 100644 2.18.4 -From a273b0bd930e96632188e69ed76ecd9f60cc207d Mon Sep 17 00:00:00 2001 +From b70c58a074a2905f2237a6442ebd9d2b4995b365 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 31 Mar 2021 10:22:30 +0100 -Subject: [PATCH 574/580] ARM: dts: update bcm2711-rpi-cm4.dts and -400 +Subject: [PATCH 573/661] ARM: dts: update bcm2711-rpi-cm4.dts and -400 Neither CM4 nor Pi 400 have appeared upstream yet, and as a result they have missed out on improvements to the Pi 4B platform. @@ -213730,10 +213682,10 @@ index 9a999405ab85..a39e5c216e63 100644 2.18.4 -From 28ce148b5070ef7b5d28bd7b8248304c64779ccd Mon Sep 17 00:00:00 2001 +From 30e1f4364b9dbb0e93ce816f275596a917d3358c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 31 Mar 2021 10:33:35 +0100 -Subject: [PATCH 575/580] Revert "usb: xhci: Disable the XHCI 5 second timeout" +Subject: [PATCH 574/661] Revert "usb: xhci: Disable the XHCI 5 second timeout" This reverts commit 0b387d58aacc006b3cb24415c7c62baa99edf743. --- @@ -213759,10 +213711,10 @@ index 2c31bfbf6b93..10547411cb44 100644 2.18.4 -From 8fa82565c0ffb3c974374b2a5a48307b659acadd Mon Sep 17 00:00:00 2001 +From 4ef0071521281eddce5551f4b35dbf8c3f97caa3 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 31 Mar 2021 18:12:55 +0100 -Subject: [PATCH 576/580] vc4/drm: SQUASH: Fix source offsets with +Subject: [PATCH 575/661] vc4/drm: SQUASH: Fix source offsets with DRM_FORMAT_P030 x_off should only be within current stripe @@ -213795,10 +213747,10 @@ index 5a268ac6d6fc..dc3581470261 100644 2.18.4 -From 9e6f8574ff7c5284f4fed79c860c14ce40612fb9 Mon Sep 17 00:00:00 2001 +From f6db9bd40a2911a53bfff659f50b10c2e022e875 Mon Sep 17 00:00:00 2001 From: Jo Henke <37883863+jo-he@users.noreply.github.com> Date: Tue, 6 Apr 2021 11:21:35 +0000 -Subject: [PATCH 577/580] dwc-otg: fix clang -Wignored-attributes warning +Subject: [PATCH 576/661] dwc-otg: fix clang -Wignored-attributes warning warning: attribute declaration must precede definition --- @@ -213837,10 +213789,10 @@ index 537cc237b4bc..86b4aaf977fb 100644 2.18.4 -From 41f1e1fa9bd31dea4c8f5dcb0c52a8dffd2b8e4d Mon Sep 17 00:00:00 2001 +From 40c5a3e0a12b550a4e838b2f463c0a7166589180 Mon Sep 17 00:00:00 2001 From: Jo Henke <37883863+jo-he@users.noreply.github.com> Date: Tue, 6 Apr 2021 11:38:28 +0000 -Subject: [PATCH 578/580] dwc-otg: fix clang -Wsometimes-uninitialized warning +Subject: [PATCH 577/661] dwc-otg: fix clang -Wsometimes-uninitialized warning warning: variable 'retval' is used uninitialized whenever 'if' condition is false --- @@ -213864,10 +213816,10 @@ index 799ab14b9eda..e1c1e3804095 100644 2.18.4 -From d7c44a103c95eeaf9d15b7e4afc73c88bf96ceca Mon Sep 17 00:00:00 2001 +From c5e12cce06358442f17e7c894667ae4f210bb212 Mon Sep 17 00:00:00 2001 From: Jo Henke <37883863+jo-he@users.noreply.github.com> Date: Tue, 6 Apr 2021 11:45:14 +0000 -Subject: [PATCH 579/580] dwc-otg: fix clang -Wpointer-bool-conversion warning +Subject: [PATCH 578/661] dwc-otg: fix clang -Wpointer-bool-conversion warning warning: address of array 'desc->wMaxPacketSize' will always evaluate to 'true' @@ -213894,10 +213846,10 @@ index 9dabbe5c9791..2ffd4f11d0bf 100644 2.18.4 -From 6239b96f5242aacc9adfa73eec63f40bdabe2066 Mon Sep 17 00:00:00 2001 +From 506c5b48d86fc4d4d78f68443102926adc32984e Mon Sep 17 00:00:00 2001 From: paul-1 <6473457+paul-1@users.noreply.github.com> Date: Fri, 2 Apr 2021 10:56:19 -0400 -Subject: [PATCH 580/580] Update Allo Piano Dac Driver +Subject: [PATCH 579/661] Update Allo Piano Dac Driver Add unique names to the individual dac coded drivers Remove some of the codec controls that are not used. @@ -214176,3 +214128,10512 @@ index 0e04c4739858..fd0fe58421b0 100644 -- 2.18.4 + +From 783f812165a241570d2a95a0aaa5096fe6487175 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Mon, 29 Mar 2021 20:10:49 +0000 +Subject: [PATCH 580/661] sc16is7xx: Defer probe if device read fails + +Commit 158e800e0fde upstream + +A test was added to the probe function to ensure the device was +actually connected and working before successfully completing a +probe. If the device was actually there, but the I2C bus was not +ready yet for whatever reason, the probe fails permanently. + +Change the probe so that we defer the probe on a regmap read +failure so that we try the probe again when the dependent drivers +are potentially loaded. This should not affect the case where the +device truly isn't present because the probe will never successfully +complete. + +Fixes: 2aa916e67db3 ("sc16is7xx: Read the LSR register for basic device presence check") +Cc: stable@vger.kernel.org +Signed-off-by: Annaliese McDermond +Link: https://lore.kernel.org/r/010101787f9c3fd8-c1815c00-2d6b-4c85-a96a-a13e68597fda-000000@us-west-2.amazonses.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/sc16is7xx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c +index f6ce041d0c3d..8e3b83fac33c 100644 +--- a/drivers/tty/serial/sc16is7xx.c ++++ b/drivers/tty/serial/sc16is7xx.c +@@ -1204,7 +1204,7 @@ static int sc16is7xx_probe(struct device *dev, + ret = regmap_read(regmap, + SC16IS7XX_LSR_REG << SC16IS7XX_REG_SHIFT, &val); + if (ret < 0) +- return ret; ++ return -EPROBE_DEFER; + + /* Alloc port structure */ + s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); +-- +2.18.4 + + +From 553f10560a8ef296c0fa28cd3a76dfdb9adc781f Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 31 Mar 2021 18:21:38 +0000 +Subject: [PATCH 581/661] ASoC: tlv320aic32x4: Register clocks before + registering component + +Commit 1ca1156cfd69 upstream + +Clock registration must be performed before the component is +registered. aic32x4_component_probe attempts to get all the +clocks right off the bat. If the component is registered before +the clocks there is a race condition where the clocks may not +be registered by the time aic32x4_componet_probe actually runs. + +Fixes: d1c859d314d8 ("ASoC: codec: tlv3204: Increased maximum supported channels") +Cc: stable@vger.kernel.org +Signed-off-by: Annaliese McDermond +Link: https://lore.kernel.org/r/0101017889850206-dcac4cce-8cc8-4a21-80e9-4e4bef44b981-000000@us-west-2.amazonses.com +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c +index 9e3de9ded0ef..e0dbedb88e50 100644 +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -1243,6 +1243,10 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) + if (ret) + goto err_disable_regulators; + ++ ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); ++ if (ret) ++ goto err_disable_regulators; ++ + ret = devm_snd_soc_register_component(dev, + &soc_component_dev_aic32x4, &aic32x4_dai, 1); + if (ret) { +@@ -1250,10 +1254,6 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) + goto err_disable_regulators; + } + +- ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); +- if (ret) +- goto err_disable_regulators; +- + return 0; + + err_disable_regulators: +-- +2.18.4 + + +From 80f0992f37f83bd63365e0c185526541e03fb81f Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 31 Mar 2021 18:21:45 +0000 +Subject: [PATCH 582/661] ASoC: tlv320aic32x4: Increase maximum register in + regmap + +Commit 29654ed8384e upstream + +AIC32X4_REFPOWERUP was added as a register, but the maximum register value +in the regmap and regmap range was not correspondingly increased. This +caused an error when this register was attempted to be written. + +Fixes: ec96690de82c ("ASoC: tlv320aic32x4: Enable fast charge") +Cc: stable@vger.kernel.org +Signed-off-by: Annaliese McDermond +Link: https://lore.kernel.org/r/0101017889851cab-ce60cfdb-d88c-43d8-bbd2-7fbf34a0c912-000000@us-west-2.amazonses.com +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c +index e0dbedb88e50..b8950758471f 100644 +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -577,12 +577,12 @@ static const struct regmap_range_cfg aic32x4_regmap_pages[] = { + .window_start = 0, + .window_len = 128, + .range_min = 0, +- .range_max = AIC32X4_RMICPGAVOL, ++ .range_max = AIC32X4_REFPOWERUP, + }, + }; + + const struct regmap_config aic32x4_regmap_config = { +- .max_register = AIC32X4_RMICPGAVOL, ++ .max_register = AIC32X4_REFPOWERUP, + .ranges = aic32x4_regmap_pages, + .num_ranges = ARRAY_SIZE(aic32x4_regmap_pages), + }; +-- +2.18.4 + + +From d53467901217bb3488ba14d25c5f8cc9638ba9eb Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Fri, 19 Mar 2021 11:21:41 +0100 +Subject: [PATCH 583/661] drm/connector: Create a helper to attach the + hdr_output_metadata property + +All the drivers that implement HDR output call pretty much the same +function to initialise the hdr_output_metadata property, and while the +creation of that property is in a helper, every driver uses the same +code to attach it. + +Provide a helper for it as well + +Signed-off-by: Maxime Ripard +--- + .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 +-- + drivers/gpu/drm/drm_connector.c | 21 +++++++++++++++++++ + drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +-- + include/drm/drm_connector.h | 1 + + 5 files changed, 25 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 3562dac4b55f..fbff8c72f711 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -6481,9 +6481,7 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm, + if (connector_type == DRM_MODE_CONNECTOR_HDMIA || + connector_type == DRM_MODE_CONNECTOR_DisplayPort || + connector_type == DRM_MODE_CONNECTOR_eDP) { +- drm_object_attach_property( +- &aconnector->base.base, +- dm->ddev->mode_config.hdr_output_metadata_property, 0); ++ drm_connector_attach_hdr_output_metadata_property(&aconnector->base); + + if (!aconnector->mst_port) + drm_connector_attach_vrr_capable_property(&aconnector->base); +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 0c79a9ba48bb..dbcb41f6edc8 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2492,8 +2492,7 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) + drm_connector_attach_max_bpc_property(connector, 8, 16); + + if (hdmi->version >= 0x200a && hdmi->plat_data->use_drm_infoframe) +- drm_object_attach_property(&connector->base, +- connector->dev->mode_config.hdr_output_metadata_property, 0); ++ drm_connector_attach_hdr_output_metadata_property(connector); + + drm_connector_attach_encoder(connector, hdmi->bridge.encoder); + +diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c +index 717c4e7271b0..ef162afb32a9 100644 +--- a/drivers/gpu/drm/drm_connector.c ++++ b/drivers/gpu/drm/drm_connector.c +@@ -2143,6 +2143,27 @@ int drm_connector_attach_max_bpc_property(struct drm_connector *connector, + } + EXPORT_SYMBOL(drm_connector_attach_max_bpc_property); + ++/** ++ * drm_connector_attach_hdr_output_metadata_property - attach "HDR_OUTPUT_METADA" property ++ * @connector: connector to attach the property on. ++ * ++ * This is used to allow the userspace to send HDR Metadata to the ++ * driver. ++ * ++ * Returns: ++ * Zero on success, negative errno on failure. ++ */ ++int drm_connector_attach_hdr_output_metadata_property(struct drm_connector *connector) ++{ ++ struct drm_device *dev = connector->dev; ++ struct drm_property *prop = dev->mode_config.hdr_output_metadata_property; ++ ++ drm_object_attach_property(&connector->base, prop, 0); ++ ++ return 0; ++} ++EXPORT_SYMBOL(drm_connector_attach_hdr_output_metadata_property); ++ + /** + * drm_connector_set_vrr_capable_property - sets the variable refresh rate + * capable property for a connector +diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c +index 1d616da4f165..bf4da68260b9 100644 +--- a/drivers/gpu/drm/i915/display/intel_hdmi.c ++++ b/drivers/gpu/drm/i915/display/intel_hdmi.c +@@ -2971,8 +2971,7 @@ intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *c + drm_connector_attach_content_type_property(connector); + + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) +- drm_object_attach_property(&connector->base, +- connector->dev->mode_config.hdr_output_metadata_property, 0); ++ drm_connector_attach_hdr_output_metadata_property(connector); + + if (!HAS_GMCH(dev_priv)) + drm_connector_attach_max_bpc_property(connector, 8, 12); +diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h +index 928136556174..7954234b7fdc 100644 +--- a/include/drm/drm_connector.h ++++ b/include/drm/drm_connector.h +@@ -1622,6 +1622,7 @@ int drm_connector_attach_scaling_mode_property(struct drm_connector *connector, + u32 scaling_mode_mask); + int drm_connector_attach_vrr_capable_property( + struct drm_connector *connector); ++int drm_connector_attach_hdr_output_metadata_property(struct drm_connector *connector); + int drm_mode_create_aspect_ratio_property(struct drm_device *dev); + int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connector); + int drm_mode_create_dp_colorspace_property(struct drm_connector *connector); +-- +2.18.4 + + +From 6eb74ee6f09628f4f1ff3579fd8c65ac8413cdd8 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Fri, 19 Mar 2021 13:05:53 +0100 +Subject: [PATCH 584/661] drm/connector: Add helper to compare HDR metadata + +All the drivers that support the HDR metadata property have a similar +function to compare the metadata from one connector state to the next, +and force a mode change if they differ. + +All these functions run pretty much the same code, so let's turn it into +an helper that can be shared across those drivers. + +Signed-off-by: Maxime Ripard +--- + .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +------------- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 17 +---------- + drivers/gpu/drm/drm_connector.c | 28 +++++++++++++++++++ + drivers/gpu/drm/i915/display/intel_atomic.c | 13 +-------- + include/drm/drm_connector.h | 2 ++ + 5 files changed, 33 insertions(+), 48 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index fbff8c72f711..9b749fa827a4 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -5429,25 +5429,6 @@ static int fill_hdr_info_packet(const struct drm_connector_state *state, + return 0; + } + +-static bool +-is_hdr_metadata_different(const struct drm_connector_state *old_state, +- const struct drm_connector_state *new_state) +-{ +- struct drm_property_blob *old_blob = old_state->hdr_output_metadata; +- struct drm_property_blob *new_blob = new_state->hdr_output_metadata; +- +- if (old_blob != new_blob) { +- if (old_blob && new_blob && +- old_blob->length == new_blob->length) +- return memcmp(old_blob->data, new_blob->data, +- old_blob->length); +- +- return true; +- } +- +- return false; +-} +- + static int + amdgpu_dm_connector_atomic_check(struct drm_connector *conn, + struct drm_atomic_state *state) +@@ -5463,7 +5444,7 @@ amdgpu_dm_connector_atomic_check(struct drm_connector *conn, + if (!crtc) + return 0; + +- if (is_hdr_metadata_different(old_con_state, new_con_state)) { ++ if (!drm_connector_atomic_hdr_metadata_equal(old_con_state, new_con_state)) { + struct dc_info_packet hdr_infopacket; + + ret = fill_hdr_info_packet(new_con_state, &hdr_infopacket); +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index dbcb41f6edc8..4c4fb4b52b7d 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2395,21 +2395,6 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector) + return ret; + } + +-static bool hdr_metadata_equal(const struct drm_connector_state *old_state, +- const struct drm_connector_state *new_state) +-{ +- struct drm_property_blob *old_blob = old_state->hdr_output_metadata; +- struct drm_property_blob *new_blob = new_state->hdr_output_metadata; +- +- if (!old_blob || !new_blob) +- return old_blob == new_blob; +- +- if (old_blob->length != new_blob->length) +- return false; +- +- return !memcmp(old_blob->data, new_blob->data, old_blob->length); +-} +- + static int dw_hdmi_connector_atomic_check(struct drm_connector *connector, + struct drm_atomic_state *state) + { +@@ -2423,7 +2408,7 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector, + if (!crtc) + return 0; + +- if (!hdr_metadata_equal(old_state, new_state)) { ++ if (!drm_connector_atomic_hdr_metadata_equal(old_state, new_state)) { + crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); +diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c +index ef162afb32a9..d631f0a52ee7 100644 +--- a/drivers/gpu/drm/drm_connector.c ++++ b/drivers/gpu/drm/drm_connector.c +@@ -2164,6 +2164,34 @@ int drm_connector_attach_hdr_output_metadata_property(struct drm_connector *conn + } + EXPORT_SYMBOL(drm_connector_attach_hdr_output_metadata_property); + ++/** ++ * drm_connector_atomic_hdr_metadata_equal - checks if the hdr metadata changed ++ * @old_state: old connector state to compare ++ * @new_state: new connector state to compare ++ * ++ * This is used by HDR-enabled drivers to test whether the HDR metadata ++ * have changed between two different connector state (and thus probably ++ * requires a full blown mode change). ++ * ++ * Returns: ++ * True if the metadata are equal, False otherwise ++ */ ++bool drm_connector_atomic_hdr_metadata_equal(struct drm_connector_state *old_state, ++ struct drm_connector_state *new_state) ++{ ++ struct drm_property_blob *old_blob = old_state->hdr_output_metadata; ++ struct drm_property_blob *new_blob = new_state->hdr_output_metadata; ++ ++ if (!old_blob || !new_blob) ++ return old_blob == new_blob; ++ ++ if (old_blob->length != new_blob->length) ++ return false; ++ ++ return !memcmp(old_blob->data, new_blob->data, old_blob->length); ++} ++EXPORT_SYMBOL(drm_connector_atomic_hdr_metadata_equal); ++ + /** + * drm_connector_set_vrr_capable_property - sets the variable refresh rate + * capable property for a connector +diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c +index 86be032bcf96..b18417a393af 100644 +--- a/drivers/gpu/drm/i915/display/intel_atomic.c ++++ b/drivers/gpu/drm/i915/display/intel_atomic.c +@@ -109,16 +109,6 @@ int intel_digital_connector_atomic_set_property(struct drm_connector *connector, + return -EINVAL; + } + +-static bool blob_equal(const struct drm_property_blob *a, +- const struct drm_property_blob *b) +-{ +- if (a && b) +- return a->length == b->length && +- !memcmp(a->data, b->data, a->length); +- +- return !a == !b; +-} +- + int intel_digital_connector_atomic_check(struct drm_connector *conn, + struct drm_atomic_state *state) + { +@@ -150,8 +140,7 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn, + new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio || + new_conn_state->base.content_type != old_conn_state->base.content_type || + new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode || +- !blob_equal(new_conn_state->base.hdr_output_metadata, +- old_conn_state->base.hdr_output_metadata)) ++ !drm_connector_atomic_hdr_metadata_equal(old_state, new_state)) + crtc_state->mode_changed = true; + + return 0; +diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h +index 7954234b7fdc..ca94c7ae20eb 100644 +--- a/include/drm/drm_connector.h ++++ b/include/drm/drm_connector.h +@@ -1623,6 +1623,8 @@ int drm_connector_attach_scaling_mode_property(struct drm_connector *connector, + int drm_connector_attach_vrr_capable_property( + struct drm_connector *connector); + int drm_connector_attach_hdr_output_metadata_property(struct drm_connector *connector); ++bool drm_connector_atomic_hdr_metadata_equal(struct drm_connector_state *old_state, ++ struct drm_connector_state *new_state); + int drm_mode_create_aspect_ratio_property(struct drm_device *dev); + int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connector); + int drm_mode_create_dp_colorspace_property(struct drm_connector *connector); +-- +2.18.4 + + +From 459562d418e7caee7eb0d9e2033fd5a304ce11f4 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Fri, 9 Apr 2021 17:31:55 +0200 +Subject: [PATCH 585/661] drm/vc4: Use the new helpers + +We just introduced new helpers, so let's use them. + +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 23 ++++------------------- + 1 file changed, 4 insertions(+), 19 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index f9eb6a557a4d..507eff98cc36 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -527,21 +527,6 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) + return ret; + } + +-static bool hdr_metadata_equal(const struct drm_connector_state *old_state, +- const struct drm_connector_state *new_state) +-{ +- struct drm_property_blob *old_blob = old_state->hdr_output_metadata; +- struct drm_property_blob *new_blob = new_state->hdr_output_metadata; +- +- if (!old_blob || !new_blob) +- return old_blob == new_blob; +- +- if (old_blob->length != new_blob->length) +- return false; +- +- return !memcmp(old_blob->data, new_blob->data, old_blob->length); +-} +- + static int vc4_hdmi_connector_atomic_check(struct drm_connector *connector, + struct drm_atomic_state *state) + { +@@ -550,12 +535,13 @@ static int vc4_hdmi_connector_atomic_check(struct drm_connector *connector, + struct drm_connector_state *new_state = + drm_atomic_get_new_connector_state(state, connector); + struct drm_crtc *crtc = new_state->crtc; +- struct drm_crtc_state *crtc_state; + + if (!crtc) + return 0; + +- if (!hdr_metadata_equal(old_state, new_state)) { ++ if (!drm_connector_atomic_hdr_metadata_equal(old_state, new_state)) { ++ struct drm_crtc_state *crtc_state; ++ + crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); +@@ -654,8 +640,7 @@ static int vc4_hdmi_connector_init(struct drm_device *dev, + connector->stereo_allowed = 1; + + if (vc4_hdmi->variant->supports_hdr) +- drm_object_attach_property(&connector->base, +- connector->dev->mode_config.hdr_output_metadata_property, 0); ++ drm_connector_attach_hdr_output_metadata_property(connector); + + drm_connector_attach_encoder(connector, encoder); + +-- +2.18.4 + + +From f1b59f735159a1dbf11731bda07de51725cbd31e Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Fri, 9 Apr 2021 17:07:32 +0200 +Subject: [PATCH 586/661] drm/connector: Add a helper to attach the colorspace + property + +The intel driver uses the same logic to attach the Colorspace property +in multiple places and we'll need it in vc4 too. Let's move that common +code in a helper. + +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/drm_connector.c | 20 +++++++++++++++++++ + .../gpu/drm/i915/display/intel_connector.c | 3 +-- + include/drm/drm_connector.h | 1 + + 3 files changed, 22 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c +index d631f0a52ee7..cdb2dd2b765a 100644 +--- a/drivers/gpu/drm/drm_connector.c ++++ b/drivers/gpu/drm/drm_connector.c +@@ -2164,6 +2164,26 @@ int drm_connector_attach_hdr_output_metadata_property(struct drm_connector *conn + } + EXPORT_SYMBOL(drm_connector_attach_hdr_output_metadata_property); + ++/** ++ * drm_connector_attach_colorspace_property - attach "Colorspace" property ++ * @connector: connector to attach the property on. ++ * ++ * This is used to allow the userspace to signal the output colorspace ++ * to the driver. ++ * ++ * Returns: ++ * Zero on success, negative errno on failure. ++ */ ++int drm_connector_attach_colorspace_property(struct drm_connector *connector) ++{ ++ struct drm_property *prop = connector->colorspace_property; ++ ++ drm_object_attach_property(&connector->base, prop, DRM_MODE_COLORIMETRY_DEFAULT); ++ ++ return 0; ++} ++EXPORT_SYMBOL(drm_connector_attach_colorspace_property); ++ + /** + * drm_connector_atomic_hdr_metadata_equal - checks if the hdr metadata changed + * @old_state: old connector state to compare +diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c +index 406e96785c76..d1f8c7f3d197 100644 +--- a/drivers/gpu/drm/i915/display/intel_connector.c ++++ b/drivers/gpu/drm/i915/display/intel_connector.c +@@ -297,6 +297,5 @@ intel_attach_colorspace_property(struct drm_connector *connector) + return; + } + +- drm_object_attach_property(&connector->base, +- connector->colorspace_property, 0); ++ drm_connector_attach_colorspace_property(connector); + } +diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h +index ca94c7ae20eb..42cbacd1acb5 100644 +--- a/include/drm/drm_connector.h ++++ b/include/drm/drm_connector.h +@@ -1622,6 +1622,7 @@ int drm_connector_attach_scaling_mode_property(struct drm_connector *connector, + u32 scaling_mode_mask); + int drm_connector_attach_vrr_capable_property( + struct drm_connector *connector); ++int drm_connector_attach_colorspace_property(struct drm_connector *connector); + int drm_connector_attach_hdr_output_metadata_property(struct drm_connector *connector); + bool drm_connector_atomic_hdr_metadata_equal(struct drm_connector_state *old_state, + struct drm_connector_state *new_state); +-- +2.18.4 + + +From 5da766565b18acd6a497a87ebc52035b1fdfa37e Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Fri, 9 Apr 2021 17:16:42 +0200 +Subject: [PATCH 587/661] drm/vc4: hdmi: Signal the proper colorimetry info in + the infoframe + +Our driver while supporting HDR didn't send the proper colorimetry info +in the AVI infoframe. + +Let's add the property needed so that the userspace can let us know what +the colorspace is supposed to be. + +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 507eff98cc36..2816a1d3ee24 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -539,7 +539,8 @@ static int vc4_hdmi_connector_atomic_check(struct drm_connector *connector, + if (!crtc) + return 0; + +- if (!drm_connector_atomic_hdr_metadata_equal(old_state, new_state)) { ++ if (old_state->colorspace != new_state->colorspace || ++ !drm_connector_atomic_hdr_metadata_equal(old_state, new_state)) { + struct drm_crtc_state *crtc_state; + + crtc_state = drm_atomic_get_crtc_state(state, crtc); +@@ -629,6 +630,11 @@ static int vc4_hdmi_connector_init(struct drm_device *dev, + if (ret) + return ret; + ++ ret = drm_mode_create_hdmi_colorspace_property(connector); ++ if (ret) ++ return ret; ++ ++ drm_connector_attach_colorspace_property(connector); + drm_connector_attach_tv_margin_properties(connector); + drm_connector_attach_max_bpc_property(connector, 8, 12); + +@@ -743,7 +749,7 @@ static void vc4_hdmi_set_avi_infoframe(struct drm_encoder *encoder) + vc4_encoder->limited_rgb_range ? + HDMI_QUANTIZATION_RANGE_LIMITED : + HDMI_QUANTIZATION_RANGE_FULL); +- ++ drm_hdmi_avi_infoframe_colorspace(&frame.avi, cstate); + drm_hdmi_avi_infoframe_bars(&frame.avi, cstate); + + vc4_hdmi_write_infoframe(encoder, &frame); +-- +2.18.4 + + +From 168710248c100701c50f735677d6dc7f26ade400 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 4 Nov 2020 18:54:20 +0000 +Subject: [PATCH 588/661] staging: vcsm-cma: Fix memory leak from not detaching + dmabuf + +When importing there was a missing call to detach the buffer, +so each import leaked the sg table entry. + +Actually the release process for both locally allocated and +imported buffers is identical, so fix them to both use the same +function. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 22 ++----------------- + 1 file changed, 2 insertions(+), 20 deletions(-) + +diff --git a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +index 40ce67f06fac..88c4df822922 100644 +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -237,6 +237,7 @@ static void vc_sm_add_resource(struct vc_sm_privdata_t *privdata, + + /* + * Cleans up imported dmabuf. ++ * Should be called with mutex held. + */ + static void vc_sm_clean_up_dmabuf(struct vc_sm_buffer *buffer) + { +@@ -244,7 +245,6 @@ static void vc_sm_clean_up_dmabuf(struct vc_sm_buffer *buffer) + return; + + /* Handle cleaning up imported dmabufs */ +- mutex_lock(&buffer->lock); + if (buffer->import.sgt) { + dma_buf_unmap_attachment(buffer->import.attach, + buffer->import.sgt, +@@ -255,7 +255,6 @@ static void vc_sm_clean_up_dmabuf(struct vc_sm_buffer *buffer) + dma_buf_detach(buffer->dma_buf, buffer->import.attach); + buffer->import.attach = NULL; + } +- mutex_unlock(&buffer->lock); + } + + /* +@@ -672,23 +671,6 @@ int vc_sm_import_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) + return buf->import.dma_buf->ops->mmap(buf->import.dma_buf, vma); + } + +-static +-void vc_sm_import_dma_buf_release(struct dma_buf *dmabuf) +-{ +- struct vc_sm_buffer *buf = dmabuf->priv; +- +- pr_debug("%s: Relasing dma_buf %p\n", __func__, dmabuf); +- mutex_lock(&buf->lock); +- if (!buf->imported) +- return; +- +- buf->in_use = 0; +- +- vc_sm_vpu_free(buf); +- +- vc_sm_release_resource(buf); +-} +- + static + int vc_sm_import_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) +@@ -717,7 +699,7 @@ static const struct dma_buf_ops dma_buf_import_ops = { + .map_dma_buf = vc_sm_import_map_dma_buf, + .unmap_dma_buf = vc_sm_import_unmap_dma_buf, + .mmap = vc_sm_import_dmabuf_mmap, +- .release = vc_sm_import_dma_buf_release, ++ .release = vc_sm_dma_buf_release, + .attach = vc_sm_import_dma_buf_attach, + .detach = vc_sm_import_dma_buf_detatch, + .begin_cpu_access = vc_sm_import_dma_buf_begin_cpu_access, +-- +2.18.4 + + +From a8a620f15d93e025e36c52e895974932ab13e113 Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Mon, 12 Apr 2021 17:27:43 +0100 +Subject: [PATCH 589/661] vc4/kms: vc4_plane: Support 2020 colourspace for yuv + planes + +https://gist.github.com/popcornmix/6b3e23103c60170b02b148e0ba5d6ed7 + +is the script used to generate the 601, 709 and 2020 colourspaces. +I've regenetated the existing ones using script so it is reprocable +but there are lsb dfferences compared to values here (copied from spec) +whose origin is now lost. + +Signed-off-by: Dom Cobley +--- + drivers/gpu/drm/vc4/vc4_plane.c | 19 ++++++++++--------- + drivers/gpu/drm/vc4/vc4_regs.h | 18 ++++++++++++------ + 2 files changed, 22 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c +index dc3581470261..26ea1f9dd7b3 100644 +--- a/drivers/gpu/drm/vc4/vc4_plane.c ++++ b/drivers/gpu/drm/vc4/vc4_plane.c +@@ -644,10 +644,10 @@ static const u32 colorspace_coeffs[2][DRM_COLOR_ENCODING_MAX][3] = { + SCALER_CSC1_ITR_R_709_3, + SCALER_CSC2_ITR_R_709_3, + }, { +- /* BT2020. Not supported yet - copy 601 */ +- SCALER_CSC0_ITR_R_601_5, +- SCALER_CSC1_ITR_R_601_5, +- SCALER_CSC2_ITR_R_601_5, ++ /* BT2020 */ ++ SCALER_CSC0_ITR_R_2020, ++ SCALER_CSC1_ITR_R_2020, ++ SCALER_CSC2_ITR_R_2020, + } + }, { + /* Full range */ +@@ -662,10 +662,10 @@ static const u32 colorspace_coeffs[2][DRM_COLOR_ENCODING_MAX][3] = { + SCALER_CSC1_ITR_R_709_3_FR, + SCALER_CSC2_ITR_R_709_3_FR, + }, { +- /* BT2020. Not supported yet - copy JFIF */ +- SCALER_CSC0_JPEG_JFIF, +- SCALER_CSC1_JPEG_JFIF, +- SCALER_CSC2_JPEG_JFIF, ++ /* BT2020 */ ++ SCALER_CSC0_ITR_R_2020_FR, ++ SCALER_CSC1_ITR_R_2020_FR, ++ SCALER_CSC2_ITR_R_2020_FR, + } + } + }; +@@ -1487,7 +1487,8 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, + + drm_plane_create_color_properties(plane, + BIT(DRM_COLOR_YCBCR_BT601) | +- BIT(DRM_COLOR_YCBCR_BT709), ++ BIT(DRM_COLOR_YCBCR_BT709) | ++ BIT(DRM_COLOR_YCBCR_BT2020), + BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | + BIT(DRM_COLOR_YCBCR_FULL_RANGE), + DRM_COLOR_YCBCR_BT709, +diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h +index 78fd28599aeb..7538b84a6dca 100644 +--- a/drivers/gpu/drm/vc4/vc4_regs.h ++++ b/drivers/gpu/drm/vc4/vc4_regs.h +@@ -975,8 +975,10 @@ enum hvs_pixel_format { + #define SCALER_CSC0_COEF_CR_OFS_SHIFT 0 + #define SCALER_CSC0_ITR_R_601_5 0x00f00000 + #define SCALER_CSC0_ITR_R_709_3 0x00f00000 ++#define SCALER_CSC0_ITR_R_2020 0x00f00000 + #define SCALER_CSC0_JPEG_JFIF 0x00000000 + #define SCALER_CSC0_ITR_R_709_3_FR 0x00000000 ++#define SCALER_CSC0_ITR_R_2020_FR 0x00000000 + + /* S2.8 contribution of Cb to Green */ + #define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22) +@@ -991,9 +993,11 @@ enum hvs_pixel_format { + #define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0) + #define SCALER_CSC1_COEF_CR_BLU_SHIFT 0 + #define SCALER_CSC1_ITR_R_601_5 0xe73304a8 +-#define SCALER_CSC1_ITR_R_709_3 0xf2b784a8 +-#define SCALER_CSC1_JPEG_JFIF 0xea34a400 +-#define SCALER_CSC1_ITR_R_709_3_FR 0xe23d0400 ++#define SCALER_CSC1_ITR_R_709_3 0xf27784a8 ++#define SCALER_CSC1_ITR_R_2020 0xf43594a8 ++#define SCALER_CSC1_JPEG_JFIF 0xea349400 ++#define SCALER_CSC1_ITR_R_709_3_FR 0xf4388400 ++#define SCALER_CSC1_ITR_R_2020_FR 0xf5b6d400 + + /* S2.8 contribution of Cb to Red */ + #define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20) +@@ -1004,10 +1008,12 @@ enum hvs_pixel_format { + /* S2.8 contribution of Cb to Blue */ + #define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10) + #define SCALER_CSC2_COEF_CB_BLU_SHIFT 10 +-#define SCALER_CSC2_ITR_R_601_5 0x00066204 +-#define SCALER_CSC2_ITR_R_709_3 0x00072a1c +-#define SCALER_CSC2_JPEG_JFIF 0x000599c5 ++#define SCALER_CSC2_ITR_R_601_5 0x00066604 ++#define SCALER_CSC2_ITR_R_709_3 0x00072e1d ++#define SCALER_CSC2_ITR_R_2020 0x0006b624 ++#define SCALER_CSC2_JPEG_JFIF 0x00059dc6 + #define SCALER_CSC2_ITR_R_709_3_FR 0x00064ddb ++#define SCALER_CSC2_ITR_R_2020_FR 0x0005e5e2 + + #define SCALER_TPZ0_VERT_RECALC BIT(31) + #define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8) +-- +2.18.4 + + +From c75e6aa78c1074422448a75ee80d8d9baee849f3 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Thu, 15 Apr 2021 13:15:14 +0100 +Subject: [PATCH 590/661] sound/usb: add device quirks for A4Tech FHD 1080p + webcams + +These devices use a type of Sonix chipset that produces broken microphone +data if suspended/resumed. + +They also don't support readback of the sample rate. + +Signed-off-by: Jonathan Bell +--- + sound/usb/quirks-table.h | 9 +++++++++ + sound/usb/quirks.c | 1 + + 2 files changed, 10 insertions(+) + +diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h +index 3c1697f6b60c..02dbbda0b1e8 100644 +--- a/sound/usb/quirks-table.h ++++ b/sound/usb/quirks-table.h +@@ -46,6 +46,15 @@ + } + }, + ++{ ++ /* A4Tech FHD 1080p webcam */ ++ USB_DEVICE(0x09da, 0x2695), ++ .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { ++ .ifnum = QUIRK_ANY_INTERFACE, ++ .type = QUIRK_SETUP_DISABLE_AUTOSUSPEND ++ } ++}, ++ + { + /* Creative BT-D1 */ + USB_DEVICE(0x041e, 0x0005), +diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c +index 5ab2a4580bfb..065ef7c6e67c 100644 +--- a/sound/usb/quirks.c ++++ b/sound/usb/quirks.c +@@ -1522,6 +1522,7 @@ bool snd_usb_get_sample_rate_quirk(struct snd_usb_audio *chip) + case USB_ID(0x2912, 0x30c8): /* Audioengine D1 */ + case USB_ID(0x413c, 0xa506): /* Dell AE515 sound bar */ + case USB_ID(0x046d, 0x084c): /* Logitech ConferenceCam Connect */ ++ case USB_ID(0x09da, 0x2695): /* A4Tech FHD 1080p webcam */ + return true; + } + +-- +2.18.4 + + +From 2e8d2b97a2d50b46af43f7d65745976544d7a551 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Fri, 16 Apr 2021 11:40:23 +0100 +Subject: [PATCH 591/661] sound/usb: call usb_autopm_get_interface() for + devices that should not be suspended + +Webcams with microphones are composite devices, and autosuspend is set +at the device level. If uvcvideo is probed after snd-usb-audio, the effect +of the quirk applied by snd-usb-audio is undone by uvcvideo's global +application of autosuspend. + +Incrementing the interface's PM refcount in such cases prevents runtime PM +from happening, thus the device is left active. + +Signed-off-by: Jonathan Bell +--- + sound/usb/quirks.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c +index 065ef7c6e67c..3f9ecc709705 100644 +--- a/sound/usb/quirks.c ++++ b/sound/usb/quirks.c +@@ -523,6 +523,11 @@ static int setup_disable_autosuspend(struct snd_usb_audio *chip, + struct usb_driver *driver, + const struct snd_usb_audio_quirk *quirk) + { ++ /* ++ * Grab the interface, because on a webcam uvcvideo may race ++ * with snd-usb-audio during probe and re-enable autosuspend. ++ */ ++ usb_autopm_get_interface(iface); + usb_disable_autosuspend(interface_to_usbdev(iface)); + return 1; /* Continue with creating streams and mixer */ + } +-- +2.18.4 + + +From 4bb70d7cd49cb96fa1daefa7e1ebe71ccb089326 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 16 Apr 2021 09:31:17 +0100 +Subject: [PATCH 592/661] overlays: ghost-amp: Add DAC mute control + +Signed-off-by: Phil Elwell +--- + .../boot/dts/overlays/ghost-amp-overlay.dts | 28 +++++++++++-------- + 1 file changed, 17 insertions(+), 11 deletions(-) + +diff --git a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts +index f051dfb0879f..dbedb4b76c74 100644 +--- a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts +@@ -4,10 +4,11 @@ + + #include + +-#define ENABLE GF_SW(0) +-#define FAULT GF_IP(0) // GPIO5 +-#define RELAY1 GF_OP(0) // GPIO22 +-#define RELAY2 GF_OP(1) // GPIO23 ++#define ENABLE GF_SW(0) ++#define FAULT GF_IP(0) // GPIO5 ++#define RELAY1 GF_OP(0) // GPIO22 ++#define RELAY2 GF_OP(1) // GPIO23 ++#define RELAYSSR GF_OP(2) // GPIO24 + + / { + compatible = "brcm,bcm2835"; +@@ -64,14 +65,16 @@ + gpio-line-names = "enable"; + input-gpios = <&gpio 5 1>; // FAULT (active low) + output-gpios = <&gpio 22 0>, // RELAY1 +- <&gpio 23 0>; // RELAY2 ++ <&gpio 23 0>, // RELAY2 ++ <&gpio 24 0>; // RELAYSSR + shutdown-timeout-ms = <1000>; + + amp_off { + start_state; + shutdown_state; + +- set = , ++ set = , ++ , + ; + amp_on_1 = ; + fault = ; +@@ -85,12 +88,14 @@ + }; + + amp_on { +- set = ; ++ set = , ++ ; + amp_on_wait = ; + fault = ; + }; + + amp_on_wait { ++ set = ; + amp_off_1 = , + ; + amp_on = ; +@@ -107,7 +112,8 @@ + // Keep this a distinct state to prevent + // changes and for the diagnostic output + fault { +- set = , ++ set = , ++ , + ; + amp_off = ; + shutdown_state; +@@ -120,9 +126,9 @@ + target = <&gpio>; + __overlay__ { + ghost_amp_pins: ghost_amp_pins { +- brcm,pins = <5 22 23>; +- brcm,function = <0 1 1>; /* in out out */ +- brcm,pull = <2 0 0>; /* up none none */ ++ brcm,pins = <5 22 23 24>; ++ brcm,function = <0 1 1 1>; /* in out out out */ ++ brcm,pull = <2 0 0 0>; /* up none none none */ + }; + }; + }; +-- +2.18.4 + + +From 25624c7f7cc52471afe3c59e1958cf00c94a998c Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 13 Apr 2021 11:00:01 +0200 +Subject: [PATCH 593/661] clk: Introduce a clock request API + +It's not unusual to find clocks being shared across multiple devices +that need to change the rate depending on what the device is doing at a +given time. + +The SoC found on the RaspberryPi4 (BCM2711) is in such a situation +between its two HDMI controllers that share a clock that needs to be +raised depending on the output resolution of each controller. + +The current clk_set_rate API doesn't really allow to support that case +since there's really no synchronisation between multiple users, it's +essentially a fire-and-forget solution. + +clk_set_min_rate does allow for such a synchronisation, but has another +drawback: it doesn't allow to reduce the clock rate once the work is +over. + +In our previous example, this means that if we were to raise the +resolution of one HDMI controller to the largest resolution and then +changing for a smaller one, we would still have the clock running at the +largest resolution rate resulting in a poor power-efficiency. + +In order to address both issues, let's create an API that allows user to +create temporary requests to increase the rate to a minimum, before +going back to the initial rate once the request is done. + +This introduces mainly two side-effects: + + * There's an interaction between clk_set_rate and requests. This has + been addressed by having clk_set_rate increasing the rate if it's + greater than what the requests asked for, and in any case changing + the rate the clock will return to once all the requests are done. + + * Similarly, clk_round_rate has been adjusted to take the requests + into account and return a rate that will be greater or equal to the + requested rates. + +Signed-off-by: Maxime Ripard +--- + drivers/clk/clk.c | 121 ++++++++++++++++++++++++++++++++++++++++++++ + include/linux/clk.h | 4 ++ + 2 files changed, 125 insertions(+) + +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 61c78714c095..031627757b11 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -77,12 +77,14 @@ struct clk_core { + unsigned int protect_count; + unsigned long min_rate; + unsigned long max_rate; ++ unsigned long default_request_rate; + unsigned long accuracy; + int phase; + struct clk_duty duty; + struct hlist_head children; + struct hlist_node child_node; + struct hlist_head clks; ++ struct list_head pending_requests; + unsigned int notifier_count; + #ifdef CONFIG_DEBUG_FS + struct dentry *dentry; +@@ -105,6 +107,12 @@ struct clk { + struct hlist_node clks_node; + }; + ++struct clk_request { ++ struct list_head list; ++ struct clk *clk; ++ unsigned long rate; ++}; ++ + /*** runtime pm ***/ + static int clk_pm_runtime_get(struct clk_core *core) + { +@@ -1413,10 +1421,14 @@ unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) + { + int ret; + struct clk_rate_request req; ++ struct clk_request *clk_req; + + clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); + req.rate = rate; + ++ list_for_each_entry(clk_req, &hw->core->pending_requests, list) ++ req.min_rate = max(clk_req->rate, req.min_rate); ++ + ret = clk_core_round_rate_nolock(hw->core, &req); + if (ret) + return 0; +@@ -1437,6 +1449,7 @@ EXPORT_SYMBOL_GPL(clk_hw_round_rate); + long clk_round_rate(struct clk *clk, unsigned long rate) + { + struct clk_rate_request req; ++ struct clk_request *clk_req; + int ret; + + if (!clk) +@@ -1450,6 +1463,9 @@ long clk_round_rate(struct clk *clk, unsigned long rate) + clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); + req.rate = rate; + ++ list_for_each_entry(clk_req, &clk->core->pending_requests, list) ++ req.min_rate = max(clk_req->rate, req.min_rate); ++ + ret = clk_core_round_rate_nolock(clk->core, &req); + + if (clk->exclusive_count) +@@ -1917,6 +1933,7 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, + unsigned long new_rate; + unsigned long min_rate; + unsigned long max_rate; ++ struct clk_request *req; + int p_index = 0; + long ret; + +@@ -1931,6 +1948,9 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, + + clk_core_get_boundaries(core, &min_rate, &max_rate); + ++ list_for_each_entry(req, &core->pending_requests, list) ++ min_rate = max(req->rate, min_rate); ++ + /* find the closest rate and parent clk/rate */ + if (clk_core_can_round(core)) { + struct clk_rate_request req; +@@ -2135,6 +2155,7 @@ static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, + { + int ret, cnt; + struct clk_rate_request req; ++ struct clk_request *clk_req; + + lockdep_assert_held(&prepare_lock); + +@@ -2149,6 +2170,9 @@ static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, + clk_core_get_boundaries(core, &req.min_rate, &req.max_rate); + req.rate = req_rate; + ++ list_for_each_entry(clk_req, &core->pending_requests, list) ++ req.min_rate = max(clk_req->rate, req.min_rate); ++ + ret = clk_core_round_rate_nolock(core, &req); + + /* restore the protection */ +@@ -2242,6 +2266,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) + + ret = clk_core_set_rate_nolock(clk->core, rate); + ++ if (!list_empty(&clk->core->pending_requests)) ++ clk->core->default_request_rate = rate; ++ + if (clk->exclusive_count) + clk_core_rate_protect(clk->core); + +@@ -2401,6 +2428,99 @@ int clk_set_max_rate(struct clk *clk, unsigned long rate) + } + EXPORT_SYMBOL_GPL(clk_set_max_rate); + ++/** ++ * clk_request_start - Request a rate to be enforced temporarily ++ * @clk: the clk to act on ++ * @rate: the new rate asked for ++ * ++ * This function will create a request to temporarily increase the rate ++ * of the clock to a given rate to a certain minimum. ++ * ++ * This is meant as a best effort mechanism and while the rate of the ++ * clock will be guaranteed to be equal or higher than the requested ++ * rate, there's none on what the actual rate will be due to other ++ * factors (other requests previously set, clock boundaries, etc.). ++ * ++ * Once the request is marked as done through clk_request_done(), the ++ * rate will be reverted back to what the rate was before the request. ++ * ++ * The reported boundaries of the clock will also be adjusted so that ++ * clk_round_rate() take those requests into account. A call to ++ * clk_set_rate() during a request will affect the rate the clock will ++ * return to after the requests on that clock are done. ++ * ++ * Returns 0 on success, an ERR_PTR otherwise. ++ */ ++struct clk_request *clk_request_start(struct clk *clk, unsigned long rate) ++{ ++ struct clk_request *req; ++ int ret; ++ ++ if (!clk) ++ return ERR_PTR(-EINVAL); ++ ++ req = kzalloc(sizeof(*req), GFP_KERNEL); ++ if (!req) ++ return ERR_PTR(-ENOMEM); ++ ++ clk_prepare_lock(); ++ ++ req->clk = clk; ++ req->rate = rate; ++ ++ if (list_empty(&clk->core->pending_requests)) ++ clk->core->default_request_rate = clk_core_get_rate_recalc(clk->core); ++ ++ ret = clk_core_set_rate_nolock(clk->core, rate); ++ if (ret) { ++ clk_prepare_unlock(); ++ kfree(req); ++ return ERR_PTR(ret); ++ } ++ ++ list_add_tail(&req->list, &clk->core->pending_requests); ++ clk_prepare_unlock(); ++ ++ return req; ++} ++EXPORT_SYMBOL_GPL(clk_request_start); ++ ++/** ++ * clk_request_done - Mark a clk_request as done ++ * @req: the request to mark done ++ * ++ * This function will remove the rate request from the clock and adjust ++ * the clock rate back to either to what it was before the request ++ * started, or if there's any other request on that clock to a proper ++ * rate for them. ++ */ ++void clk_request_done(struct clk_request *req) ++{ ++ struct clk_core *core = req->clk->core; ++ ++ clk_prepare_lock(); ++ ++ list_del(&req->list); ++ ++ if (list_empty(&core->pending_requests)) { ++ clk_core_set_rate_nolock(core, core->default_request_rate); ++ core->default_request_rate = 0; ++ } else { ++ struct clk_request *cur_req; ++ unsigned long new_rate = 0; ++ ++ list_for_each_entry(cur_req, &core->pending_requests, list) ++ new_rate = max(new_rate, cur_req->rate); ++ ++ clk_core_set_rate_nolock(core, new_rate); ++ } ++ ++ clk_prepare_unlock(); ++ ++ kfree(req); ++} ++EXPORT_SYMBOL_GPL(clk_request_done); ++ + /** + * clk_get_parent - return the parent of a clk + * @clk: the clk whose parent gets returned +@@ -3811,6 +3931,7 @@ __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) + goto fail_parents; + + INIT_HLIST_HEAD(&core->clks); ++ INIT_LIST_HEAD(&core->pending_requests); + + /* + * Don't call clk_hw_create_clk() here because that would pin the +diff --git a/include/linux/clk.h b/include/linux/clk.h +index 7fd6a1febcf4..ab53a0873c8d 100644 +--- a/include/linux/clk.h ++++ b/include/linux/clk.h +@@ -15,6 +15,7 @@ + + struct device; + struct clk; ++struct clk_request; + struct device_node; + struct of_phandle_args; + +@@ -743,6 +744,9 @@ int clk_save_context(void); + */ + void clk_restore_context(void); + ++struct clk_request *clk_request_start(struct clk *clk, unsigned long rate); ++void clk_request_done(struct clk_request *req); ++ + #else /* !CONFIG_HAVE_CLK */ + + static inline struct clk *clk_get(struct device *dev, const char *id) +-- +2.18.4 + + +From c50575130b7725fb181a20f8eb7a7d809735e9e9 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 13 Apr 2021 11:55:55 +0200 +Subject: [PATCH 594/661] drm/vc4: hdmi: Convert to the new clock request API + +The new clock request API allows us to increase the rate of the HSM +clock to match our pixel rate requirements while decreasing it when +we're done, resulting in a better power-efficiency. + +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 19 ++++++++++++------- + drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++ + 2 files changed, 15 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 2816a1d3ee24..1872b3a2bb51 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -852,7 +852,9 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder, + HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE); + + clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock); ++ clk_request_done(vc4_hdmi->bvb_req); + clk_disable_unprepare(vc4_hdmi->hsm_clock); ++ clk_request_done(vc4_hdmi->hsm_req); + clk_disable_unprepare(vc4_hdmi->pixel_clock); + + ret = pm_runtime_put(&vc4_hdmi->pdev->dev); +@@ -1157,9 +1159,9 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + * pixel clock, but HSM ends up being the limiting factor. + */ + hsm_rate = max_t(unsigned long, 120000000, (pixel_rate / 100) * 101); +- ret = clk_set_min_rate(vc4_hdmi->hsm_clock, hsm_rate); +- if (ret) { +- DRM_ERROR("Failed to set HSM clock rate: %d\n", ret); ++ vc4_hdmi->hsm_req = clk_request_start(vc4_hdmi->hsm_clock, hsm_rate); ++ if (IS_ERR(vc4_hdmi->hsm_req)) { ++ DRM_ERROR("Failed to set HSM clock rate: %ld\n", PTR_ERR(vc4_hdmi->hsm_req)); + return; + } + +@@ -1176,10 +1178,11 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup + * at 300MHz. + */ +- ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock, +- (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000)); +- if (ret) { +- DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret); ++ vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, ++ (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000)); ++ if (IS_ERR(vc4_hdmi->bvb_req)) { ++ DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req)); ++ clk_request_done(vc4_hdmi->hsm_req); + clk_disable_unprepare(vc4_hdmi->hsm_clock); + clk_disable_unprepare(vc4_hdmi->pixel_clock); + return; +@@ -1188,6 +1191,8 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock); + if (ret) { + DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret); ++ clk_request_done(vc4_hdmi->bvb_req); ++ clk_request_done(vc4_hdmi->hsm_req); + clk_disable_unprepare(vc4_hdmi->hsm_clock); + clk_disable_unprepare(vc4_hdmi->pixel_clock); + return; +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h +index 33b5f120bbeb..11a4b737d0ab 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.h ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.h +@@ -175,6 +175,9 @@ struct vc4_hdmi { + + struct reset_control *reset; + ++ struct clk_request *bvb_req; ++ struct clk_request *hsm_req; ++ + /* Common debugfs regset */ + struct debugfs_regset32 hdmi_regset; + struct debugfs_regset32 hd_regset; +-- +2.18.4 + + +From 62c1611d4bf14d5d1c383387e377b515e0dfe51f Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Tue, 13 Apr 2021 14:10:03 +0100 +Subject: [PATCH 595/661] drm/vc4: hdmi: Convert to the new clock request API + +The new clock request API allows us to increase the rate of the +core clock as required during mode set while decreasing it when +we're done, resulting in a better power-efficiency. + +Signed-off-by: Dom Cobley +--- + drivers/gpu/drm/vc4/vc4_kms.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c +index 5d0974cdeaaa..48e3dc11c493 100644 +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -313,6 +313,7 @@ vc4_atomic_complete_commit(struct drm_atomic_state *state) + struct vc4_hvs *hvs = vc4->hvs; + struct drm_crtc_state *new_crtc_state; + struct drm_crtc *crtc; ++ struct clk_request *core_req; + int i; + + for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { +@@ -326,7 +327,7 @@ vc4_atomic_complete_commit(struct drm_atomic_state *state) + } + + if (vc4->hvs && vc4->hvs->hvs5) +- clk_set_min_rate(hvs->core_clk, 500000000); ++ core_req = clk_request_start(hvs->core_clk, 500000000); + + drm_atomic_helper_wait_for_fences(dev, state, false); + +@@ -358,7 +359,7 @@ vc4_atomic_complete_commit(struct drm_atomic_state *state) + drm_atomic_helper_commit_cleanup_done(state); + + if (vc4->hvs && vc4->hvs->hvs5) +- clk_set_min_rate(hvs->core_clk, 0); ++ clk_request_done(core_req); + + drm_atomic_state_put(state); + +-- +2.18.4 + + +From 3652cdb4c994aaa641c9390245dbc240c8df278f Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Tue, 13 Apr 2021 16:48:35 +0100 +Subject: [PATCH 596/661] bcm2835-unicam: Switch to new clock api + +Signed-off-by: Dom Cobley +--- + drivers/media/platform/bcm2835/bcm2835-unicam.c | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +diff --git a/drivers/media/platform/bcm2835/bcm2835-unicam.c b/drivers/media/platform/bcm2835/bcm2835-unicam.c +index 234f0eaf9c8c..0d737e0c7f52 100644 +--- a/drivers/media/platform/bcm2835/bcm2835-unicam.c ++++ b/drivers/media/platform/bcm2835/bcm2835-unicam.c +@@ -426,6 +426,8 @@ struct unicam_device { + struct clk *clock; + /* vpu clock handle */ + struct clk *vpu_clock; ++ /* vpu clock request */ ++ struct clk_request *vpu_req; + /* clock status for error handling */ + bool clocks_enabled; + /* V4l2 device */ +@@ -1691,8 +1693,8 @@ static int unicam_start_streaming(struct vb2_queue *vq, unsigned int count) + unicam_dbg(1, dev, "Running with %u data lanes\n", + dev->active_data_lanes); + +- ret = clk_set_min_rate(dev->vpu_clock, MIN_VPU_CLOCK_RATE); +- if (ret) { ++ dev->vpu_req = clk_request_start(dev->vpu_clock, MIN_VPU_CLOCK_RATE); ++ if (!dev->vpu_req) { + unicam_err(dev, "failed to set up VPU clock\n"); + goto err_pm_put; + } +@@ -1748,8 +1750,7 @@ static int unicam_start_streaming(struct vb2_queue *vq, unsigned int count) + unicam_disable(dev); + clk_disable_unprepare(dev->clock); + err_vpu_clock: +- if (clk_set_min_rate(dev->vpu_clock, 0)) +- unicam_err(dev, "failed to reset the VPU clock\n"); ++ clk_request_done(dev->vpu_req); + clk_disable_unprepare(dev->vpu_clock); + err_pm_put: + unicam_runtime_put(dev); +@@ -1779,9 +1780,7 @@ static void unicam_stop_streaming(struct vb2_queue *vq) + unicam_disable(dev); + + if (dev->clocks_enabled) { +- if (clk_set_min_rate(dev->vpu_clock, 0)) +- unicam_err(dev, "failed to reset the min VPU clock\n"); +- ++ clk_request_done(dev->vpu_req); + clk_disable_unprepare(dev->vpu_clock); + clk_disable_unprepare(dev->clock); + dev->clocks_enabled = false; +-- +2.18.4 + + +From db23165938d5ed95e53b4f3a8f2aace36c28dc8d Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Mon, 19 Apr 2021 19:30:26 +0100 +Subject: [PATCH 597/661] rpivid: Switch to new clock api + +Signed-off-by: Dom Cobley +--- + drivers/staging/media/rpivid/rpivid.h | 1 + + drivers/staging/media/rpivid/rpivid_video.c | 11 +++-------- + 2 files changed, 4 insertions(+), 8 deletions(-) + +diff --git a/drivers/staging/media/rpivid/rpivid.h b/drivers/staging/media/rpivid/rpivid.h +index 0e8280b803a3..f85cf9d08926 100644 +--- a/drivers/staging/media/rpivid/rpivid.h ++++ b/drivers/staging/media/rpivid/rpivid.h +@@ -172,6 +172,7 @@ struct rpivid_dev { + void __iomem *base_h265; + + struct clk *clock; ++ struct clk_request *hevc_req; + + struct rpivid_hw_irq_ctrl ic_active1; + struct rpivid_hw_irq_ctrl ic_active2; +diff --git a/drivers/staging/media/rpivid/rpivid_video.c b/drivers/staging/media/rpivid/rpivid_video.c +index b377c17dfb21..def891a86e55 100644 +--- a/drivers/staging/media/rpivid/rpivid_video.c ++++ b/drivers/staging/media/rpivid/rpivid_video.c +@@ -499,8 +499,8 @@ static int rpivid_start_streaming(struct vb2_queue *vq, unsigned int count) + if (V4L2_TYPE_IS_OUTPUT(vq->type) && dev->dec_ops->start) + ret = dev->dec_ops->start(ctx); + +- ret = clk_set_rate(dev->clock, max_hevc_clock); +- if (ret) { ++ dev->hevc_req = clk_request_start(dev->clock, max_hevc_clock); ++ if (!dev->hevc_req) { + dev_err(dev->dev, "Failed to set clock rate\n"); + goto out; + } +@@ -520,18 +520,13 @@ static void rpivid_stop_streaming(struct vb2_queue *vq) + { + struct rpivid_ctx *ctx = vb2_get_drv_priv(vq); + struct rpivid_dev *dev = ctx->dev; +- long min_hevc_clock = clk_round_rate(dev->clock, 0); +- int ret; + + if (V4L2_TYPE_IS_OUTPUT(vq->type) && dev->dec_ops->stop) + dev->dec_ops->stop(ctx); + + rpivid_queue_cleanup(vq, VB2_BUF_STATE_ERROR); + +- ret = clk_set_rate(dev->clock, min_hevc_clock); +- if (ret) +- dev_err(dev->dev, "Failed to set minimum clock rate\n"); +- ++ clk_request_done(dev->hevc_req); + clk_disable_unprepare(dev->clock); + } + +-- +2.18.4 + + +From 0705a4720a0bf74fcefce96ad151f81689315bae Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Mon, 2 Nov 2020 11:45:04 +0000 +Subject: [PATCH 598/661] net: usb: r8152: Provide missing documentation for + some struct members + +commit 34e653efb602e0651867fb5ab14369b555a61dcd upstream. + +Fixes the following W=1 kernel build warning(s): + + drivers/net/usb/r8152.c:934: warning: Function parameter or member 'blk_hdr' not described in 'fw_mac' + drivers/net/usb/r8152.c:934: warning: Function parameter or member 'reserved' not described in 'fw_mac' + drivers/net/usb/r8152.c:947: warning: Function parameter or member 'blk_hdr' not described in 'fw_phy_patch_key' + drivers/net/usb/r8152.c:947: warning: Function parameter or member 'reserved' not described in 'fw_phy_patch_key' + drivers/net/usb/r8152.c:986: warning: Function parameter or member 'blk_hdr' not described in 'fw_phy_nc' + drivers/net/usb/r8152.c:986: warning: Function parameter or member 'mode_pre' not described in 'fw_phy_nc' + drivers/net/usb/r8152.c:986: warning: Function parameter or member 'mode_post' not described in 'fw_phy_nc' + drivers/net/usb/r8152.c:986: warning: Function parameter or member 'reserved' not described in 'fw_phy_nc' + +Signed-off-by: Lee Jones +Acked-by: Hayes Wang +Link: https://lore.kernel.org/r/20201102114512.1062724-23-lee.jones@linaro.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index f5010f8ac1ec..e14771001aad 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -898,6 +898,7 @@ struct fw_header { + * struct fw_mac - a firmware block used by RTL_FW_PLA and RTL_FW_USB. + * The layout of the firmware block is: + * + + . ++ * @blk_hdr: firmware descriptor (type, length) + * @fw_offset: offset of the firmware binary data. The start address of + * the data would be the address of struct fw_mac + @fw_offset. + * @fw_reg: the register to load the firmware. Depends on chip. +@@ -911,6 +912,7 @@ struct fw_header { + * @bp_num: the break point number which needs to be set for this firmware. + * Depends on the firmware. + * @bp: break points. Depends on firmware. ++ * @reserved: reserved space (unused) + * @fw_ver_reg: the register to store the fw version. + * @fw_ver_data: the firmware version of the current type. + * @info: additional information for debugging, and is followed by the +@@ -936,8 +938,10 @@ struct fw_mac { + /** + * struct fw_phy_patch_key - a firmware block used by RTL_FW_PHY_START. + * This is used to set patch key when loading the firmware of PHY. ++ * @blk_hdr: firmware descriptor (type, length) + * @key_reg: the register to write the patch key. + * @key_data: patch key. ++ * @reserved: reserved space (unused) + */ + struct fw_phy_patch_key { + struct fw_block blk_hdr; +@@ -950,6 +954,7 @@ struct fw_phy_patch_key { + * struct fw_phy_nc - a firmware block used by RTL_FW_PHY_NC. + * The layout of the firmware block is: + * + + . ++ * @blk_hdr: firmware descriptor (type, length) + * @fw_offset: offset of the firmware binary data. The start address of + * the data would be the address of struct fw_phy_nc + @fw_offset. + * @fw_reg: the register to load the firmware. Depends on chip. +@@ -960,6 +965,7 @@ struct fw_phy_patch_key { + * @mode_reg: the regitster of switching the mode. + * @mod_pre: the mode needing to be set before loading the firmware. + * @mod_post: the mode to be set when finishing to load the firmware. ++ * @reserved: reserved space (unused) + * @bp_start: the start register of break points. Depends on chip. + * @bp_num: the break point number which needs to be set for this firmware. + * Depends on the firmware. +-- +2.18.4 + + +From 6689dc4261ad8d2eb0186a92c2e423b213bcb5fb Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Mon, 2 Nov 2020 11:45:09 +0000 +Subject: [PATCH 599/661] net: usb: r8152: Fix a couple of spelling errors in + fw_phy_nc's docs + +commit 9f07814d01ad085b2d9f1d55b4ce532fb2c27110 upstream. + +Fixes the following W=1 kernel build warning(s): + + drivers/net/usb/r8152.c:992: warning: Function parameter or member 'mode_pre' not described in 'fw_phy_nc' + drivers/net/usb/r8152.c:992: warning: Function parameter or member 'mode_post' not described in 'fw_phy_nc' + +Signed-off-by: Lee Jones +Acked-by: Hayes Wang +Link: https://lore.kernel.org/r/20201102114512.1062724-28-lee.jones@linaro.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index e14771001aad..a07cede5c69c 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -963,8 +963,8 @@ struct fw_phy_patch_key { + * @patch_en_addr: the register of enabling patch mode. Depends on chip. + * @patch_en_value: patch mode enabled mask. Depends on the firmware. + * @mode_reg: the regitster of switching the mode. +- * @mod_pre: the mode needing to be set before loading the firmware. +- * @mod_post: the mode to be set when finishing to load the firmware. ++ * @mode_pre: the mode needing to be set before loading the firmware. ++ * @mode_post: the mode to be set when finishing to load the firmware. + * @reserved: reserved space (unused) + * @bp_start: the start register of break points. Depends on chip. + * @bp_num: the break point number which needs to be set for this firmware. +-- +2.18.4 + + +From 82c23b5bfbf4e6bdd2926e284699d8ed138be701 Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Wed, 4 Nov 2020 10:19:22 +0800 +Subject: [PATCH 600/661] net/usb/r8153_ecm: support ECM mode for RTL8153 + +commit c1aedf015ebdd0232757a66e2daccf1246bd609c upstream. + +Support ECM mode based on cdc_ether with relative mii functions, +when CONFIG_USB_RTL8152 is not set, or the device is not supported +by r8152 driver. + +Both r8152 and r8153_ecm would check the return value of +rtl8152_get_version() in porbe(). If rtl8152_get_version() +return none zero value, the r8152 is used for the device +with vendor mode. Otherwise, the r8153_ecm is used for the +device with ECM mode. + +Signed-off-by: Hayes Wang +Link: https://lore.kernel.org/r/1394712342-15778-392-Taiwan-albertk@realtek.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/Makefile | 2 +- + drivers/net/usb/r8152.c | 30 +------ + drivers/net/usb/r8153_ecm.c | 162 ++++++++++++++++++++++++++++++++++++ + include/linux/usb/r8152.h | 37 ++++++++ + 4 files changed, 204 insertions(+), 27 deletions(-) + create mode 100644 drivers/net/usb/r8153_ecm.c + create mode 100644 include/linux/usb/r8152.h + +diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile +index 99fd12be2111..99381e6bea78 100644 +--- a/drivers/net/usb/Makefile ++++ b/drivers/net/usb/Makefile +@@ -13,7 +13,7 @@ obj-$(CONFIG_USB_LAN78XX) += lan78xx.o + obj-$(CONFIG_USB_NET_AX8817X) += asix.o + asix-y := asix_devices.o asix_common.o ax88172a.o + obj-$(CONFIG_USB_NET_AX88179_178A) += ax88179_178a.o +-obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o ++obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o r8153_ecm.o + obj-$(CONFIG_USB_NET_CDC_EEM) += cdc_eem.o + obj-$(CONFIG_USB_NET_DM9601) += dm9601.o + obj-$(CONFIG_USB_NET_SR9700) += sr9700.o +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index a07cede5c69c..390d9e1fa7fe 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + + /* Information for net-next */ + #define NETNEXT_VERSION "11" +@@ -653,18 +654,6 @@ enum rtl_register_content { + + #define INTR_LINK 0x0004 + +-#define RTL8152_REQT_READ 0xc0 +-#define RTL8152_REQT_WRITE 0x40 +-#define RTL8152_REQ_GET_REGS 0x05 +-#define RTL8152_REQ_SET_REGS 0x05 +- +-#define BYTE_EN_DWORD 0xff +-#define BYTE_EN_WORD 0x33 +-#define BYTE_EN_BYTE 0x11 +-#define BYTE_EN_SIX_BYTES 0x3f +-#define BYTE_EN_START_MASK 0x0f +-#define BYTE_EN_END_MASK 0xf0 +- + #define RTL8153_MAX_PACKET 9216 /* 9K */ + #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \ + ETH_FCS_LEN) +@@ -689,21 +678,9 @@ enum rtl8152_flags { + LENOVO_MACPASSTHRU, + }; + +-/* Define these values to match your device */ +-#define VENDOR_ID_REALTEK 0x0bda +-#define VENDOR_ID_MICROSOFT 0x045e +-#define VENDOR_ID_SAMSUNG 0x04e8 +-#define VENDOR_ID_LENOVO 0x17ef +-#define VENDOR_ID_LINKSYS 0x13b1 +-#define VENDOR_ID_NVIDIA 0x0955 +-#define VENDOR_ID_TPLINK 0x2357 +- + #define DEVICE_ID_THINKPAD_THUNDERBOLT3_DOCK_GEN2 0x3082 + #define DEVICE_ID_THINKPAD_USB_C_DOCK_GEN2 0xa387 + +-#define MCU_TYPE_PLA 0x0100 +-#define MCU_TYPE_USB 0x0000 +- + struct tally_counter { + __le64 tx_packets; + __le64 rx_packets; +@@ -6601,7 +6578,7 @@ static int rtl_fw_init(struct r8152 *tp) + return 0; + } + +-static u8 rtl_get_version(struct usb_interface *intf) ++u8 rtl8152_get_version(struct usb_interface *intf) + { + struct usb_device *udev = interface_to_usbdev(intf); + u32 ocp_data = 0; +@@ -6659,12 +6636,13 @@ static u8 rtl_get_version(struct usb_interface *intf) + + return version; + } ++EXPORT_SYMBOL_GPL(rtl8152_get_version); + + static int rtl8152_probe(struct usb_interface *intf, + const struct usb_device_id *id) + { + struct usb_device *udev = interface_to_usbdev(intf); +- u8 version = rtl_get_version(intf); ++ u8 version = rtl8152_get_version(intf); + struct r8152 *tp; + struct net_device *netdev; + int ret; +diff --git a/drivers/net/usb/r8153_ecm.c b/drivers/net/usb/r8153_ecm.c +new file mode 100644 +index 000000000000..2c3fabd38b16 +--- /dev/null ++++ b/drivers/net/usb/r8153_ecm.c +@@ -0,0 +1,162 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define OCP_BASE 0xe86c ++ ++static int pla_read_word(struct usbnet *dev, u16 index) ++{ ++ u16 byen = BYTE_EN_WORD; ++ u8 shift = index & 2; ++ __le32 tmp; ++ int ret; ++ ++ if (shift) ++ byen <<= shift; ++ ++ index &= ~3; ++ ++ ret = usbnet_read_cmd(dev, RTL8152_REQ_GET_REGS, RTL8152_REQT_READ, index, ++ MCU_TYPE_PLA | byen, &tmp, sizeof(tmp)); ++ if (ret < 0) ++ goto out; ++ ++ ret = __le32_to_cpu(tmp); ++ ret >>= (shift * 8); ++ ret &= 0xffff; ++ ++out: ++ return ret; ++} ++ ++static int pla_write_word(struct usbnet *dev, u16 index, u32 data) ++{ ++ u32 mask = 0xffff; ++ u16 byen = BYTE_EN_WORD; ++ u8 shift = index & 2; ++ __le32 tmp; ++ int ret; ++ ++ data &= mask; ++ ++ if (shift) { ++ byen <<= shift; ++ mask <<= (shift * 8); ++ data <<= (shift * 8); ++ } ++ ++ index &= ~3; ++ ++ ret = usbnet_read_cmd(dev, RTL8152_REQ_GET_REGS, RTL8152_REQT_READ, index, ++ MCU_TYPE_PLA | byen, &tmp, sizeof(tmp)); ++ ++ if (ret < 0) ++ goto out; ++ ++ data |= __le32_to_cpu(tmp) & ~mask; ++ tmp = __cpu_to_le32(data); ++ ++ ret = usbnet_write_cmd(dev, RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE, index, ++ MCU_TYPE_PLA | byen, &tmp, sizeof(tmp)); ++ ++out: ++ return ret; ++} ++ ++static int r8153_ecm_mdio_read(struct net_device *netdev, int phy_id, int reg) ++{ ++ struct usbnet *dev = netdev_priv(netdev); ++ int ret; ++ ++ ret = pla_write_word(dev, OCP_BASE, 0xa000); ++ if (ret < 0) ++ goto out; ++ ++ ret = pla_read_word(dev, 0xb400 + reg * 2); ++ ++out: ++ return ret; ++} ++ ++static void r8153_ecm_mdio_write(struct net_device *netdev, int phy_id, int reg, int val) ++{ ++ struct usbnet *dev = netdev_priv(netdev); ++ int ret; ++ ++ ret = pla_write_word(dev, OCP_BASE, 0xa000); ++ if (ret < 0) ++ return; ++ ++ ret = pla_write_word(dev, 0xb400 + reg * 2, val); ++} ++ ++static int r8153_bind(struct usbnet *dev, struct usb_interface *intf) ++{ ++ int status; ++ ++ status = usbnet_cdc_bind(dev, intf); ++ if (status < 0) ++ return status; ++ ++ dev->mii.dev = dev->net; ++ dev->mii.mdio_read = r8153_ecm_mdio_read; ++ dev->mii.mdio_write = r8153_ecm_mdio_write; ++ dev->mii.reg_num_mask = 0x1f; ++ dev->mii.supports_gmii = 1; ++ ++ return status; ++} ++ ++static const struct driver_info r8153_info = { ++ .description = "RTL8153 ECM Device", ++ .flags = FLAG_ETHER, ++ .bind = r8153_bind, ++ .unbind = usbnet_cdc_unbind, ++ .status = usbnet_cdc_status, ++ .manage_power = usbnet_manage_power, ++}; ++ ++static const struct usb_device_id products[] = { ++{ ++ USB_DEVICE_AND_INTERFACE_INFO(VENDOR_ID_REALTEK, 0x8153, USB_CLASS_COMM, ++ USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE), ++ .driver_info = (unsigned long)&r8153_info, ++}, ++ ++ { }, /* END */ ++}; ++MODULE_DEVICE_TABLE(usb, products); ++ ++static int rtl8153_ecm_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++#if IS_REACHABLE(CONFIG_USB_RTL8152) ++ if (rtl8152_get_version(intf)) ++ return -ENODEV; ++#endif ++ ++ return usbnet_probe(intf, id); ++} ++ ++static struct usb_driver r8153_ecm_driver = { ++ .name = "r8153_ecm", ++ .id_table = products, ++ .probe = rtl8153_ecm_probe, ++ .disconnect = usbnet_disconnect, ++ .suspend = usbnet_suspend, ++ .resume = usbnet_resume, ++ .reset_resume = usbnet_resume, ++ .supports_autosuspend = 1, ++ .disable_hub_initiated_lpm = 1, ++}; ++ ++module_usb_driver(r8153_ecm_driver); ++ ++MODULE_AUTHOR("Hayes Wang"); ++MODULE_DESCRIPTION("Realtek USB ECM device"); ++MODULE_LICENSE("GPL"); +diff --git a/include/linux/usb/r8152.h b/include/linux/usb/r8152.h +new file mode 100644 +index 000000000000..20d88b1defc3 +--- /dev/null ++++ b/include/linux/usb/r8152.h +@@ -0,0 +1,37 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* ++ * Copyright (c) 2020 Realtek Semiconductor Corp. All rights reserved. ++ */ ++ ++#ifndef __LINUX_R8152_H ++#define __LINUX_R8152_H ++ ++#define RTL8152_REQT_READ 0xc0 ++#define RTL8152_REQT_WRITE 0x40 ++#define RTL8152_REQ_GET_REGS 0x05 ++#define RTL8152_REQ_SET_REGS 0x05 ++ ++#define BYTE_EN_DWORD 0xff ++#define BYTE_EN_WORD 0x33 ++#define BYTE_EN_BYTE 0x11 ++#define BYTE_EN_SIX_BYTES 0x3f ++#define BYTE_EN_START_MASK 0x0f ++#define BYTE_EN_END_MASK 0xf0 ++ ++#define MCU_TYPE_PLA 0x0100 ++#define MCU_TYPE_USB 0x0000 ++ ++/* Define these values to match your device */ ++#define VENDOR_ID_REALTEK 0x0bda ++#define VENDOR_ID_MICROSOFT 0x045e ++#define VENDOR_ID_SAMSUNG 0x04e8 ++#define VENDOR_ID_LENOVO 0x17ef ++#define VENDOR_ID_LINKSYS 0x13b1 ++#define VENDOR_ID_NVIDIA 0x0955 ++#define VENDOR_ID_TPLINK 0x2357 ++ ++#if IS_REACHABLE(CONFIG_USB_RTL8152) ++extern u8 rtl8152_get_version(struct usb_interface *intf); ++#endif ++ ++#endif /* __LINUX_R8152_H */ +-- +2.18.4 + + +From d3052f7fdc9edf59cf26c462c42059211f439007 Mon Sep 17 00:00:00 2001 +From: Emil Renner Berthing +Date: Sun, 31 Jan 2021 00:47:29 +0100 +Subject: [PATCH 601/661] net: usb: r8152: use new tasklet API + +commit f3163f1cb87141c7a41a15a5d4c98b353f807b04 upstream. + +This converts the driver to use the new tasklet API introduced in +commit 12cc923f1ccc ("tasklet: Introduce new initialization API") + +Signed-off-by: Emil Renner Berthing +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 390d9e1fa7fe..4770167ade91 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -2393,11 +2393,9 @@ static void tx_bottom(struct r8152 *tp) + } while (res == 0); + } + +-static void bottom_half(unsigned long data) ++static void bottom_half(struct tasklet_struct *t) + { +- struct r8152 *tp; +- +- tp = (struct r8152 *)data; ++ struct r8152 *tp = from_tasklet(tp, t, tx_tl); + + if (test_bit(RTL8152_UNPLUG, &tp->flags)) + return; +@@ -6694,7 +6692,7 @@ static int rtl8152_probe(struct usb_interface *intf, + mutex_init(&tp->control); + INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t); + INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t); +- tasklet_init(&tp->tx_tl, bottom_half, (unsigned long)tp); ++ tasklet_setup(&tp->tx_tl, bottom_half); + tasklet_disable(&tp->tx_tl); + + netdev->netdev_ops = &rtl8152_netdev_ops; +-- +2.18.4 + + +From 2bae59d30ddb1320d02b76c349a701bf62dc8185 Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Wed, 3 Feb 2021 17:14:28 +0800 +Subject: [PATCH 602/661] r8152: replace several functions about phy patch + request + +commit a08c0d309d8c078d22717d815cf9853f6f2c07bd upstream. + +Replace r8153_patch_request() with rtl_phy_patch_request(). +Replace r8153_pre_ram_code() with rtl_pre_ram_code(). +Replace r8153_post_ram_code() with rtl_post_ram_code(). +Add rtl_patch_key_set(). + +The new functions have an additional parameter. It is used to wait +the patch request command finished. When the PHY is resumed from +the state of power cut, the PHY is at a safe mode and the +OCP_PHY_PATCH_STAT wouldn't be updated. For this situation, it is +safe to set patch request command without waiting OCP_PHY_PATCH_STAT. + +Signed-off-by: Hayes Wang +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 84 ++++++++++++++++++++++++----------------- + 1 file changed, 50 insertions(+), 34 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 4770167ade91..cd413ecb493c 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -3443,59 +3443,76 @@ static void rtl_clear_bp(struct r8152 *tp, u16 type) + ocp_write_word(tp, type, PLA_BP_BA, 0); + } + +-static int r8153_patch_request(struct r8152 *tp, bool request) ++static int rtl_phy_patch_request(struct r8152 *tp, bool request, bool wait) + { +- u16 data; ++ u16 data, check; + int i; + + data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD); +- if (request) ++ if (request) { + data |= PATCH_REQUEST; +- else ++ check = 0; ++ } else { + data &= ~PATCH_REQUEST; ++ check = PATCH_READY; ++ } + ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data); + +- for (i = 0; request && i < 5000; i++) { ++ for (i = 0; wait && i < 5000; i++) { ++ u32 ocp_data; ++ + usleep_range(1000, 2000); +- if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY) ++ ocp_data = ocp_reg_read(tp, OCP_PHY_PATCH_STAT); ++ if ((ocp_data & PATCH_READY) ^ check) + break; + } + +- if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) { +- netif_err(tp, drv, tp->netdev, "patch request fail\n"); +- r8153_patch_request(tp, false); ++ if (request && wait && ++ !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) { ++ dev_err(&tp->intf->dev, "PHY patch request fail\n"); ++ rtl_phy_patch_request(tp, false, false); + return -ETIME; + } else { + return 0; + } + } + +-static int r8153_pre_ram_code(struct r8152 *tp, u16 key_addr, u16 patch_key) ++static void rtl_patch_key_set(struct r8152 *tp, u16 key_addr, u16 patch_key) + { +- if (r8153_patch_request(tp, true)) { +- dev_err(&tp->intf->dev, "patch request fail\n"); +- return -ETIME; +- } ++ if (patch_key && key_addr) { ++ sram_write(tp, key_addr, patch_key); ++ sram_write(tp, SRAM_PHY_LOCK, PHY_PATCH_LOCK); ++ } else if (key_addr) { ++ u16 data; + +- sram_write(tp, key_addr, patch_key); +- sram_write(tp, SRAM_PHY_LOCK, PHY_PATCH_LOCK); ++ sram_write(tp, 0x0000, 0x0000); + +- return 0; ++ data = ocp_reg_read(tp, OCP_PHY_LOCK); ++ data &= ~PATCH_LOCK; ++ ocp_reg_write(tp, OCP_PHY_LOCK, data); ++ ++ sram_write(tp, key_addr, 0x0000); ++ } else { ++ WARN_ON_ONCE(1); ++ } + } + +-static int r8153_post_ram_code(struct r8152 *tp, u16 key_addr) ++static int ++rtl_pre_ram_code(struct r8152 *tp, u16 key_addr, u16 patch_key, bool wait) + { +- u16 data; ++ if (rtl_phy_patch_request(tp, true, wait)) ++ return -ETIME; + +- sram_write(tp, 0x0000, 0x0000); ++ rtl_patch_key_set(tp, key_addr, patch_key); + +- data = ocp_reg_read(tp, OCP_PHY_LOCK); +- data &= ~PATCH_LOCK; +- ocp_reg_write(tp, OCP_PHY_LOCK, data); ++ return 0; ++} + +- sram_write(tp, key_addr, 0x0000); ++static int rtl_post_ram_code(struct r8152 *tp, u16 key_addr, bool wait) ++{ ++ rtl_patch_key_set(tp, key_addr, 0); + +- r8153_patch_request(tp, false); ++ rtl_phy_patch_request(tp, false, wait); + + ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, tp->ocp_base); + +@@ -3980,7 +3997,7 @@ static void rtl8152_fw_mac_apply(struct r8152 *tp, struct fw_mac *mac) + dev_dbg(&tp->intf->dev, "successfully applied %s\n", mac->info); + } + +-static void rtl8152_apply_firmware(struct r8152 *tp) ++static void rtl8152_apply_firmware(struct r8152 *tp, bool power_cut) + { + struct rtl_fw *rtl_fw = &tp->rtl_fw; + const struct firmware *fw; +@@ -4011,12 +4028,11 @@ static void rtl8152_apply_firmware(struct r8152 *tp) + case RTL_FW_PHY_START: + key = (struct fw_phy_patch_key *)block; + key_addr = __le16_to_cpu(key->key_reg); +- r8153_pre_ram_code(tp, key_addr, +- __le16_to_cpu(key->key_data)); ++ rtl_pre_ram_code(tp, key_addr, __le16_to_cpu(key->key_data), !power_cut); + break; + case RTL_FW_PHY_STOP: + WARN_ON(!key_addr); +- r8153_post_ram_code(tp, key_addr); ++ rtl_post_ram_code(tp, key_addr, !power_cut); + break; + case RTL_FW_PHY_NC: + rtl8152_fw_phy_nc_apply(tp, (struct fw_phy_nc *)block); +@@ -4221,7 +4237,7 @@ static void rtl8152_disable(struct r8152 *tp) + + static void r8152b_hw_phy_cfg(struct r8152 *tp) + { +- rtl8152_apply_firmware(tp); ++ rtl8152_apply_firmware(tp, false); + rtl_eee_enable(tp, tp->eee_en); + r8152_aldps_en(tp, true); + r8152b_enable_fc(tp); +@@ -4503,7 +4519,7 @@ static void r8153_hw_phy_cfg(struct r8152 *tp) + /* disable EEE before updating the PHY parameters */ + rtl_eee_enable(tp, false); + +- rtl8152_apply_firmware(tp); ++ rtl8152_apply_firmware(tp, false); + + if (tp->version == RTL_VER_03) { + data = ocp_reg_read(tp, OCP_EEE_CFG); +@@ -4577,7 +4593,7 @@ static void r8153b_hw_phy_cfg(struct r8152 *tp) + /* disable EEE before updating the PHY parameters */ + rtl_eee_enable(tp, false); + +- rtl8152_apply_firmware(tp); ++ rtl8152_apply_firmware(tp, false); + + r8153b_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags)); + +@@ -4618,7 +4634,7 @@ static void r8153b_hw_phy_cfg(struct r8152 *tp) + ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); + + /* Advnace EEE */ +- if (!r8153_patch_request(tp, true)) { ++ if (!rtl_phy_patch_request(tp, true, true)) { + data = ocp_reg_read(tp, OCP_POWER_CFG); + data |= EEE_CLKDIV_EN; + ocp_reg_write(tp, OCP_POWER_CFG, data); +@@ -4635,7 +4651,7 @@ static void r8153b_hw_phy_cfg(struct r8152 *tp) + ocp_reg_write(tp, OCP_SYSCLK_CFG, clk_div_expo(5)); + tp->ups_info._250m_ckdiv = true; + +- r8153_patch_request(tp, false); ++ rtl_phy_patch_request(tp, false, true); + } + + if (tp->eee_en) +-- +2.18.4 + + +From c24a163a5a5b8e7fe2b3951fa6e81e6aaa21ef73 Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Wed, 3 Feb 2021 17:14:29 +0800 +Subject: [PATCH 603/661] r8152: adjust the flow of power cut for RTL8153B + +commit 80fd850b31f09263ad175b2f640d5c5c6f76ed41 upstream. + +For runtime resuming, the RTL8153B may be resumed from the state +of power cut, when enabling the feature of UPS. Then, the PHY +would be reset, so it is necessary to be initailized again. + +Besides, the USB_U1U2_TIMER also has to be set again, so I move +it from r8153b_init() to r8153b_hw_phy_cfg(). + +Signed-off-by: Hayes Wang +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 68 ++++++++++++++++++++++++----------------- + 1 file changed, 40 insertions(+), 28 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index cd413ecb493c..779176c9b13b 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -1371,6 +1371,10 @@ void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val) + static int + r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags); + ++static int ++rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u32 speed, u8 duplex, ++ u32 advertising); ++ + static int rtl8152_set_mac_address(struct net_device *netdev, void *p) + { + struct r8152 *tp = netdev_priv(netdev); +@@ -3182,8 +3186,6 @@ static void r8153b_ups_en(struct r8152 *tp, bool enable) + ocp_data |= BIT(0); + ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data); + } else { +- u16 data; +- + ocp_data &= ~(UPS_EN | USP_PREWAKE); + ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); + +@@ -3191,31 +3193,20 @@ static void r8153b_ups_en(struct r8152 *tp, bool enable) + ocp_data &= ~BIT(0); + ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data); + +- ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); +- ocp_data &= ~PCUT_STATUS; +- ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); +- +- data = r8153_phy_status(tp, 0); +- +- switch (data) { +- case PHY_STAT_PWRDN: +- case PHY_STAT_EXT_INIT: +- r8153b_green_en(tp, +- test_bit(GREEN_ETHERNET, &tp->flags)); ++ if (ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0) & PCUT_STATUS) { ++ int i; + +- data = r8152_mdio_read(tp, MII_BMCR); +- data &= ~BMCR_PDOWN; +- data |= BMCR_RESET; +- r8152_mdio_write(tp, MII_BMCR, data); ++ for (i = 0; i < 500; i++) { ++ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & ++ AUTOLOAD_DONE) ++ break; ++ msleep(20); ++ } + +- data = r8153_phy_status(tp, PHY_STAT_LAN_ON); +- fallthrough; ++ tp->rtl_ops.hw_phy_cfg(tp); + +- default: +- if (data != PHY_STAT_LAN_ON) +- netif_warn(tp, link, tp->netdev, +- "PHY not ready"); +- break; ++ rtl8152_set_speed(tp, tp->autoneg, tp->speed, ++ tp->duplex, tp->advertising); + } + } + } +@@ -4587,13 +4578,37 @@ static void r8153b_hw_phy_cfg(struct r8152 *tp) + u32 ocp_data; + u16 data; + ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); ++ if (ocp_data & PCUT_STATUS) { ++ ocp_data &= ~PCUT_STATUS; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); ++ } ++ + /* disable ALDPS before updating the PHY parameters */ + r8153_aldps_en(tp, false); + + /* disable EEE before updating the PHY parameters */ + rtl_eee_enable(tp, false); + +- rtl8152_apply_firmware(tp, false); ++ /* U1/U2/L1 idle timer. 500 us */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500); ++ ++ data = r8153_phy_status(tp, 0); ++ ++ switch (data) { ++ case PHY_STAT_PWRDN: ++ case PHY_STAT_EXT_INIT: ++ rtl8152_apply_firmware(tp, true); ++ ++ data = r8152_mdio_read(tp, MII_BMCR); ++ data &= ~BMCR_PDOWN; ++ r8152_mdio_write(tp, MII_BMCR, data); ++ break; ++ case PHY_STAT_LAN_ON: ++ default: ++ rtl8152_apply_firmware(tp, false); ++ break; ++ } + + r8153b_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags)); + +@@ -5521,9 +5536,6 @@ static void r8153b_init(struct r8152 *tp) + /* MSC timer = 0xfff * 8ms = 32760 ms */ + ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff); + +- /* U1/U2/L1 idle timer. 500 us */ +- ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500); +- + r8153b_power_cut_en(tp, false); + r8153b_ups_en(tp, false); + r8153_queue_wake(tp, false); +-- +2.18.4 + + +From 6c1b4b48308c2de1298434ae889670fc93fda27c Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 19 Feb 2021 17:04:40 +0800 +Subject: [PATCH 604/661] r8152: enable U1/U2 for USB_SPEED_SUPER + +commit 7a0ae61acde2cebd69665837170405eced86a6c7 upstream. + +U1/U2 shoued be enabled for USB 3.0 or later. The USB 2.0 doesn't +support it. + +Signed-off-by: Hayes Wang +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 779176c9b13b..b59958950339 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -3335,7 +3335,7 @@ static void rtl8153b_runtime_enable(struct r8152 *tp, bool enable) + r8153b_ups_en(tp, false); + r8153_queue_wake(tp, false); + rtl_runtime_suspend_enable(tp, false); +- if (tp->udev->speed != USB_SPEED_HIGH) ++ if (tp->udev->speed >= USB_SPEED_SUPER) + r8153b_u1u2en(tp, true); + } + } +@@ -5028,7 +5028,7 @@ static void rtl8153b_up(struct r8152 *tp) + + r8153_aldps_en(tp, true); + +- if (tp->udev->speed != USB_SPEED_HIGH) ++ if (tp->udev->speed >= USB_SPEED_SUPER) + r8153b_u1u2en(tp, true); + } + +@@ -5549,8 +5549,9 @@ static void r8153b_init(struct r8152 *tp) + ocp_data |= POLL_LINK_CHG; + ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); + +- if (tp->udev->speed != USB_SPEED_HIGH) ++ if (tp->udev->speed >= USB_SPEED_SUPER) + r8153b_u1u2en(tp, true); ++ + usb_enable_lpm(tp->udev); + + /* MAC clock speed down */ +-- +2.18.4 + + +From 6ca76180797963dbbf906bf6b93dd774a24f911d Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 19 Feb 2021 17:04:41 +0800 +Subject: [PATCH 605/661] r8152: check if the pointer of the function exists + +commit c79515e47935c747282c6ed2ee5b2ef039756eeb upstream. + +Return error code if autosuspend_en, eee_get, or eee_set don't exist. + +Signed-off-by: Hayes Wang +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index b59958950339..a1990525e849 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -5734,6 +5734,9 @@ static int rtl8152_runtime_suspend(struct r8152 *tp) + struct net_device *netdev = tp->netdev; + int ret = 0; + ++ if (!tp->rtl_ops.autosuspend_en) ++ return -EBUSY; ++ + set_bit(SELECTIVE_SUSPEND, &tp->flags); + smp_mb__after_atomic(); + +@@ -6133,6 +6136,11 @@ rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata) + struct r8152 *tp = netdev_priv(net); + int ret; + ++ if (!tp->rtl_ops.eee_get) { ++ ret = -EOPNOTSUPP; ++ goto out; ++ } ++ + ret = usb_autopm_get_interface(tp->intf); + if (ret < 0) + goto out; +@@ -6155,6 +6163,11 @@ rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata) + struct r8152 *tp = netdev_priv(net); + int ret; + ++ if (!tp->rtl_ops.eee_set) { ++ ret = -EOPNOTSUPP; ++ goto out; ++ } ++ + ret = usb_autopm_get_interface(tp->intf); + if (ret < 0) + goto out; +-- +2.18.4 + + +From dfff00a8bf8f90c59b754dfeb717b71748f7b5ae Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 19 Feb 2021 17:04:42 +0800 +Subject: [PATCH 606/661] r8152: replace netif_err with dev_err + +commit 156c3207611262266f0eea589ac3f00c5657320e upstream. + +Some messages are before calling register_netdev(), so replace +netif_err() with dev_err(). + +Signed-off-by: Hayes Wang +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index a1990525e849..8a479eb6ddea 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -6570,7 +6570,7 @@ static int rtl_ops_init(struct r8152 *tp) + + default: + ret = -ENODEV; +- netif_err(tp, probe, tp->netdev, "Unknown Device\n"); ++ dev_err(&tp->intf->dev, "Unknown Device\n"); + break; + } + +@@ -6827,7 +6827,7 @@ static int rtl8152_probe(struct usb_interface *intf, + + ret = register_netdev(netdev); + if (ret != 0) { +- netif_err(tp, probe, netdev, "couldn't register the device\n"); ++ dev_err(&intf->dev, "couldn't register the device\n"); + goto out1; + } + +-- +2.18.4 + + +From 8bf01f9c04f8ff61d5df58d7204c18bffc82b51a Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 19 Feb 2021 17:04:43 +0800 +Subject: [PATCH 607/661] r8152: spilt rtl_set_eee_plus and r8153b_green_en + +commit 40fa7568ac230446d888b7ad402cff9e20fe3ad5 upstream. + +Add rtl_eee_plus_en() and rtl_green_en(). + +Signed-off-by: Hayes Wang +Signed-off-by: Jakub Kicinski +--- + drivers/net/usb/r8152.c | 43 ++++++++++++++++++++++++++--------------- + 1 file changed, 27 insertions(+), 16 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 8a479eb6ddea..20fb5638ac65 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -2632,21 +2632,24 @@ static inline u8 rtl8152_get_speed(struct r8152 *tp) + return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS); + } + +-static void rtl_set_eee_plus(struct r8152 *tp) ++static void rtl_eee_plus_en(struct r8152 *tp, bool enable) + { + u32 ocp_data; +- u8 speed; + +- speed = rtl8152_get_speed(tp); +- if (speed & _10bps) { +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); ++ if (enable) + ocp_data |= EEEP_CR_EEEP_TX; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); +- } else { +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); ++ else + ocp_data &= ~EEEP_CR_EEEP_TX; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); +- } ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); ++} ++ ++static void rtl_set_eee_plus(struct r8152 *tp) ++{ ++ if (rtl8152_get_speed(tp) & _10bps) ++ rtl_eee_plus_en(tp, true); ++ else ++ rtl_eee_plus_en(tp, false); + } + + static void rxdy_gated_en(struct r8152 *tp, bool enable) +@@ -3127,10 +3130,22 @@ static void r8153b_ups_flags(struct r8152 *tp) + ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ups_flags); + } + +-static void r8153b_green_en(struct r8152 *tp, bool enable) ++static void rtl_green_en(struct r8152 *tp, bool enable) + { + u16 data; + ++ data = sram_read(tp, SRAM_GREEN_CFG); ++ if (enable) ++ data |= GREEN_ETH_EN; ++ else ++ data &= ~GREEN_ETH_EN; ++ sram_write(tp, SRAM_GREEN_CFG, data); ++ ++ tp->ups_info.green = enable; ++} ++ ++static void r8153b_green_en(struct r8152 *tp, bool enable) ++{ + if (enable) { + sram_write(tp, 0x8045, 0); /* 10M abiq&ldvbias */ + sram_write(tp, 0x804d, 0x1222); /* 100M short abiq&ldvbias */ +@@ -3141,11 +3156,7 @@ static void r8153b_green_en(struct r8152 *tp, bool enable) + sram_write(tp, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */ + } + +- data = sram_read(tp, SRAM_GREEN_CFG); +- data |= GREEN_ETH_EN; +- sram_write(tp, SRAM_GREEN_CFG, data); +- +- tp->ups_info.green = enable; ++ rtl_green_en(tp, true); + } + + static u16 r8153_phy_status(struct r8152 *tp, u16 desired) +-- +2.18.4 + + +From 32b26f73f7cb57e7a9285044068499a48a16895b Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 16 Apr 2021 16:04:32 +0800 +Subject: [PATCH 608/661] r8152: set inter fram gap time depending on speed + +commit 5133bcc7481528e36fff0a3b056601efb704fb32 upstream. + +Set the maximum inter frame gap time (144ns) for speed 10M/half and +100M/half. It improves the performance for those speeds. And, there +is no effect for the other speeds. + +For 10M/half and 100M/half, the fast inter frame gap time let the +device couldn't use the feature of the aggregation effectively, +because the transfer would be completed fastly. Therefore, use the +maximum value to improve the effect of the aggregation. However, you +may not feel the improvement for fast CPUs, because they compensate +for the effect of the aggregation. + +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +--- + drivers/net/usb/r8152.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 20fb5638ac65..10db48f4ed77 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -249,6 +249,9 @@ + + /* PLA_TCR1 */ + #define VERSION_MASK 0x7cf0 ++#define IFG_MASK (BIT(3) | BIT(9) | BIT(8)) ++#define IFG_144NS BIT(9) ++#define IFG_96NS (BIT(9) | BIT(8)) + + /* PLA_MTPS */ + #define MTPS_JUMBO (12 * 1024 / 64) +@@ -2747,6 +2750,29 @@ static int rtl_stop_rx(struct r8152 *tp) + return 0; + } + ++static void rtl_set_ifg(struct r8152 *tp, u16 speed) ++{ ++ u32 ocp_data; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1); ++ ocp_data &= ~IFG_MASK; ++ if ((speed & (_10bps | _100bps)) && !(speed & FULL_DUP)) { ++ ocp_data |= IFG_144NS; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR1, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4); ++ ocp_data &= ~TX10MIDLE_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data); ++ } else { ++ ocp_data |= IFG_96NS; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR1, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4); ++ ocp_data |= TX10MIDLE_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data); ++ } ++} ++ + static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp) + { + ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN, +@@ -2850,6 +2876,8 @@ static int rtl8153_enable(struct r8152 *tp) + r8153_set_rx_early_timeout(tp); + r8153_set_rx_early_size(tp); + ++ rtl_set_ifg(tp, rtl8152_get_speed(tp)); ++ + if (tp->version == RTL_VER_09) { + u32 ocp_data; + +-- +2.18.4 + + +From fece7fdd2f70f1415dd3619729b14f61cfe6a4d2 Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 16 Apr 2021 16:04:33 +0800 +Subject: [PATCH 609/661] r8152: adjust rtl8152_check_firmware function + +commit a8a7be178e81a3d4b6972cbeb0ccd091ca2f9f89 upstream. + +Use bits operations to record and check the firmware. + +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +--- + drivers/net/usb/r8152.c | 51 +++++++++++++++++++++++------------------ + 1 file changed, 29 insertions(+), 22 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 10db48f4ed77..28c9b4dc1a60 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -874,6 +874,14 @@ struct fw_header { + struct fw_block blocks[]; + } __packed; + ++enum rtl8152_fw_flags { ++ FW_FLAGS_USB = 0, ++ FW_FLAGS_PLA, ++ FW_FLAGS_START, ++ FW_FLAGS_STOP, ++ FW_FLAGS_NC, ++}; ++ + /** + * struct fw_mac - a firmware block used by RTL_FW_PLA and RTL_FW_USB. + * The layout of the firmware block is: +@@ -3800,10 +3808,7 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + { + const struct firmware *fw = rtl_fw->fw; + struct fw_header *fw_hdr = (struct fw_header *)fw->data; +- struct fw_mac *pla = NULL, *usb = NULL; +- struct fw_phy_patch_key *start = NULL; +- struct fw_phy_nc *phy_nc = NULL; +- struct fw_block *stop = NULL; ++ unsigned long fw_flags = 0; + long ret = -EFAULT; + int i; + +@@ -3832,50 +3837,52 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + goto fail; + goto fw_end; + case RTL_FW_PLA: +- if (pla) { ++ if (test_bit(FW_FLAGS_PLA, &fw_flags)) { + dev_err(&tp->intf->dev, + "multiple PLA firmware encountered"); + goto fail; + } + +- pla = (struct fw_mac *)block; +- if (!rtl8152_is_fw_mac_ok(tp, pla)) { ++ if (!rtl8152_is_fw_mac_ok(tp, (struct fw_mac *)block)) { + dev_err(&tp->intf->dev, + "check PLA firmware failed\n"); + goto fail; + } ++ __set_bit(FW_FLAGS_PLA, &fw_flags); + break; + case RTL_FW_USB: +- if (usb) { ++ if (test_bit(FW_FLAGS_USB, &fw_flags)) { + dev_err(&tp->intf->dev, + "multiple USB firmware encountered"); + goto fail; + } + +- usb = (struct fw_mac *)block; +- if (!rtl8152_is_fw_mac_ok(tp, usb)) { ++ if (!rtl8152_is_fw_mac_ok(tp, (struct fw_mac *)block)) { + dev_err(&tp->intf->dev, + "check USB firmware failed\n"); + goto fail; + } ++ __set_bit(FW_FLAGS_USB, &fw_flags); + break; + case RTL_FW_PHY_START: +- if (start || phy_nc || stop) { ++ if (test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_NC, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { + dev_err(&tp->intf->dev, + "check PHY_START fail\n"); + goto fail; + } + +- if (__le32_to_cpu(block->length) != sizeof(*start)) { ++ if (__le32_to_cpu(block->length) != sizeof(struct fw_phy_patch_key)) { + dev_err(&tp->intf->dev, + "Invalid length for PHY_START\n"); + goto fail; + } +- +- start = (struct fw_phy_patch_key *)block; ++ __set_bit(FW_FLAGS_START, &fw_flags); + break; + case RTL_FW_PHY_STOP: +- if (stop || !start) { ++ if (test_bit(FW_FLAGS_STOP, &fw_flags) || ++ !test_bit(FW_FLAGS_START, &fw_flags)) { + dev_err(&tp->intf->dev, + "Check PHY_STOP fail\n"); + goto fail; +@@ -3886,28 +3893,28 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + "Invalid length for PHY_STOP\n"); + goto fail; + } +- +- stop = block; ++ __set_bit(FW_FLAGS_STOP, &fw_flags); + break; + case RTL_FW_PHY_NC: +- if (!start || stop) { ++ if (!test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { + dev_err(&tp->intf->dev, + "check PHY_NC fail\n"); + goto fail; + } + +- if (phy_nc) { ++ if (test_bit(FW_FLAGS_NC, &fw_flags)) { + dev_err(&tp->intf->dev, + "multiple PHY NC encountered\n"); + goto fail; + } + +- phy_nc = (struct fw_phy_nc *)block; +- if (!rtl8152_is_fw_phy_nc_ok(tp, phy_nc)) { ++ if (!rtl8152_is_fw_phy_nc_ok(tp, (struct fw_phy_nc *)block)) { + dev_err(&tp->intf->dev, + "check PHY NC firmware failed\n"); + goto fail; + } ++ __set_bit(FW_FLAGS_NC, &fw_flags); + + break; + default: +@@ -3921,7 +3928,7 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + } + + fw_end: +- if ((phy_nc || start) && !stop) { ++ if (test_bit(FW_FLAGS_START, &fw_flags) && !test_bit(FW_FLAGS_STOP, &fw_flags)) { + dev_err(&tp->intf->dev, "without PHY_STOP\n"); + goto fail; + } +-- +2.18.4 + + +From 0af5b09511daa171dfc2305161dba4215d5c80c4 Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 16 Apr 2021 16:04:34 +0800 +Subject: [PATCH 610/661] r8152: add help function to change mtu + +commit 67ce1a806f164e59a074fea8809725d3411eaa20 upstream. + +The different chips may have different requests when changing mtu. +Therefore, add a new help function of rtl_ops to change mtu. Besides, +reset the tx/rx after changing mtu. + +Additionally, add mtu_to_size() and size_to_mtu() macros to simplify +the code. + +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +--- + drivers/net/usb/r8152.c | 53 ++++++++++++++++++++++++----------------- + 1 file changed, 31 insertions(+), 22 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 28c9b4dc1a60..3f465242a4f0 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -657,15 +657,13 @@ enum rtl_register_content { + + #define INTR_LINK 0x0004 + +-#define RTL8153_MAX_PACKET 9216 /* 9K */ +-#define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \ +- ETH_FCS_LEN) + #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) + #define RTL8153_RMS RTL8153_MAX_PACKET + #define RTL8152_TX_TIMEOUT (5 * HZ) + #define RTL8152_NAPI_WEIGHT 64 +-#define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \ +- sizeof(struct rx_desc) + RX_ALIGN) ++#define mtu_to_size(m) ((m) + VLAN_ETH_HLEN + ETH_FCS_LEN) ++#define size_to_mtu(s) ((s) - VLAN_ETH_HLEN - ETH_FCS_LEN) ++#define rx_reserved_size(x) (mtu_to_size(x) + sizeof(struct rx_desc) + RX_ALIGN) + + /* rtl8152 flags */ + enum rtl8152_flags { +@@ -795,6 +793,7 @@ struct r8152 { + bool (*in_nway)(struct r8152 *tp); + void (*hw_phy_cfg)(struct r8152 *tp); + void (*autosuspend_en)(struct r8152 *tp, bool enable); ++ void (*change_mtu)(struct r8152 *tp); + } rtl_ops; + + struct ups_info { +@@ -1021,8 +1020,7 @@ enum tx_csum_stat { + static const int multicast_filter_limit = 32; + static unsigned int agg_buf_sz = 16384; + +-#define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \ +- VLAN_ETH_HLEN - ETH_FCS_LEN) ++#define RTL_LIMITED_TSO_SIZE (size_to_mtu(agg_buf_sz) - sizeof(struct tx_desc)) + + static + int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data) +@@ -2632,10 +2630,7 @@ static void rtl8152_nic_reset(struct r8152 *tp) + + static void set_tx_qlen(struct r8152 *tp) + { +- struct net_device *netdev = tp->netdev; +- +- tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN + +- sizeof(struct tx_desc)); ++ tp->tx_qlen = agg_buf_sz / (mtu_to_size(tp->netdev->mtu) + sizeof(struct tx_desc)); + } + + static inline u8 rtl8152_get_speed(struct r8152 *tp) +@@ -4724,6 +4719,12 @@ static void r8153b_hw_phy_cfg(struct r8152 *tp) + set_bit(PHY_RESET, &tp->flags); + } + ++static void rtl8153_change_mtu(struct r8152 *tp) ++{ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, mtu_to_size(tp->netdev->mtu)); ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO); ++} ++ + static void r8153_first_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -4756,9 +4757,7 @@ static void r8153_first_init(struct r8152 *tp) + + rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX); + +- ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data); +- ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO); ++ rtl8153_change_mtu(tp); + + ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0); + ocp_data |= TCR0_AUTO_FIFO; +@@ -4793,8 +4792,7 @@ static void r8153_enter_oob(struct r8152 *tp) + + wait_oob_link_list_ready(tp); + +- ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, mtu_to_size(tp->netdev->mtu)); + + switch (tp->version) { + case RTL_VER_03: +@@ -6494,12 +6492,21 @@ static int rtl8152_change_mtu(struct net_device *dev, int new_mtu) + dev->mtu = new_mtu; + + if (netif_running(dev)) { +- u32 rms = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; +- +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms); ++ if (tp->rtl_ops.change_mtu) ++ tp->rtl_ops.change_mtu(tp); + +- if (netif_carrier_ok(dev)) +- r8153_set_rx_early_size(tp); ++ if (netif_carrier_ok(dev)) { ++ netif_stop_queue(dev); ++ napi_disable(&tp->napi); ++ tasklet_disable(&tp->tx_tl); ++ tp->rtl_ops.disable(tp); ++ tp->rtl_ops.enable(tp); ++ rtl_start_rx(tp); ++ tasklet_enable(&tp->tx_tl); ++ napi_enable(&tp->napi); ++ rtl8152_set_rx_mode(dev); ++ netif_wake_queue(dev); ++ } + } + + mutex_unlock(&tp->control); +@@ -6588,6 +6595,7 @@ static int rtl_ops_init(struct r8152 *tp) + ops->in_nway = rtl8153_in_nway; + ops->hw_phy_cfg = r8153_hw_phy_cfg; + ops->autosuspend_en = rtl8153_runtime_enable; ++ ops->change_mtu = rtl8153_change_mtu; + if (tp->udev->speed < USB_SPEED_SUPER) + tp->rx_buf_sz = 16 * 1024; + else +@@ -6609,6 +6617,7 @@ static int rtl_ops_init(struct r8152 *tp) + ops->in_nway = rtl8153_in_nway; + ops->hw_phy_cfg = r8153b_hw_phy_cfg; + ops->autosuspend_en = rtl8153b_runtime_enable; ++ ops->change_mtu = rtl8153_change_mtu; + tp->rx_buf_sz = 32 * 1024; + tp->eee_en = true; + tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX; +@@ -6829,7 +6838,7 @@ static int rtl8152_probe(struct usb_interface *intf, + netdev->max_mtu = ETH_DATA_LEN; + break; + default: +- netdev->max_mtu = RTL8153_MAX_MTU; ++ netdev->max_mtu = size_to_mtu(9 * 1024); + break; + } + +-- +2.18.4 + + +From eb672651da818d2be3e6aaa006aaf15467f5457b Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 16 Apr 2021 16:04:35 +0800 +Subject: [PATCH 611/661] r8152: support new chips + +commit 195aae321c829dd1945900d75561e6aa79cce208 upstream. + +Support RTL8153C, RTL8153D, RTL8156A, and RTL8156B. The RTL8156A +and RTL8156B are the 2.5G ethernet. + +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +--- + drivers/net/usb/r8152.c | 2634 +++++++++++++++++++++++++++++++++++---- + 1 file changed, 2359 insertions(+), 275 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 3f465242a4f0..72b8ef0ad5a1 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -43,10 +43,14 @@ + + #define PLA_IDR 0xc000 + #define PLA_RCR 0xc010 ++#define PLA_RCR1 0xc012 + #define PLA_RMS 0xc016 + #define PLA_RXFIFO_CTRL0 0xc0a0 ++#define PLA_RXFIFO_FULL 0xc0a2 + #define PLA_RXFIFO_CTRL1 0xc0a4 ++#define PLA_RX_FIFO_FULL 0xc0a6 + #define PLA_RXFIFO_CTRL2 0xc0a8 ++#define PLA_RX_FIFO_EMPTY 0xc0aa + #define PLA_DMY_REG0 0xc0b0 + #define PLA_FMC 0xc0b4 + #define PLA_CFG_WOL 0xc0b6 +@@ -63,6 +67,8 @@ + #define PLA_MACDBG_PRE 0xd38c /* RTL_VER_04 only */ + #define PLA_MACDBG_POST 0xd38e /* RTL_VER_04 only */ + #define PLA_EXTRA_STATUS 0xd398 ++#define PLA_GPHY_CTRL 0xd3ae ++#define PLA_POL_GPIO_CTRL 0xdc6a + #define PLA_EFUSE_DATA 0xdd00 + #define PLA_EFUSE_CMD 0xdd02 + #define PLA_LEDSEL 0xdd90 +@@ -72,6 +78,8 @@ + #define PLA_LWAKE_CTRL_REG 0xe007 + #define PLA_GPHY_INTR_IMR 0xe022 + #define PLA_EEE_CR 0xe040 ++#define PLA_EEE_TXTWSYS 0xe04c ++#define PLA_EEE_TXTWSYS_2P5G 0xe058 + #define PLA_EEEP_CR 0xe080 + #define PLA_MAC_PWR_CTRL 0xe0c0 + #define PLA_MAC_PWR_CTRL2 0xe0ca +@@ -82,6 +90,7 @@ + #define PLA_TCR1 0xe612 + #define PLA_MTPS 0xe615 + #define PLA_TXFIFO_CTRL 0xe618 ++#define PLA_TXFIFO_FULL 0xe61a + #define PLA_RSTTALLY 0xe800 + #define PLA_CR 0xe813 + #define PLA_CRWECR 0xe81c +@@ -98,6 +107,7 @@ + #define PLA_SFF_STS_7 0xe8de + #define PLA_PHYSTATUS 0xe908 + #define PLA_CONFIG6 0xe90a /* CONFIG6 */ ++#define PLA_USB_CFG 0xe952 + #define PLA_BP_BA 0xfc26 + #define PLA_BP_0 0xfc28 + #define PLA_BP_1 0xfc2a +@@ -112,6 +122,7 @@ + #define USB_USB2PHY 0xb41e + #define USB_SSPHYLINK1 0xb426 + #define USB_SSPHYLINK2 0xb428 ++#define USB_L1_CTRL 0xb45e + #define USB_U2P3_CTRL 0xb460 + #define USB_CSR_DUMMY1 0xb464 + #define USB_CSR_DUMMY2 0xb466 +@@ -122,7 +133,12 @@ + #define USB_FW_FIX_EN0 0xcfca + #define USB_FW_FIX_EN1 0xcfcc + #define USB_LPM_CONFIG 0xcfd8 ++#define USB_ECM_OPTION 0xcfee + #define USB_CSTMR 0xcfef /* RTL8153A */ ++#define USB_MISC_2 0xcfff ++#define USB_ECM_OP 0xd26b ++#define USB_GPHY_CTRL 0xd284 ++#define USB_SPEED_OPTION 0xd32a + #define USB_FW_CTRL 0xd334 /* RTL8153B */ + #define USB_FC_TIMER 0xd340 + #define USB_USB_CTRL 0xd406 +@@ -136,16 +152,20 @@ + #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */ + #define USB_TX_DMA 0xd434 + #define USB_UPT_RXDMA_OWN 0xd437 ++#define USB_UPHY3_MDCMDIO 0xd480 + #define USB_TOLERANCE 0xd490 + #define USB_LPM_CTRL 0xd41a + #define USB_BMU_RESET 0xd4b0 ++#define USB_BMU_CONFIG 0xd4b4 + #define USB_U1U2_TIMER 0xd4da + #define USB_FW_TASK 0xd4e8 /* RTL8153B */ ++#define USB_RX_AGGR_NUM 0xd4ee + #define USB_UPS_CTRL 0xd800 + #define USB_POWER_CUT 0xd80a + #define USB_MISC_0 0xd81a + #define USB_MISC_1 0xd81f + #define USB_AFE_CTRL2 0xd824 ++#define USB_UPHY_XTAL 0xd826 + #define USB_UPS_CFG 0xd842 + #define USB_UPS_FLAGS 0xd848 + #define USB_WDT1_CTRL 0xe404 +@@ -188,6 +208,9 @@ + #define OCP_EEE_ABLE 0xa5c4 + #define OCP_EEE_ADV 0xa5d0 + #define OCP_EEE_LPABLE 0xa5d2 ++#define OCP_10GBT_CTRL 0xa5d4 ++#define OCP_10GBT_STAT 0xa5d6 ++#define OCP_EEE_ADV2 0xa6d4 + #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */ + #define OCP_PHY_PATCH_STAT 0xb800 + #define OCP_PHY_PATCH_CMD 0xb820 +@@ -199,6 +222,7 @@ + /* SRAM Register */ + #define SRAM_GREEN_CFG 0x8011 + #define SRAM_LPF_CFG 0x8012 ++#define SRAM_GPHY_FW_VER 0x801e + #define SRAM_10M_AMP1 0x8080 + #define SRAM_10M_AMP2 0x8082 + #define SRAM_IMPEDANCE 0x8084 +@@ -210,11 +234,19 @@ + #define RCR_AM 0x00000004 + #define RCR_AB 0x00000008 + #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB) ++#define SLOT_EN BIT(11) ++ ++/* PLA_RCR1 */ ++#define OUTER_VLAN BIT(7) ++#define INNER_VLAN BIT(6) + + /* PLA_RXFIFO_CTRL0 */ + #define RXFIFO_THR1_NORMAL 0x00080002 + #define RXFIFO_THR1_OOB 0x01800003 + ++/* PLA_RXFIFO_FULL */ ++#define RXFIFO_FULL_MASK 0xfff ++ + /* PLA_RXFIFO_CTRL1 */ + #define RXFIFO_THR2_FULL 0x00000060 + #define RXFIFO_THR2_HIGH 0x00000038 +@@ -285,6 +317,7 @@ + #define MCU_BORW_EN 0x4000 + + /* PLA_CPCR */ ++#define FLOW_CTRL_EN BIT(0) + #define CPCR_RX_VLAN 0x0040 + + /* PLA_CFG_WOL */ +@@ -310,6 +343,10 @@ + /* PLA_CONFIG6 */ + #define LANWAKE_CLR_EN BIT(0) + ++/* PLA_USB_CFG */ ++#define EN_XG_LIP BIT(1) ++#define EN_G_LIP BIT(2) ++ + /* PLA_CONFIG5 */ + #define BWF_EN 0x0040 + #define MWF_EN 0x0020 +@@ -333,6 +370,7 @@ + /* PLA_MAC_PWR_CTRL2 */ + #define EEE_SPDWN_RATIO 0x8007 + #define MAC_CLK_SPDWN_EN BIT(15) ++#define EEE_SPDWN_RATIO_MASK 0xff + + /* PLA_MAC_PWR_CTRL3 */ + #define PLA_MCU_SPDWN_EN BIT(14) +@@ -345,6 +383,7 @@ + #define PWRSAVE_SPDWN_EN 0x1000 + #define RXDV_SPDWN_EN 0x0800 + #define TX10MIDLE_EN 0x0100 ++#define IDLE_SPDWN_EN BIT(6) + #define TP100_SPDWN_EN 0x0020 + #define TP500_SPDWN_EN 0x0010 + #define TP1000_SPDWN_EN 0x0008 +@@ -385,6 +424,13 @@ + #define LINK_CHANGE_FLAG BIT(8) + #define POLL_LINK_CHG BIT(0) + ++/* PLA_GPHY_CTRL */ ++#define GPHY_FLASH BIT(1) ++ ++/* PLA_POL_GPIO_CTRL */ ++#define DACK_DET_EN BIT(15) ++#define POL_GPHY_PATCH BIT(4) ++ + /* USB_USB2PHY */ + #define USB2PHY_SUSPEND 0x0001 + #define USB2PHY_L1 0x0002 +@@ -433,6 +479,9 @@ + #define BMU_RESET_EP_IN 0x01 + #define BMU_RESET_EP_OUT 0x02 + ++/* USB_BMU_CONFIG */ ++#define ACT_ODMA BIT(1) ++ + /* USB_UPT_RXDMA_OWN */ + #define OWN_UPDATE BIT(0) + #define OWN_CLEAR BIT(1) +@@ -440,27 +489,52 @@ + /* USB_FW_TASK */ + #define FC_PATCH_TASK BIT(1) + ++/* USB_RX_AGGR_NUM */ ++#define RX_AGGR_NUM_MASK 0x1ff ++ + /* USB_UPS_CTRL */ + #define POWER_CUT 0x0100 + + /* USB_PM_CTRL_STATUS */ + #define RESUME_INDICATE 0x0001 + ++/* USB_ECM_OPTION */ ++#define BYPASS_MAC_RESET BIT(5) ++ + /* USB_CSTMR */ + #define FORCE_SUPER BIT(0) + ++/* USB_MISC_2 */ ++#define UPS_FORCE_PWR_DOWN BIT(0) ++ ++/* USB_ECM_OP */ ++#define EN_ALL_SPEED BIT(0) ++ ++/* USB_GPHY_CTRL */ ++#define GPHY_PATCH_DONE BIT(2) ++#define BYPASS_FLASH BIT(5) ++#define BACKUP_RESTRORE BIT(6) ++ ++/* USB_SPEED_OPTION */ ++#define RG_PWRDN_EN BIT(8) ++#define ALL_SPEED_OFF BIT(9) ++ + /* USB_FW_CTRL */ + #define FLOW_CTRL_PATCH_OPT BIT(1) ++#define AUTO_SPEEDUP BIT(3) ++#define FLOW_CTRL_PATCH_2 BIT(8) + + /* USB_FC_TIMER */ + #define CTRL_TIMER_EN BIT(15) + + /* USB_USB_CTRL */ ++#define CDC_ECM_EN BIT(3) + #define RX_AGG_DISABLE 0x0010 + #define RX_ZERO_EN 0x0080 + + /* USB_U2P3_CTRL */ + #define U2P3_ENABLE 0x0001 ++#define RX_DETECT8 BIT(3) + + /* USB_POWER_CUT */ + #define PWR_EN 0x0001 +@@ -496,8 +570,12 @@ + #define SEN_VAL_NORMAL 0xa000 + #define SEL_RXIDLE 0x0100 + ++/* USB_UPHY_XTAL */ ++#define OOBS_POLLING BIT(8) ++ + /* USB_UPS_CFG */ + #define SAW_CNT_1MS_MASK 0x0fff ++#define MID_REVERSE BIT(5) /* RTL8156A */ + + /* USB_UPS_FLAGS */ + #define UPS_FLAGS_R_TUNE BIT(0) +@@ -505,6 +583,7 @@ + #define UPS_FLAGS_250M_CKDIV BIT(2) + #define UPS_FLAGS_EN_ALDPS BIT(3) + #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4) ++#define UPS_FLAGS_SPEED_MASK (0xf << 16) + #define ups_flags_speed(x) ((x) << 16) + #define UPS_FLAGS_EN_EEE BIT(20) + #define UPS_FLAGS_EN_500M_EEE BIT(21) +@@ -525,6 +604,8 @@ enum spd_duplex { + FORCE_10M_FULL, + FORCE_100M_HALF, + FORCE_100M_FULL, ++ FORCE_1000M_FULL, ++ NWAY_2500M_FULL, + }; + + /* OCP_ALDPS_CONFIG */ +@@ -589,6 +670,9 @@ enum spd_duplex { + #define EN_10M_CLKDIV BIT(11) + #define EN_10M_BGOFF 0x0080 + ++/* OCP_10GBT_CTRL */ ++#define RTL_ADV2_5G_F_R BIT(5) /* Advertise 2.5GBASE-T fast-retrain */ ++ + /* OCP_PHY_STATE */ + #define TXDIS_STATE 0x01 + #define ABD_STATE 0x02 +@@ -608,7 +692,8 @@ enum spd_duplex { + #define EN_EMI_L 0x0040 + + /* OCP_SYSCLK_CFG */ +-#define clk_div_expo(x) (min(x, 5) << 8) ++#define sysclk_div_expo(x) (min(x, 5) << 8) ++#define clk_div_expo(x) (min(x, 5) << 4) + + /* SRAM_GREEN_CFG */ + #define GREEN_ETH_EN BIT(15) +@@ -639,6 +724,11 @@ enum spd_duplex { + #define BP4_SUPER_ONLY 0x1578 /* RTL_VER_04 only */ + + enum rtl_register_content { ++ _2500bps = BIT(10), ++ _1250bps = BIT(9), ++ _500bps = BIT(8), ++ _tx_flow = BIT(6), ++ _rx_flow = BIT(5), + _1000bps = 0x10, + _100bps = 0x08, + _10bps = 0x04, +@@ -646,6 +736,9 @@ enum rtl_register_content { + FULL_DUP = 0x01, + }; + ++#define is_speed_2500(_speed) (((_speed) & (_2500bps | LINK_STATUS)) == (_2500bps | LINK_STATUS)) ++#define is_flow_control(_speed) (((_speed) & (_tx_flow | _rx_flow)) == (_tx_flow | _rx_flow)) ++ + #define RTL8152_MAX_TX 4 + #define RTL8152_MAX_RX 10 + #define INTBUFSIZE 2 +@@ -660,7 +753,6 @@ enum rtl_register_content { + #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) + #define RTL8153_RMS RTL8153_MAX_PACKET + #define RTL8152_TX_TIMEOUT (5 * HZ) +-#define RTL8152_NAPI_WEIGHT 64 + #define mtu_to_size(m) ((m) + VLAN_ETH_HLEN + ETH_FCS_LEN) + #define size_to_mtu(s) ((s) - VLAN_ETH_HLEN - ETH_FCS_LEN) + #define rx_reserved_size(x) (mtu_to_size(x) + sizeof(struct rx_desc) + RX_ALIGN) +@@ -797,6 +889,7 @@ struct r8152 { + } rtl_ops; + + struct ups_info { ++ u32 r_tune:1; + u32 _10m_ckdiv:1; + u32 _250m_ckdiv:1; + u32 aldps:1; +@@ -838,7 +931,9 @@ struct r8152 { + u32 rx_buf_sz; + u32 rx_copybreak; + u32 rx_pending; ++ u32 fc_pause_on, fc_pause_off; + ++ u32 support_2500full:1; + u16 ocp_base; + u16 speed; + u16 eee_adv; +@@ -998,6 +1093,15 @@ enum rtl_version { + RTL_VER_07, + RTL_VER_08, + RTL_VER_09, ++ ++ RTL_TEST_01, ++ RTL_VER_10, ++ RTL_VER_11, ++ RTL_VER_12, ++ RTL_VER_13, ++ RTL_VER_14, ++ RTL_VER_15, ++ + RTL_VER_MAX + }; + +@@ -1013,6 +1117,7 @@ enum tx_csum_stat { + #define RTL_ADVERTISED_100_FULL BIT(3) + #define RTL_ADVERTISED_1000_HALF BIT(4) + #define RTL_ADVERTISED_1000_FULL BIT(5) ++#define RTL_ADVERTISED_2500_FULL BIT(6) + + /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). + * The RTL chips use a 64 element hash table based on the Ethernet CRC. +@@ -2606,7 +2711,7 @@ static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb, + + static void r8152b_reset_packet_filter(struct r8152 *tp) + { +- u32 ocp_data; ++ u32 ocp_data; + + ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC); + ocp_data &= ~FMC_FCR_MCU_EN; +@@ -2617,14 +2722,47 @@ static void r8152b_reset_packet_filter(struct r8152 *tp) + + static void rtl8152_nic_reset(struct r8152 *tp) + { +- int i; ++ u32 ocp_data; ++ int i; + +- ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST); ++ switch (tp->version) { ++ case RTL_TEST_01: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR); ++ ocp_data &= ~CR_TE; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_BMU_RESET); ++ ocp_data &= ~BMU_RESET_EP_IN; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); ++ ocp_data |= CDC_ECM_EN; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR); ++ ocp_data &= ~CR_RE; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_BMU_RESET); ++ ocp_data |= BMU_RESET_EP_IN; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); ++ ocp_data &= ~CDC_ECM_EN; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ break; + +- for (i = 0; i < 1000; i++) { +- if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST)) +- break; +- usleep_range(100, 400); ++ default: ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST); ++ ++ for (i = 0; i < 1000; i++) { ++ if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST)) ++ break; ++ usleep_range(100, 400); ++ } ++ break; + } + } + +@@ -2633,9 +2771,9 @@ static void set_tx_qlen(struct r8152 *tp) + tp->tx_qlen = agg_buf_sz / (mtu_to_size(tp->netdev->mtu) + sizeof(struct tx_desc)); + } + +-static inline u8 rtl8152_get_speed(struct r8152 *tp) ++static inline u16 rtl8152_get_speed(struct r8152 *tp) + { +- return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS); ++ return ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHYSTATUS); + } + + static void rtl_eee_plus_en(struct r8152 *tp, bool enable) +@@ -2795,6 +2933,7 @@ static int rtl_enable(struct r8152 *tp) + switch (tp->version) { + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_14: + r8153b_rx_agg_chg_indicate(tp); + break; + default: +@@ -2832,6 +2971,7 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp) + + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_14: + /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout + * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns. + */ +@@ -2841,6 +2981,18 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp) + ocp_data); + break; + ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ++ 640 / 8); ++ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR, ++ ocp_data); ++ r8153b_rx_agg_chg_indicate(tp); ++ break; ++ + default: + break; + } +@@ -2860,8 +3012,19 @@ static void r8153_set_rx_early_size(struct r8152 *tp) + break; + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_14: ++ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ++ ocp_data / 8); ++ break; ++ case RTL_TEST_01: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: + ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, + ocp_data / 8); ++ r8153b_rx_agg_chg_indicate(tp); + break; + default: + WARN_ON_ONCE(1); +@@ -2871,6 +3034,8 @@ static void r8153_set_rx_early_size(struct r8152 *tp) + + static int rtl8153_enable(struct r8152 *tp) + { ++ u32 ocp_data; ++ + if (test_bit(RTL8152_UNPLUG, &tp->flags)) + return -ENODEV; + +@@ -2881,15 +3046,18 @@ static int rtl8153_enable(struct r8152 *tp) + + rtl_set_ifg(tp, rtl8152_get_speed(tp)); + +- if (tp->version == RTL_VER_09) { +- u32 ocp_data; +- ++ switch (tp->version) { ++ case RTL_VER_09: ++ case RTL_VER_14: + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_TASK); + ocp_data &= ~FC_PATCH_TASK; + ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); + usleep_range(1000, 2000); + ocp_data |= FC_PATCH_TASK; + ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ break; ++ default: ++ break; + } + + return rtl_enable(tp); +@@ -2954,12 +3122,40 @@ static void rtl_rx_vlan_en(struct r8152 *tp, bool enable) + { + u32 ocp_data; + +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); +- if (enable) +- ocp_data |= CPCR_RX_VLAN; +- else +- ocp_data &= ~CPCR_RX_VLAN; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); ++ switch (tp->version) { ++ case RTL_VER_01: ++ case RTL_VER_02: ++ case RTL_VER_03: ++ case RTL_VER_04: ++ case RTL_VER_05: ++ case RTL_VER_06: ++ case RTL_VER_07: ++ case RTL_VER_08: ++ case RTL_VER_09: ++ case RTL_VER_14: ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); ++ if (enable) ++ ocp_data |= CPCR_RX_VLAN; ++ else ++ ocp_data &= ~CPCR_RX_VLAN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); ++ break; ++ ++ case RTL_TEST_01: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ default: ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RCR1); ++ if (enable) ++ ocp_data |= OUTER_VLAN | INNER_VLAN; ++ else ++ ocp_data &= ~(OUTER_VLAN | INNER_VLAN); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RCR1, ocp_data); ++ break; ++ } + } + + static int rtl8152_set_features(struct net_device *dev, +@@ -3052,6 +3248,40 @@ static void __rtl_set_wol(struct r8152 *tp, u32 wolopts) + device_set_wakeup_enable(&tp->udev->dev, false); + } + ++static void r8153_mac_clk_speed_down(struct r8152 *tp, bool enable) ++{ ++ u32 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2); ++ ++ /* MAC clock speed down */ ++ if (enable) ++ ocp_data |= MAC_CLK_SPDWN_EN; ++ else ++ ocp_data &= ~MAC_CLK_SPDWN_EN; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data); ++} ++ ++static void r8156_mac_clk_spd(struct r8152 *tp, bool enable) ++{ ++ u32 ocp_data; ++ ++ /* MAC clock speed down */ ++ if (enable) { ++ /* aldps_spdwn_ratio, tp10_spdwn_ratio */ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ++ 0x0403); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2); ++ ocp_data &= ~EEE_SPDWN_RATIO_MASK; ++ ocp_data |= MAC_CLK_SPDWN_EN | 0x03; /* eee_spdwn_ratio */ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data); ++ } else { ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2); ++ ocp_data &= ~MAC_CLK_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data); ++ } ++} ++ + static void r8153_u1u2en(struct r8152 *tp, bool enable) + { + u8 u1u2[8]; +@@ -3111,6 +3341,9 @@ static void r8153b_ups_flags(struct r8152 *tp) + if (tp->ups_info.eee_cmod_lv) + ups_flags |= UPS_FLAGS_EEE_CMOD_LV_EN; + ++ if (tp->ups_info.r_tune) ++ ups_flags |= UPS_FLAGS_R_TUNE; ++ + if (tp->ups_info._10m_ckdiv) + ups_flags |= UPS_FLAGS_EN_10M_CKDIV; + +@@ -3161,6 +3394,88 @@ static void r8153b_ups_flags(struct r8152 *tp) + ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ups_flags); + } + ++static void r8156_ups_flags(struct r8152 *tp) ++{ ++ u32 ups_flags = 0; ++ ++ if (tp->ups_info.green) ++ ups_flags |= UPS_FLAGS_EN_GREEN; ++ ++ if (tp->ups_info.aldps) ++ ups_flags |= UPS_FLAGS_EN_ALDPS; ++ ++ if (tp->ups_info.eee) ++ ups_flags |= UPS_FLAGS_EN_EEE; ++ ++ if (tp->ups_info.flow_control) ++ ups_flags |= UPS_FLAGS_EN_FLOW_CTR; ++ ++ if (tp->ups_info.eee_ckdiv) ++ ups_flags |= UPS_FLAGS_EN_EEE_CKDIV; ++ ++ if (tp->ups_info._10m_ckdiv) ++ ups_flags |= UPS_FLAGS_EN_10M_CKDIV; ++ ++ if (tp->ups_info.eee_plloff_100) ++ ups_flags |= UPS_FLAGS_EEE_PLLOFF_100; ++ ++ if (tp->ups_info.eee_plloff_giga) ++ ups_flags |= UPS_FLAGS_EEE_PLLOFF_GIGA; ++ ++ if (tp->ups_info._250m_ckdiv) ++ ups_flags |= UPS_FLAGS_250M_CKDIV; ++ ++ switch (tp->ups_info.speed_duplex) { ++ case FORCE_10M_HALF: ++ ups_flags |= ups_flags_speed(0); ++ break; ++ case FORCE_10M_FULL: ++ ups_flags |= ups_flags_speed(1); ++ break; ++ case FORCE_100M_HALF: ++ ups_flags |= ups_flags_speed(2); ++ break; ++ case FORCE_100M_FULL: ++ ups_flags |= ups_flags_speed(3); ++ break; ++ case NWAY_10M_HALF: ++ ups_flags |= ups_flags_speed(4); ++ break; ++ case NWAY_10M_FULL: ++ ups_flags |= ups_flags_speed(5); ++ break; ++ case NWAY_100M_HALF: ++ ups_flags |= ups_flags_speed(6); ++ break; ++ case NWAY_100M_FULL: ++ ups_flags |= ups_flags_speed(7); ++ break; ++ case NWAY_1000M_FULL: ++ ups_flags |= ups_flags_speed(8); ++ break; ++ case NWAY_2500M_FULL: ++ ups_flags |= ups_flags_speed(9); ++ break; ++ default: ++ break; ++ } ++ ++ switch (tp->ups_info.lite_mode) { ++ case 1: ++ ups_flags |= 0 << 5; ++ break; ++ case 2: ++ ups_flags |= 2 << 5; ++ break; ++ case 0: ++ default: ++ ups_flags |= 1 << 5; ++ break; ++ } ++ ++ ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ups_flags); ++} ++ + static void rtl_green_en(struct r8152 *tp, bool enable) + { + u16 data; +@@ -3224,16 +3539,56 @@ static void r8153b_ups_en(struct r8152 *tp, bool enable) + ocp_data |= UPS_EN | USP_PREWAKE | PHASE2_EN; + ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); + +- ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff); +- ocp_data |= BIT(0); +- ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data); ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data |= UPS_FORCE_PWR_DOWN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); ++ } else { ++ ocp_data &= ~(UPS_EN | USP_PREWAKE); ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data &= ~UPS_FORCE_PWR_DOWN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); ++ ++ if (ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0) & PCUT_STATUS) { ++ int i; ++ ++ for (i = 0; i < 500; i++) { ++ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & ++ AUTOLOAD_DONE) ++ break; ++ msleep(20); ++ } ++ ++ tp->rtl_ops.hw_phy_cfg(tp); ++ ++ rtl8152_set_speed(tp, tp->autoneg, tp->speed, ++ tp->duplex, tp->advertising); ++ } ++ } ++} ++ ++static void r8153c_ups_en(struct r8152 *tp, bool enable) ++{ ++ u32 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT); ++ ++ if (enable) { ++ r8153b_ups_flags(tp); ++ ++ ocp_data |= UPS_EN | USP_PREWAKE | PHASE2_EN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data |= UPS_FORCE_PWR_DOWN; ++ ocp_data &= ~BIT(7); ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); + } else { + ocp_data &= ~(UPS_EN | USP_PREWAKE); + ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); + +- ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff); +- ocp_data &= ~BIT(0); +- ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data); ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data &= ~UPS_FORCE_PWR_DOWN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); + + if (ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0) & PCUT_STATUS) { + int i; +@@ -3250,6 +3605,55 @@ static void r8153b_ups_en(struct r8152 *tp, bool enable) + rtl8152_set_speed(tp, tp->autoneg, tp->speed, + tp->duplex, tp->advertising); + } ++ ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34); ++ ocp_data |= BIT(8); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data); ++ ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); ++ } ++} ++ ++static void r8156_ups_en(struct r8152 *tp, bool enable) ++{ ++ u32 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT); ++ ++ if (enable) { ++ r8156_ups_flags(tp); ++ ++ ocp_data |= UPS_EN | USP_PREWAKE | PHASE2_EN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data |= UPS_FORCE_PWR_DOWN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); ++ ++ switch (tp->version) { ++ case RTL_VER_13: ++ case RTL_VER_15: ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPHY_XTAL); ++ ocp_data &= ~OOBS_POLLING; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_UPHY_XTAL, ocp_data); ++ break; ++ default: ++ break; ++ } ++ } else { ++ ocp_data &= ~(UPS_EN | USP_PREWAKE); ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data &= ~UPS_FORCE_PWR_DOWN; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); ++ ++ if (ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0) & PCUT_STATUS) { ++ tp->rtl_ops.hw_phy_cfg(tp); ++ ++ rtl8152_set_speed(tp, tp->autoneg, tp->speed, ++ tp->duplex, tp->advertising); ++ } + } + } + +@@ -3382,34 +3786,71 @@ static void rtl8153b_runtime_enable(struct r8152 *tp, bool enable) + } + } + +-static void r8153_teredo_off(struct r8152 *tp) ++static void rtl8153c_runtime_enable(struct r8152 *tp, bool enable) + { +- u32 ocp_data; ++ if (enable) { ++ r8153_queue_wake(tp, true); ++ r8153b_u1u2en(tp, false); ++ r8153_u2p3en(tp, false); ++ rtl_runtime_suspend_enable(tp, true); ++ r8153c_ups_en(tp, true); ++ } else { ++ r8153c_ups_en(tp, false); ++ r8153_queue_wake(tp, false); ++ rtl_runtime_suspend_enable(tp, false); ++ r8153b_u1u2en(tp, true); ++ } ++} + +- switch (tp->version) { +- case RTL_VER_01: +- case RTL_VER_02: +- case RTL_VER_03: +- case RTL_VER_04: +- case RTL_VER_05: +- case RTL_VER_06: +- case RTL_VER_07: +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG); +- ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | +- OOB_TEREDO_EN); +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data); +- break; ++static void rtl8156_runtime_enable(struct r8152 *tp, bool enable) ++{ ++ if (enable) { ++ r8153_queue_wake(tp, true); ++ r8153b_u1u2en(tp, false); ++ r8153_u2p3en(tp, false); ++ rtl_runtime_suspend_enable(tp, true); ++ } else { ++ r8153_queue_wake(tp, false); ++ rtl_runtime_suspend_enable(tp, false); ++ r8153_u2p3en(tp, true); ++ if (tp->udev->speed >= USB_SPEED_SUPER) ++ r8153b_u1u2en(tp, true); ++ } ++} ++ ++static void r8153_teredo_off(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ ++ switch (tp->version) { ++ case RTL_VER_01: ++ case RTL_VER_02: ++ case RTL_VER_03: ++ case RTL_VER_04: ++ case RTL_VER_05: ++ case RTL_VER_06: ++ case RTL_VER_07: ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG); ++ ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | ++ OOB_TEREDO_EN); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data); ++ break; + + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_TEST_01: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_14: ++ case RTL_VER_15: ++ default: + /* The bit 0 ~ 7 are relative with teredo settings. They are + * W1C (write 1 to clear), so set all 1 to disable it. + */ + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff); + break; +- +- default: +- break; + } + + ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE); +@@ -3444,6 +3885,12 @@ static void rtl_clear_bp(struct r8152 *tp, u16 type) + break; + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_14: ++ case RTL_VER_15: + default: + if (type == MCU_TYPE_USB) { + ocp_write_byte(tp, MCU_TYPE_USB, USB_BP2_EN, 0); +@@ -3653,6 +4100,11 @@ static bool rtl8152_is_fw_mac_ok(struct r8152 *tp, struct fw_mac *mac) + case RTL_VER_06: + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_14: ++ case RTL_VER_15: + fw_reg = 0xf800; + bp_ba_addr = PLA_BP_BA; + bp_en_addr = PLA_BP_EN; +@@ -3676,6 +4128,11 @@ static bool rtl8152_is_fw_mac_ok(struct r8152 *tp, struct fw_mac *mac) + break; + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_14: ++ case RTL_VER_15: + fw_reg = 0xe600; + bp_ba_addr = USB_BP_BA; + bp_en_addr = USB_BP2_EN; +@@ -4215,6 +4672,22 @@ static void r8153_eee_en(struct r8152 *tp, bool enable) + tp->ups_info.eee = enable; + } + ++static void r8156_eee_en(struct r8152 *tp, bool enable) ++{ ++ u16 config; ++ ++ r8153_eee_en(tp, enable); ++ ++ config = ocp_reg_read(tp, OCP_EEE_ADV2); ++ ++ if (enable) ++ config |= MDIO_EEE_2_5GT; ++ else ++ config &= ~MDIO_EEE_2_5GT; ++ ++ ocp_reg_write(tp, OCP_EEE_ADV2, config); ++} ++ + static void rtl_eee_enable(struct r8152 *tp, bool enable) + { + switch (tp->version) { +@@ -4236,6 +4709,7 @@ static void rtl_eee_enable(struct r8152 *tp, bool enable) + case RTL_VER_06: + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_14: + if (enable) { + r8153_eee_en(tp, true); + ocp_reg_write(tp, OCP_EEE_ADV, tp->eee_adv); +@@ -4244,6 +4718,19 @@ static void rtl_eee_enable(struct r8152 *tp, bool enable) + ocp_reg_write(tp, OCP_EEE_ADV, 0); + } + break; ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ if (enable) { ++ r8156_eee_en(tp, true); ++ ocp_reg_write(tp, OCP_EEE_ADV, tp->eee_adv); ++ } else { ++ r8156_eee_en(tp, false); ++ ocp_reg_write(tp, OCP_EEE_ADV, 0); ++ } ++ break; + default: + break; + } +@@ -4290,6 +4777,20 @@ static void wait_oob_link_list_ready(struct r8152 *tp) + } + } + ++static void r8156b_wait_loading_flash(struct r8152 *tp) ++{ ++ if ((ocp_read_word(tp, MCU_TYPE_PLA, PLA_GPHY_CTRL) & GPHY_FLASH) && ++ !(ocp_read_word(tp, MCU_TYPE_USB, USB_GPHY_CTRL) & BYPASS_FLASH)) { ++ int i; ++ ++ for (i = 0; i < 100; i++) { ++ if (ocp_read_word(tp, MCU_TYPE_USB, USB_GPHY_CTRL) & GPHY_PATCH_DONE) ++ break; ++ usleep_range(1000, 2000); ++ } ++ } ++} ++ + static void r8152b_exit_oob(struct r8152 *tp) + { + u32 ocp_data; +@@ -4340,7 +4841,7 @@ static void r8152b_exit_oob(struct r8152 *tp) + } + + /* TX share fifo free credit full threshold */ +- ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL); ++ ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2); + + ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD); + ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH); +@@ -4517,6 +5018,21 @@ static int r8153b_post_firmware_1(struct r8152 *tp) + return 0; + } + ++static int r8153c_post_firmware_1(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_CTRL); ++ ocp_data |= FLOW_CTRL_PATCH_2; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_CTRL, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_TASK); ++ ocp_data |= FC_PATCH_TASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ ++ return 0; ++} ++ + static void r8153_aldps_en(struct r8152 *tp, bool enable) + { + u16 data; +@@ -4719,6 +5235,13 @@ static void r8153b_hw_phy_cfg(struct r8152 *tp) + set_bit(PHY_RESET, &tp->flags); + } + ++static void r8153c_hw_phy_cfg(struct r8152 *tp) ++{ ++ r8153b_hw_phy_cfg(tp); ++ ++ tp->ups_info.r_tune = true; ++} ++ + static void rtl8153_change_mtu(struct r8152 *tp) + { + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, mtu_to_size(tp->netdev->mtu)); +@@ -4806,6 +5329,7 @@ static void r8153_enter_oob(struct r8152 *tp) + + case RTL_VER_08: + case RTL_VER_09: ++ case RTL_VER_14: + /* Clear teredo wake event. bit[15:8] is the teredo wakeup + * type. Set it to zero. bits[7:0] are the W1C bits about + * the events. Set them to all 1 to clear them. +@@ -4842,6 +5366,96 @@ static void rtl8153_disable(struct r8152 *tp) + r8153_aldps_en(tp, true); + } + ++static int rtl8156_enable(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 speed; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return -ENODEV; ++ ++ set_tx_qlen(tp); ++ rtl_set_eee_plus(tp); ++ r8153_set_rx_early_timeout(tp); ++ r8153_set_rx_early_size(tp); ++ ++ speed = rtl8152_get_speed(tp); ++ rtl_set_ifg(tp, speed); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4); ++ if (speed & _2500bps) ++ ocp_data &= ~IDLE_SPDWN_EN; ++ else ++ ocp_data |= IDLE_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data); ++ ++ if (speed & _1000bps) ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_TXTWSYS, 0x11); ++ else if (speed & _500bps) ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_TXTWSYS, 0x3d); ++ ++ if (tp->udev->speed == USB_SPEED_HIGH) { ++ /* USB 0xb45e[3:0] l1_nyet_hird */ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_L1_CTRL); ++ ocp_data &= ~0xf; ++ if (is_flow_control(speed)) ++ ocp_data |= 0xf; ++ else ++ ocp_data |= 0x1; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_L1_CTRL, ocp_data); ++ } ++ ++ return rtl_enable(tp); ++} ++ ++static int rtl8156b_enable(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 speed; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return -ENODEV; ++ ++ set_tx_qlen(tp); ++ rtl_set_eee_plus(tp); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_RX_AGGR_NUM); ++ ocp_data &= ~RX_AGGR_NUM_MASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_AGGR_NUM, ocp_data); ++ ++ r8153_set_rx_early_timeout(tp); ++ r8153_set_rx_early_size(tp); ++ ++ speed = rtl8152_get_speed(tp); ++ rtl_set_ifg(tp, speed); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4); ++ if (speed & _2500bps) ++ ocp_data &= ~IDLE_SPDWN_EN; ++ else ++ ocp_data |= IDLE_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data); ++ ++ if (tp->udev->speed == USB_SPEED_HIGH) { ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_L1_CTRL); ++ ocp_data &= ~0xf; ++ if (is_flow_control(speed)) ++ ocp_data |= 0xf; ++ else ++ ocp_data |= 0x1; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_L1_CTRL, ocp_data); ++ } ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_TASK); ++ ocp_data &= ~FC_PATCH_TASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ usleep_range(1000, 2000); ++ ocp_data |= FC_PATCH_TASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ ++ return rtl_enable(tp); ++} ++ + static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u32 speed, u8 duplex, + u32 advertising) + { +@@ -4890,58 +5504,73 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u32 speed, u8 duplex, + + tp->mii.force_media = 1; + } else { +- u16 anar, tmp1; ++ u16 orig, new1; + u32 support; + + support = RTL_ADVERTISED_10_HALF | RTL_ADVERTISED_10_FULL | + RTL_ADVERTISED_100_HALF | RTL_ADVERTISED_100_FULL; + +- if (tp->mii.supports_gmii) ++ if (tp->mii.supports_gmii) { + support |= RTL_ADVERTISED_1000_FULL; + ++ if (tp->support_2500full) ++ support |= RTL_ADVERTISED_2500_FULL; ++ } ++ + if (!(advertising & support)) + return -EINVAL; + +- anar = r8152_mdio_read(tp, MII_ADVERTISE); +- tmp1 = anar & ~(ADVERTISE_10HALF | ADVERTISE_10FULL | ++ orig = r8152_mdio_read(tp, MII_ADVERTISE); ++ new1 = orig & ~(ADVERTISE_10HALF | ADVERTISE_10FULL | + ADVERTISE_100HALF | ADVERTISE_100FULL); + if (advertising & RTL_ADVERTISED_10_HALF) { +- tmp1 |= ADVERTISE_10HALF; ++ new1 |= ADVERTISE_10HALF; + tp->ups_info.speed_duplex = NWAY_10M_HALF; + } + if (advertising & RTL_ADVERTISED_10_FULL) { +- tmp1 |= ADVERTISE_10FULL; ++ new1 |= ADVERTISE_10FULL; + tp->ups_info.speed_duplex = NWAY_10M_FULL; + } + + if (advertising & RTL_ADVERTISED_100_HALF) { +- tmp1 |= ADVERTISE_100HALF; ++ new1 |= ADVERTISE_100HALF; + tp->ups_info.speed_duplex = NWAY_100M_HALF; + } + if (advertising & RTL_ADVERTISED_100_FULL) { +- tmp1 |= ADVERTISE_100FULL; ++ new1 |= ADVERTISE_100FULL; + tp->ups_info.speed_duplex = NWAY_100M_FULL; + } + +- if (anar != tmp1) { +- r8152_mdio_write(tp, MII_ADVERTISE, tmp1); +- tp->mii.advertising = tmp1; ++ if (orig != new1) { ++ r8152_mdio_write(tp, MII_ADVERTISE, new1); ++ tp->mii.advertising = new1; + } + + if (tp->mii.supports_gmii) { +- u16 gbcr; +- +- gbcr = r8152_mdio_read(tp, MII_CTRL1000); +- tmp1 = gbcr & ~(ADVERTISE_1000FULL | ++ orig = r8152_mdio_read(tp, MII_CTRL1000); ++ new1 = orig & ~(ADVERTISE_1000FULL | + ADVERTISE_1000HALF); + + if (advertising & RTL_ADVERTISED_1000_FULL) { +- tmp1 |= ADVERTISE_1000FULL; ++ new1 |= ADVERTISE_1000FULL; + tp->ups_info.speed_duplex = NWAY_1000M_FULL; + } + +- if (gbcr != tmp1) +- r8152_mdio_write(tp, MII_CTRL1000, tmp1); ++ if (orig != new1) ++ r8152_mdio_write(tp, MII_CTRL1000, new1); ++ } ++ ++ if (tp->support_2500full) { ++ orig = ocp_reg_read(tp, OCP_10GBT_CTRL); ++ new1 = orig & ~MDIO_AN_10GBT_CTRL_ADV2_5G; ++ ++ if (advertising & RTL_ADVERTISED_2500_FULL) { ++ new1 |= MDIO_AN_10GBT_CTRL_ADV2_5G; ++ tp->ups_info.speed_duplex = NWAY_2500M_FULL; ++ } ++ ++ if (orig != new1) ++ ocp_reg_write(tp, OCP_10GBT_CTRL, new1); + } + + bmcr = BMCR_ANENABLE | BMCR_ANRESTART; +@@ -5097,116 +5726,363 @@ static void rtl8153b_down(struct r8152 *tp) + r8153_aldps_en(tp, true); + } + +-static bool rtl8152_in_nway(struct r8152 *tp) ++static void rtl8153c_change_mtu(struct r8152 *tp) + { +- u16 nway_state; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, mtu_to_size(tp->netdev->mtu)); ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, 10 * 1024 / 64); + +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000); +- tp->ocp_base = 0x2000; +- ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */ +- nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, 512 / 64); + +- /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */ +- if (nway_state & 0xc000) +- return false; ++ /* Adjust the tx fifo free credit full threshold, otherwise ++ * the fifo would be too small to send a jumbo frame packet. ++ */ ++ if (tp->netdev->mtu < 8000) ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TXFIFO_FULL, 2048 / 8); + else +- return true; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TXFIFO_FULL, 900 / 8); + } + +-static bool rtl8153_in_nway(struct r8152 *tp) ++static void rtl8153c_up(struct r8152 *tp) + { +- u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff; +- +- if (phy_state == TXDIS_STATE || phy_state == ABD_STATE) +- return false; +- else +- return true; +-} ++ u32 ocp_data; + +-static void set_carrier(struct r8152 *tp) +-{ +- struct net_device *netdev = tp->netdev; +- struct napi_struct *napi = &tp->napi; +- u8 speed; ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; + +- speed = rtl8152_get_speed(tp); ++ r8153b_u1u2en(tp, false); ++ r8153_u2p3en(tp, false); ++ r8153_aldps_en(tp, false); + +- if (speed & LINK_STATUS) { +- if (!netif_carrier_ok(netdev)) { +- tp->rtl_ops.enable(tp); +- netif_stop_queue(netdev); +- napi_disable(napi); +- netif_carrier_on(netdev); +- rtl_start_rx(tp); +- clear_bit(RTL8152_SET_RX_MODE, &tp->flags); +- _rtl8152_set_rx_mode(netdev); +- napi_enable(&tp->napi); +- netif_wake_queue(netdev); +- netif_info(tp, link, netdev, "carrier on\n"); +- } else if (netif_queue_stopped(netdev) && +- skb_queue_len(&tp->tx_queue) < tp->tx_qlen) { +- netif_wake_queue(netdev); +- } +- } else { +- if (netif_carrier_ok(netdev)) { +- netif_carrier_off(netdev); +- tasklet_disable(&tp->tx_tl); +- napi_disable(napi); +- tp->rtl_ops.disable(tp); +- napi_enable(napi); +- tasklet_enable(&tp->tx_tl); +- netif_info(tp, link, netdev, "carrier off\n"); +- } +- } +-} ++ rxdy_gated_en(tp, true); ++ r8153_teredo_off(tp); + +-static void rtl_work_func_t(struct work_struct *work) +-{ +- struct r8152 *tp = container_of(work, struct r8152, schedule.work); ++ ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); ++ ocp_data &= ~RCR_ACPT_ALL; ++ ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); + +- /* If the device is unplugged or !netif_running(), the workqueue +- * doesn't need to wake the device, and could return directly. +- */ +- if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev)) +- return; ++ rtl8152_nic_reset(tp); ++ rtl_reset_bmu(tp); + +- if (usb_autopm_get_interface(tp->intf) < 0) +- return; ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); ++ ocp_data &= ~NOW_IS_OOB; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); + +- if (!test_bit(WORK_ENABLE, &tp->flags)) +- goto out1; ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); ++ ocp_data &= ~MCU_BORW_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); + +- if (!mutex_trylock(&tp->control)) { +- schedule_delayed_work(&tp->schedule, 0); +- goto out1; +- } ++ wait_oob_link_list_ready(tp); + +- if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags)) +- set_carrier(tp); ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); ++ ocp_data |= RE_INIT_LL; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); + +- if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags)) +- _rtl8152_set_rx_mode(tp->netdev); ++ wait_oob_link_list_ready(tp); + +- /* don't schedule tasket before linking */ +- if (test_and_clear_bit(SCHEDULE_TASKLET, &tp->flags) && +- netif_carrier_ok(tp->netdev)) +- tasklet_schedule(&tp->tx_tl); ++ rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX); + +- mutex_unlock(&tp->control); ++ rtl8153c_change_mtu(tp); + +-out1: +- usb_autopm_put_interface(tp->intf); +-} ++ rtl8152_nic_reset(tp); + +-static void rtl_hw_phy_work_func_t(struct work_struct *work) +-{ +- struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work); ++ /* rx share fifo credit full threshold */ ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, 0x02); ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_RXFIFO_FULL, 0x08); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL); + +- if (test_bit(RTL8152_UNPLUG, &tp->flags)) +- return; ++ ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B); + +- if (usb_autopm_get_interface(tp->intf) < 0) +- return; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34); ++ ocp_data |= BIT(8); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data); ++ ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3); ++ ocp_data &= ~PLA_MCU_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); ++ ++ r8153_aldps_en(tp, true); ++ r8153b_u1u2en(tp, true); ++} ++ ++static inline u32 fc_pause_on_auto(struct r8152 *tp) ++{ ++ return (ALIGN(mtu_to_size(tp->netdev->mtu), 1024) + 6 * 1024); ++} ++ ++static inline u32 fc_pause_off_auto(struct r8152 *tp) ++{ ++ return (ALIGN(mtu_to_size(tp->netdev->mtu), 1024) + 14 * 1024); ++} ++ ++static void r8156_fc_parameter(struct r8152 *tp) ++{ ++ u32 pause_on = tp->fc_pause_on ? tp->fc_pause_on : fc_pause_on_auto(tp); ++ u32 pause_off = tp->fc_pause_off ? tp->fc_pause_off : fc_pause_off_auto(tp); ++ ++ switch (tp->version) { ++ case RTL_VER_10: ++ case RTL_VER_11: ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_FULL, pause_on / 8); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_EMPTY, pause_off / 8); ++ break; ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_FULL, pause_on / 16); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_EMPTY, pause_off / 16); ++ break; ++ default: ++ break; ++ } ++} ++ ++static void rtl8156_change_mtu(struct r8152 *tp) ++{ ++ u32 rx_max_size = mtu_to_size(tp->netdev->mtu); ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rx_max_size); ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO); ++ r8156_fc_parameter(tp); ++ ++ /* TX share fifo free credit full threshold */ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, 512 / 64); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TXFIFO_FULL, ++ ALIGN(rx_max_size + sizeof(struct tx_desc), 1024) / 16); ++} ++ ++static void rtl8156_up(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; ++ ++ r8153b_u1u2en(tp, false); ++ r8153_u2p3en(tp, false); ++ r8153_aldps_en(tp, false); ++ ++ rxdy_gated_en(tp, true); ++ r8153_teredo_off(tp); ++ ++ ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); ++ ocp_data &= ~RCR_ACPT_ALL; ++ ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); ++ ++ rtl8152_nic_reset(tp); ++ rtl_reset_bmu(tp); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); ++ ocp_data &= ~NOW_IS_OOB; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); ++ ocp_data &= ~MCU_BORW_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); ++ ++ rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX); ++ ++ rtl8156_change_mtu(tp); ++ ++ switch (tp->version) { ++ case RTL_TEST_01: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_BMU_CONFIG); ++ ocp_data |= ACT_ODMA; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_BMU_CONFIG, ocp_data); ++ break; ++ default: ++ break; ++ } ++ ++ /* share FIFO settings */ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_FULL); ++ ocp_data &= ~RXFIFO_FULL_MASK; ++ ocp_data |= 0x08; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_FULL, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3); ++ ocp_data &= ~PLA_MCU_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SPEED_OPTION); ++ ocp_data &= ~(RG_PWRDN_EN | ALL_SPEED_OFF); ++ ocp_write_word(tp, MCU_TYPE_USB, USB_SPEED_OPTION, ocp_data); ++ ++ ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, 0x00600400); ++ ++ if (tp->saved_wolopts != __rtl_get_wol(tp)) { ++ netif_warn(tp, ifup, tp->netdev, "wol setting is changed\n"); ++ __rtl_set_wol(tp, tp->saved_wolopts); ++ } ++ ++ r8153_aldps_en(tp, true); ++ r8153_u2p3en(tp, true); ++ ++ if (tp->udev->speed >= USB_SPEED_SUPER) ++ r8153b_u1u2en(tp, true); ++} ++ ++static void rtl8156_down(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) { ++ rtl_drop_queued_tx(tp); ++ return; ++ } ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3); ++ ocp_data |= PLA_MCU_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); ++ ++ r8153b_u1u2en(tp, false); ++ r8153_u2p3en(tp, false); ++ r8153b_power_cut_en(tp, false); ++ r8153_aldps_en(tp, false); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); ++ ocp_data &= ~NOW_IS_OOB; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); ++ ++ rtl_disable(tp); ++ rtl_reset_bmu(tp); ++ ++ /* Clear teredo wake event. bit[15:8] is the teredo wakeup ++ * type. Set it to zero. bits[7:0] are the W1C bits about ++ * the events. Set them to all 1 to clear them. ++ */ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); ++ ocp_data |= NOW_IS_OOB; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); ++ ++ rtl_rx_vlan_en(tp, true); ++ rxdy_gated_en(tp, false); ++ ++ ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); ++ ocp_data |= RCR_APM | RCR_AM | RCR_AB; ++ ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); ++ ++ r8153_aldps_en(tp, true); ++} ++ ++static bool rtl8152_in_nway(struct r8152 *tp) ++{ ++ u16 nway_state; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000); ++ tp->ocp_base = 0x2000; ++ ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */ ++ nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a); ++ ++ /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */ ++ if (nway_state & 0xc000) ++ return false; ++ else ++ return true; ++} ++ ++static bool rtl8153_in_nway(struct r8152 *tp) ++{ ++ u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff; ++ ++ if (phy_state == TXDIS_STATE || phy_state == ABD_STATE) ++ return false; ++ else ++ return true; ++} ++ ++static void set_carrier(struct r8152 *tp) ++{ ++ struct net_device *netdev = tp->netdev; ++ struct napi_struct *napi = &tp->napi; ++ u16 speed; ++ ++ speed = rtl8152_get_speed(tp); ++ ++ if (speed & LINK_STATUS) { ++ if (!netif_carrier_ok(netdev)) { ++ tp->rtl_ops.enable(tp); ++ netif_stop_queue(netdev); ++ napi_disable(napi); ++ netif_carrier_on(netdev); ++ rtl_start_rx(tp); ++ clear_bit(RTL8152_SET_RX_MODE, &tp->flags); ++ _rtl8152_set_rx_mode(netdev); ++ napi_enable(napi); ++ netif_wake_queue(netdev); ++ netif_info(tp, link, netdev, "carrier on\n"); ++ } else if (netif_queue_stopped(netdev) && ++ skb_queue_len(&tp->tx_queue) < tp->tx_qlen) { ++ netif_wake_queue(netdev); ++ } ++ } else { ++ if (netif_carrier_ok(netdev)) { ++ netif_carrier_off(netdev); ++ tasklet_disable(&tp->tx_tl); ++ napi_disable(napi); ++ tp->rtl_ops.disable(tp); ++ napi_enable(napi); ++ tasklet_enable(&tp->tx_tl); ++ netif_info(tp, link, netdev, "carrier off\n"); ++ } ++ } ++} ++ ++static void rtl_work_func_t(struct work_struct *work) ++{ ++ struct r8152 *tp = container_of(work, struct r8152, schedule.work); ++ ++ /* If the device is unplugged or !netif_running(), the workqueue ++ * doesn't need to wake the device, and could return directly. ++ */ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev)) ++ return; ++ ++ if (usb_autopm_get_interface(tp->intf) < 0) ++ return; ++ ++ if (!test_bit(WORK_ENABLE, &tp->flags)) ++ goto out1; ++ ++ if (!mutex_trylock(&tp->control)) { ++ schedule_delayed_work(&tp->schedule, 0); ++ goto out1; ++ } ++ ++ if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags)) ++ set_carrier(tp); ++ ++ if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags)) ++ _rtl8152_set_rx_mode(tp->netdev); ++ ++ /* don't schedule tasket before linking */ ++ if (test_and_clear_bit(SCHEDULE_TASKLET, &tp->flags) && ++ netif_carrier_ok(tp->netdev)) ++ tasklet_schedule(&tp->tx_tl); ++ ++ mutex_unlock(&tp->control); ++ ++out1: ++ usb_autopm_put_interface(tp->intf); ++} ++ ++static void rtl_hw_phy_work_func_t(struct work_struct *work) ++{ ++ struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work); ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; ++ ++ if (usb_autopm_get_interface(tp->intf) < 0) ++ return; + + mutex_lock(&tp->control); + +@@ -5399,7 +6275,1068 @@ static void r8152b_init(struct r8152 *tp) + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); + } + +-static void r8153_init(struct r8152 *tp) ++static void r8153_init(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 data; ++ int i; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; ++ ++ r8153_u1u2en(tp, false); ++ ++ for (i = 0; i < 500; i++) { ++ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & ++ AUTOLOAD_DONE) ++ break; ++ ++ msleep(20); ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ break; ++ } ++ ++ data = r8153_phy_status(tp, 0); ++ ++ if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 || ++ tp->version == RTL_VER_05) ++ ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L); ++ ++ data = r8152_mdio_read(tp, MII_BMCR); ++ if (data & BMCR_PDOWN) { ++ data &= ~BMCR_PDOWN; ++ r8152_mdio_write(tp, MII_BMCR, data); ++ } ++ ++ data = r8153_phy_status(tp, PHY_STAT_LAN_ON); ++ ++ r8153_u2p3en(tp, false); ++ ++ if (tp->version == RTL_VER_04) { ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2); ++ ocp_data &= ~pwd_dn_scale_mask; ++ ocp_data |= pwd_dn_scale(96); ++ ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY); ++ ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data); ++ } else if (tp->version == RTL_VER_05) { ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0); ++ ocp_data &= ~ECM_ALDPS; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1); ++ if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0) ++ ocp_data &= ~DYNAMIC_BURST; ++ else ++ ocp_data |= DYNAMIC_BURST; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data); ++ } else if (tp->version == RTL_VER_06) { ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1); ++ if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0) ++ ocp_data &= ~DYNAMIC_BURST; ++ else ++ ocp_data |= DYNAMIC_BURST; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data); ++ ++ r8153_queue_wake(tp, false); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); ++ if (rtl8152_get_speed(tp) & LINK_STATUS) ++ ocp_data |= CUR_LINK_OK; ++ else ++ ocp_data &= ~CUR_LINK_OK; ++ ocp_data |= POLL_LINK_CHG; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); ++ } ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2); ++ ocp_data |= EP4_FULL_FC; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL); ++ ocp_data &= ~TIMER11_EN; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE); ++ ocp_data &= ~LED_MODE_MASK; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data); ++ ++ ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM; ++ if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER) ++ ocp_data |= LPM_TIMER_500MS; ++ else ++ ocp_data |= LPM_TIMER_500US; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2); ++ ocp_data &= ~SEN_VAL_MASK; ++ ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data); ++ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001); ++ ++ r8153_power_cut_en(tp, false); ++ rtl_runtime_suspend_enable(tp, false); ++ r8153_mac_clk_speed_down(tp, false); ++ r8153_u1u2en(tp, true); ++ usb_enable_lpm(tp->udev); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG6); ++ ocp_data |= LANWAKE_CLR_EN; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG6, ocp_data); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_LWAKE_CTRL_REG); ++ ocp_data &= ~LANWAKE_PIN; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_LWAKE_CTRL_REG, ocp_data); ++ ++ /* rx aggregation */ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); ++ ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); ++ if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags)) ++ ocp_data |= RX_AGG_DISABLE; ++ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ rtl_tally_reset(tp); ++ ++ switch (tp->udev->speed) { ++ case USB_SPEED_SUPER: ++ case USB_SPEED_SUPER_PLUS: ++ tp->coalesce = COALESCE_SUPER; ++ break; ++ case USB_SPEED_HIGH: ++ tp->coalesce = COALESCE_HIGH; ++ break; ++ default: ++ tp->coalesce = COALESCE_SLOW; ++ break; ++ } ++} ++ ++static void r8153b_init(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 data; ++ int i; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; ++ ++ r8153b_u1u2en(tp, false); ++ ++ for (i = 0; i < 500; i++) { ++ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & ++ AUTOLOAD_DONE) ++ break; ++ ++ msleep(20); ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ break; ++ } ++ ++ data = r8153_phy_status(tp, 0); ++ ++ data = r8152_mdio_read(tp, MII_BMCR); ++ if (data & BMCR_PDOWN) { ++ data &= ~BMCR_PDOWN; ++ r8152_mdio_write(tp, MII_BMCR, data); ++ } ++ ++ data = r8153_phy_status(tp, PHY_STAT_LAN_ON); ++ ++ r8153_u2p3en(tp, false); ++ ++ /* MSC timer = 0xfff * 8ms = 32760 ms */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff); ++ ++ r8153b_power_cut_en(tp, false); ++ r8153b_ups_en(tp, false); ++ r8153_queue_wake(tp, false); ++ rtl_runtime_suspend_enable(tp, false); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); ++ if (rtl8152_get_speed(tp) & LINK_STATUS) ++ ocp_data |= CUR_LINK_OK; ++ else ++ ocp_data &= ~CUR_LINK_OK; ++ ocp_data |= POLL_LINK_CHG; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); ++ ++ if (tp->udev->speed >= USB_SPEED_SUPER) ++ r8153b_u1u2en(tp, true); ++ ++ usb_enable_lpm(tp->udev); ++ ++ /* MAC clock speed down */ ++ r8153_mac_clk_speed_down(tp, true); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3); ++ ocp_data &= ~PLA_MCU_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); ++ ++ if (tp->version == RTL_VER_09) { ++ /* Disable Test IO for 32QFN */ ++ if (ocp_read_byte(tp, MCU_TYPE_PLA, 0xdc00) & BIT(5)) { ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); ++ ocp_data |= TEST_IO_OFF; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); ++ } ++ } ++ ++ set_bit(GREEN_ETHERNET, &tp->flags); ++ ++ /* rx aggregation */ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); ++ ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); ++ ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ rtl_tally_reset(tp); ++ ++ tp->coalesce = 15000; /* 15 us */ ++} ++ ++static void r8153c_init(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 data; ++ int i; ++ ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; ++ ++ r8153b_u1u2en(tp, false); ++ ++ /* Disable spi_en */ ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5); ++ ocp_data &= ~BIT(3); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data); ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, 0xcbf0); ++ ocp_data |= BIT(1); ++ ocp_write_word(tp, MCU_TYPE_USB, 0xcbf0, ocp_data); ++ ++ for (i = 0; i < 500; i++) { ++ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & ++ AUTOLOAD_DONE) ++ break; ++ ++ msleep(20); ++ if (test_bit(RTL8152_UNPLUG, &tp->flags)) ++ return; ++ } ++ ++ data = r8153_phy_status(tp, 0); ++ ++ data = r8152_mdio_read(tp, MII_BMCR); ++ if (data & BMCR_PDOWN) { ++ data &= ~BMCR_PDOWN; ++ r8152_mdio_write(tp, MII_BMCR, data); ++ } ++ ++ data = r8153_phy_status(tp, PHY_STAT_LAN_ON); ++ ++ r8153_u2p3en(tp, false); ++ ++ /* MSC timer = 0xfff * 8ms = 32760 ms */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff); ++ ++ r8153b_power_cut_en(tp, false); ++ r8153c_ups_en(tp, false); ++ r8153_queue_wake(tp, false); ++ rtl_runtime_suspend_enable(tp, false); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); ++ if (rtl8152_get_speed(tp) & LINK_STATUS) ++ ocp_data |= CUR_LINK_OK; ++ else ++ ocp_data &= ~CUR_LINK_OK; ++ ++ ocp_data |= POLL_LINK_CHG; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); ++ ++ r8153b_u1u2en(tp, true); ++ ++ usb_enable_lpm(tp->udev); ++ ++ /* MAC clock speed down */ ++ r8153_mac_clk_speed_down(tp, true); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_2); ++ ocp_data &= ~BIT(7); ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_MISC_2, ocp_data); ++ ++ set_bit(GREEN_ETHERNET, &tp->flags); ++ ++ /* rx aggregation */ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); ++ ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); ++ ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ rtl_tally_reset(tp); ++ ++ tp->coalesce = 15000; /* 15 us */ ++} ++ ++static void r8156_hw_phy_cfg(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 data; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); ++ if (ocp_data & PCUT_STATUS) { ++ ocp_data &= ~PCUT_STATUS; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); ++ } ++ ++ data = r8153_phy_status(tp, 0); ++ switch (data) { ++ case PHY_STAT_EXT_INIT: ++ rtl8152_apply_firmware(tp, true); ++ ++ data = ocp_reg_read(tp, 0xa468); ++ data &= ~(BIT(3) | BIT(1)); ++ ocp_reg_write(tp, 0xa468, data); ++ break; ++ case PHY_STAT_LAN_ON: ++ case PHY_STAT_PWRDN: ++ default: ++ rtl8152_apply_firmware(tp, false); ++ break; ++ } ++ ++ /* disable ALDPS before updating the PHY parameters */ ++ r8153_aldps_en(tp, false); ++ ++ /* disable EEE before updating the PHY parameters */ ++ rtl_eee_enable(tp, false); ++ ++ data = r8153_phy_status(tp, PHY_STAT_LAN_ON); ++ WARN_ON_ONCE(data != PHY_STAT_LAN_ON); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); ++ ocp_data |= PFM_PWM_SWITCH; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); ++ ++ switch (tp->version) { ++ case RTL_VER_10: ++ data = ocp_reg_read(tp, 0xad40); ++ data &= ~0x3ff; ++ data |= BIT(7) | BIT(2); ++ ocp_reg_write(tp, 0xad40, data); ++ ++ data = ocp_reg_read(tp, 0xad4e); ++ data |= BIT(4); ++ ocp_reg_write(tp, 0xad4e, data); ++ data = ocp_reg_read(tp, 0xad16); ++ data &= ~0x3ff; ++ data |= 0x6; ++ ocp_reg_write(tp, 0xad16, data); ++ data = ocp_reg_read(tp, 0xad32); ++ data &= ~0x3f; ++ data |= 6; ++ ocp_reg_write(tp, 0xad32, data); ++ data = ocp_reg_read(tp, 0xac08); ++ data &= ~(BIT(12) | BIT(8)); ++ ocp_reg_write(tp, 0xac08, data); ++ data = ocp_reg_read(tp, 0xac8a); ++ data |= BIT(12) | BIT(13) | BIT(14); ++ data &= ~BIT(15); ++ ocp_reg_write(tp, 0xac8a, data); ++ data = ocp_reg_read(tp, 0xad18); ++ data |= BIT(10); ++ ocp_reg_write(tp, 0xad18, data); ++ data = ocp_reg_read(tp, 0xad1a); ++ data |= 0x3ff; ++ ocp_reg_write(tp, 0xad1a, data); ++ data = ocp_reg_read(tp, 0xad1c); ++ data |= 0x3ff; ++ ocp_reg_write(tp, 0xad1c, data); ++ ++ data = sram_read(tp, 0x80ea); ++ data &= ~0xff00; ++ data |= 0xc400; ++ sram_write(tp, 0x80ea, data); ++ data = sram_read(tp, 0x80eb); ++ data &= ~0x0700; ++ data |= 0x0300; ++ sram_write(tp, 0x80eb, data); ++ data = sram_read(tp, 0x80f8); ++ data &= ~0xff00; ++ data |= 0x1c00; ++ sram_write(tp, 0x80f8, data); ++ data = sram_read(tp, 0x80f1); ++ data &= ~0xff00; ++ data |= 0x3000; ++ sram_write(tp, 0x80f1, data); ++ ++ data = sram_read(tp, 0x80fe); ++ data &= ~0xff00; ++ data |= 0xa500; ++ sram_write(tp, 0x80fe, data); ++ data = sram_read(tp, 0x8102); ++ data &= ~0xff00; ++ data |= 0x5000; ++ sram_write(tp, 0x8102, data); ++ data = sram_read(tp, 0x8015); ++ data &= ~0xff00; ++ data |= 0x3300; ++ sram_write(tp, 0x8015, data); ++ data = sram_read(tp, 0x8100); ++ data &= ~0xff00; ++ data |= 0x7000; ++ sram_write(tp, 0x8100, data); ++ data = sram_read(tp, 0x8014); ++ data &= ~0xff00; ++ data |= 0xf000; ++ sram_write(tp, 0x8014, data); ++ data = sram_read(tp, 0x8016); ++ data &= ~0xff00; ++ data |= 0x6500; ++ sram_write(tp, 0x8016, data); ++ data = sram_read(tp, 0x80dc); ++ data &= ~0xff00; ++ data |= 0xed00; ++ sram_write(tp, 0x80dc, data); ++ data = sram_read(tp, 0x80df); ++ data |= BIT(8); ++ sram_write(tp, 0x80df, data); ++ data = sram_read(tp, 0x80e1); ++ data &= ~BIT(8); ++ sram_write(tp, 0x80e1, data); ++ ++ data = ocp_reg_read(tp, 0xbf06); ++ data &= ~0x003f; ++ data |= 0x0038; ++ ocp_reg_write(tp, 0xbf06, data); ++ ++ sram_write(tp, 0x819f, 0xddb6); ++ ++ ocp_reg_write(tp, 0xbc34, 0x5555); ++ data = ocp_reg_read(tp, 0xbf0a); ++ data &= ~0x0e00; ++ data |= 0x0a00; ++ ocp_reg_write(tp, 0xbf0a, data); ++ ++ data = ocp_reg_read(tp, 0xbd2c); ++ data &= ~BIT(13); ++ ocp_reg_write(tp, 0xbd2c, data); ++ break; ++ case RTL_VER_11: ++ data = ocp_reg_read(tp, 0xad16); ++ data |= 0x3ff; ++ ocp_reg_write(tp, 0xad16, data); ++ data = ocp_reg_read(tp, 0xad32); ++ data &= ~0x3f; ++ data |= 6; ++ ocp_reg_write(tp, 0xad32, data); ++ data = ocp_reg_read(tp, 0xac08); ++ data &= ~(BIT(12) | BIT(8)); ++ ocp_reg_write(tp, 0xac08, data); ++ data = ocp_reg_read(tp, 0xacc0); ++ data &= ~0x3; ++ data |= BIT(1); ++ ocp_reg_write(tp, 0xacc0, data); ++ data = ocp_reg_read(tp, 0xad40); ++ data &= ~0xe7; ++ data |= BIT(6) | BIT(2); ++ ocp_reg_write(tp, 0xad40, data); ++ data = ocp_reg_read(tp, 0xac14); ++ data &= ~BIT(7); ++ ocp_reg_write(tp, 0xac14, data); ++ data = ocp_reg_read(tp, 0xac80); ++ data &= ~(BIT(8) | BIT(9)); ++ ocp_reg_write(tp, 0xac80, data); ++ data = ocp_reg_read(tp, 0xac5e); ++ data &= ~0x7; ++ data |= BIT(1); ++ ocp_reg_write(tp, 0xac5e, data); ++ ocp_reg_write(tp, 0xad4c, 0x00a8); ++ ocp_reg_write(tp, 0xac5c, 0x01ff); ++ data = ocp_reg_read(tp, 0xac8a); ++ data &= ~0xf0; ++ data |= BIT(4) | BIT(5); ++ ocp_reg_write(tp, 0xac8a, data); ++ ocp_reg_write(tp, 0xb87c, 0x8157); ++ data = ocp_reg_read(tp, 0xb87e); ++ data &= ~0xff00; ++ data |= 0x0500; ++ ocp_reg_write(tp, 0xb87e, data); ++ ocp_reg_write(tp, 0xb87c, 0x8159); ++ data = ocp_reg_read(tp, 0xb87e); ++ data &= ~0xff00; ++ data |= 0x0700; ++ ocp_reg_write(tp, 0xb87e, data); ++ ++ /* AAGC */ ++ ocp_reg_write(tp, 0xb87c, 0x80a2); ++ ocp_reg_write(tp, 0xb87e, 0x0153); ++ ocp_reg_write(tp, 0xb87c, 0x809c); ++ ocp_reg_write(tp, 0xb87e, 0x0153); ++ ++ /* EEE parameter */ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_TXTWSYS_2P5G, 0x0056); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_USB_CFG); ++ ocp_data |= EN_XG_LIP | EN_G_LIP; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_USB_CFG, ocp_data); ++ ++ sram_write(tp, 0x8257, 0x020f); /* XG PLL */ ++ sram_write(tp, 0x80ea, 0x7843); /* GIGA Master */ ++ ++ if (rtl_phy_patch_request(tp, true, true)) ++ return; ++ ++ /* Advance EEE */ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4); ++ ocp_data |= EEE_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data); ++ ++ data = ocp_reg_read(tp, OCP_DOWN_SPEED); ++ data &= ~(EN_EEE_100 | EN_EEE_1000); ++ data |= EN_10M_CLKDIV; ++ ocp_reg_write(tp, OCP_DOWN_SPEED, data); ++ tp->ups_info._10m_ckdiv = true; ++ tp->ups_info.eee_plloff_100 = false; ++ tp->ups_info.eee_plloff_giga = false; ++ ++ data = ocp_reg_read(tp, OCP_POWER_CFG); ++ data &= ~EEE_CLKDIV_EN; ++ ocp_reg_write(tp, OCP_POWER_CFG, data); ++ tp->ups_info.eee_ckdiv = false; ++ ++ ocp_reg_write(tp, OCP_SYSCLK_CFG, 0); ++ ocp_reg_write(tp, OCP_SYSCLK_CFG, sysclk_div_expo(5)); ++ tp->ups_info._250m_ckdiv = false; ++ ++ rtl_phy_patch_request(tp, false, true); ++ ++ /* enable ADC Ibias Cal */ ++ data = ocp_reg_read(tp, 0xd068); ++ data |= BIT(13); ++ ocp_reg_write(tp, 0xd068, data); ++ ++ /* enable Thermal Sensor */ ++ data = sram_read(tp, 0x81a2); ++ data &= ~BIT(8); ++ sram_write(tp, 0x81a2, data); ++ data = ocp_reg_read(tp, 0xb54c); ++ data &= ~0xff00; ++ data |= 0xdb00; ++ ocp_reg_write(tp, 0xb54c, data); ++ ++ /* Nway 2.5G Lite */ ++ data = ocp_reg_read(tp, 0xa454); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xa454, data); ++ ++ /* CS DSP solution */ ++ data = ocp_reg_read(tp, OCP_10GBT_CTRL); ++ data |= RTL_ADV2_5G_F_R; ++ ocp_reg_write(tp, OCP_10GBT_CTRL, data); ++ data = ocp_reg_read(tp, 0xad4e); ++ data &= ~BIT(4); ++ ocp_reg_write(tp, 0xad4e, data); ++ data = ocp_reg_read(tp, 0xa86a); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xa86a, data); ++ ++ /* MDI SWAP */ ++ if ((ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG) & MID_REVERSE) && ++ (ocp_reg_read(tp, 0xd068) & BIT(1))) { ++ u16 swap_a, swap_b; ++ ++ data = ocp_reg_read(tp, 0xd068); ++ data &= ~0x1f; ++ data |= 0x1; /* p0 */ ++ ocp_reg_write(tp, 0xd068, data); ++ swap_a = ocp_reg_read(tp, 0xd06a); ++ data &= ~0x18; ++ data |= 0x18; /* p3 */ ++ ocp_reg_write(tp, 0xd068, data); ++ swap_b = ocp_reg_read(tp, 0xd06a); ++ data &= ~0x18; /* p0 */ ++ ocp_reg_write(tp, 0xd068, data); ++ ocp_reg_write(tp, 0xd06a, ++ (swap_a & ~0x7ff) | (swap_b & 0x7ff)); ++ data |= 0x18; /* p3 */ ++ ocp_reg_write(tp, 0xd068, data); ++ ocp_reg_write(tp, 0xd06a, ++ (swap_b & ~0x7ff) | (swap_a & 0x7ff)); ++ data &= ~0x18; ++ data |= 0x08; /* p1 */ ++ ocp_reg_write(tp, 0xd068, data); ++ swap_a = ocp_reg_read(tp, 0xd06a); ++ data &= ~0x18; ++ data |= 0x10; /* p2 */ ++ ocp_reg_write(tp, 0xd068, data); ++ swap_b = ocp_reg_read(tp, 0xd06a); ++ data &= ~0x18; ++ data |= 0x08; /* p1 */ ++ ocp_reg_write(tp, 0xd068, data); ++ ocp_reg_write(tp, 0xd06a, ++ (swap_a & ~0x7ff) | (swap_b & 0x7ff)); ++ data &= ~0x18; ++ data |= 0x10; /* p2 */ ++ ocp_reg_write(tp, 0xd068, data); ++ ocp_reg_write(tp, 0xd06a, ++ (swap_b & ~0x7ff) | (swap_a & 0x7ff)); ++ swap_a = ocp_reg_read(tp, 0xbd5a); ++ swap_b = ocp_reg_read(tp, 0xbd5c); ++ ocp_reg_write(tp, 0xbd5a, (swap_a & ~0x1f1f) | ++ ((swap_b & 0x1f) << 8) | ++ ((swap_b >> 8) & 0x1f)); ++ ocp_reg_write(tp, 0xbd5c, (swap_b & ~0x1f1f) | ++ ((swap_a & 0x1f) << 8) | ++ ((swap_a >> 8) & 0x1f)); ++ swap_a = ocp_reg_read(tp, 0xbc18); ++ swap_b = ocp_reg_read(tp, 0xbc1a); ++ ocp_reg_write(tp, 0xbc18, (swap_a & ~0x1f1f) | ++ ((swap_b & 0x1f) << 8) | ++ ((swap_b >> 8) & 0x1f)); ++ ocp_reg_write(tp, 0xbc1a, (swap_b & ~0x1f1f) | ++ ((swap_a & 0x1f) << 8) | ++ ((swap_a >> 8) & 0x1f)); ++ } ++ break; ++ default: ++ break; ++ } ++ ++ rtl_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags)); ++ ++ data = ocp_reg_read(tp, 0xa428); ++ data &= ~BIT(9); ++ ocp_reg_write(tp, 0xa428, data); ++ data = ocp_reg_read(tp, 0xa5ea); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xa5ea, data); ++ tp->ups_info.lite_mode = 0; ++ ++ if (tp->eee_en) ++ rtl_eee_enable(tp, true); ++ ++ r8153_aldps_en(tp, true); ++ r8152b_enable_fc(tp); ++ r8153_u2p3en(tp, true); ++ ++ set_bit(PHY_RESET, &tp->flags); ++} ++ ++static void r8156b_hw_phy_cfg(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ u16 data; ++ ++ switch (tp->version) { ++ case RTL_VER_12: ++ ocp_reg_write(tp, 0xbf86, 0x9000); ++ data = ocp_reg_read(tp, 0xc402); ++ data |= BIT(10); ++ ocp_reg_write(tp, 0xc402, data); ++ data &= ~BIT(10); ++ ocp_reg_write(tp, 0xc402, data); ++ ocp_reg_write(tp, 0xbd86, 0x1010); ++ ocp_reg_write(tp, 0xbd88, 0x1010); ++ data = ocp_reg_read(tp, 0xbd4e); ++ data &= ~(BIT(10) | BIT(11)); ++ data |= BIT(11); ++ ocp_reg_write(tp, 0xbd4e, data); ++ data = ocp_reg_read(tp, 0xbf46); ++ data &= ~0xf00; ++ data |= 0x700; ++ ocp_reg_write(tp, 0xbf46, data); ++ break; ++ case RTL_VER_13: ++ case RTL_VER_15: ++ r8156b_wait_loading_flash(tp); ++ break; ++ default: ++ break; ++ } ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); ++ if (ocp_data & PCUT_STATUS) { ++ ocp_data &= ~PCUT_STATUS; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); ++ } ++ ++ data = r8153_phy_status(tp, 0); ++ switch (data) { ++ case PHY_STAT_EXT_INIT: ++ rtl8152_apply_firmware(tp, true); ++ ++ data = ocp_reg_read(tp, 0xa466); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xa466, data); ++ ++ data = ocp_reg_read(tp, 0xa468); ++ data &= ~(BIT(3) | BIT(1)); ++ ocp_reg_write(tp, 0xa468, data); ++ break; ++ case PHY_STAT_LAN_ON: ++ case PHY_STAT_PWRDN: ++ default: ++ rtl8152_apply_firmware(tp, false); ++ break; ++ } ++ ++ data = r8152_mdio_read(tp, MII_BMCR); ++ if (data & BMCR_PDOWN) { ++ data &= ~BMCR_PDOWN; ++ r8152_mdio_write(tp, MII_BMCR, data); ++ } ++ ++ /* disable ALDPS before updating the PHY parameters */ ++ r8153_aldps_en(tp, false); ++ ++ /* disable EEE before updating the PHY parameters */ ++ rtl_eee_enable(tp, false); ++ ++ data = r8153_phy_status(tp, PHY_STAT_LAN_ON); ++ WARN_ON_ONCE(data != PHY_STAT_LAN_ON); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); ++ ocp_data |= PFM_PWM_SWITCH; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); ++ ++ switch (tp->version) { ++ case RTL_VER_12: ++ data = ocp_reg_read(tp, 0xbc08); ++ data |= BIT(3) | BIT(2); ++ ocp_reg_write(tp, 0xbc08, data); ++ ++ data = sram_read(tp, 0x8fff); ++ data &= ~0xff00; ++ data |= 0x0400; ++ sram_write(tp, 0x8fff, data); ++ ++ data = ocp_reg_read(tp, 0xacda); ++ data |= 0xff00; ++ ocp_reg_write(tp, 0xacda, data); ++ data = ocp_reg_read(tp, 0xacde); ++ data |= 0xf000; ++ ocp_reg_write(tp, 0xacde, data); ++ ocp_reg_write(tp, 0xac8c, 0x0ffc); ++ ocp_reg_write(tp, 0xac46, 0xb7b4); ++ ocp_reg_write(tp, 0xac50, 0x0fbc); ++ ocp_reg_write(tp, 0xac3c, 0x9240); ++ ocp_reg_write(tp, 0xac4e, 0x0db4); ++ ocp_reg_write(tp, 0xacc6, 0x0707); ++ ocp_reg_write(tp, 0xacc8, 0xa0d3); ++ ocp_reg_write(tp, 0xad08, 0x0007); ++ ++ ocp_reg_write(tp, 0xb87c, 0x8560); ++ ocp_reg_write(tp, 0xb87e, 0x19cc); ++ ocp_reg_write(tp, 0xb87c, 0x8562); ++ ocp_reg_write(tp, 0xb87e, 0x19cc); ++ ocp_reg_write(tp, 0xb87c, 0x8564); ++ ocp_reg_write(tp, 0xb87e, 0x19cc); ++ ocp_reg_write(tp, 0xb87c, 0x8566); ++ ocp_reg_write(tp, 0xb87e, 0x147d); ++ ocp_reg_write(tp, 0xb87c, 0x8568); ++ ocp_reg_write(tp, 0xb87e, 0x147d); ++ ocp_reg_write(tp, 0xb87c, 0x856a); ++ ocp_reg_write(tp, 0xb87e, 0x147d); ++ ocp_reg_write(tp, 0xb87c, 0x8ffe); ++ ocp_reg_write(tp, 0xb87e, 0x0907); ++ ocp_reg_write(tp, 0xb87c, 0x80d6); ++ ocp_reg_write(tp, 0xb87e, 0x2801); ++ ocp_reg_write(tp, 0xb87c, 0x80f2); ++ ocp_reg_write(tp, 0xb87e, 0x2801); ++ ocp_reg_write(tp, 0xb87c, 0x80f4); ++ ocp_reg_write(tp, 0xb87e, 0x6077); ++ ocp_reg_write(tp, 0xb506, 0x01e7); ++ ++ ocp_reg_write(tp, 0xb87c, 0x8013); ++ ocp_reg_write(tp, 0xb87e, 0x0700); ++ ocp_reg_write(tp, 0xb87c, 0x8fb9); ++ ocp_reg_write(tp, 0xb87e, 0x2801); ++ ocp_reg_write(tp, 0xb87c, 0x8fba); ++ ocp_reg_write(tp, 0xb87e, 0x0100); ++ ocp_reg_write(tp, 0xb87c, 0x8fbc); ++ ocp_reg_write(tp, 0xb87e, 0x1900); ++ ocp_reg_write(tp, 0xb87c, 0x8fbe); ++ ocp_reg_write(tp, 0xb87e, 0xe100); ++ ocp_reg_write(tp, 0xb87c, 0x8fc0); ++ ocp_reg_write(tp, 0xb87e, 0x0800); ++ ocp_reg_write(tp, 0xb87c, 0x8fc2); ++ ocp_reg_write(tp, 0xb87e, 0xe500); ++ ocp_reg_write(tp, 0xb87c, 0x8fc4); ++ ocp_reg_write(tp, 0xb87e, 0x0f00); ++ ocp_reg_write(tp, 0xb87c, 0x8fc6); ++ ocp_reg_write(tp, 0xb87e, 0xf100); ++ ocp_reg_write(tp, 0xb87c, 0x8fc8); ++ ocp_reg_write(tp, 0xb87e, 0x0400); ++ ocp_reg_write(tp, 0xb87c, 0x8fca); ++ ocp_reg_write(tp, 0xb87e, 0xf300); ++ ocp_reg_write(tp, 0xb87c, 0x8fcc); ++ ocp_reg_write(tp, 0xb87e, 0xfd00); ++ ocp_reg_write(tp, 0xb87c, 0x8fce); ++ ocp_reg_write(tp, 0xb87e, 0xff00); ++ ocp_reg_write(tp, 0xb87c, 0x8fd0); ++ ocp_reg_write(tp, 0xb87e, 0xfb00); ++ ocp_reg_write(tp, 0xb87c, 0x8fd2); ++ ocp_reg_write(tp, 0xb87e, 0x0100); ++ ocp_reg_write(tp, 0xb87c, 0x8fd4); ++ ocp_reg_write(tp, 0xb87e, 0xf400); ++ ocp_reg_write(tp, 0xb87c, 0x8fd6); ++ ocp_reg_write(tp, 0xb87e, 0xff00); ++ ocp_reg_write(tp, 0xb87c, 0x8fd8); ++ ocp_reg_write(tp, 0xb87e, 0xf600); ++ ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_USB_CFG); ++ ocp_data |= EN_XG_LIP | EN_G_LIP; ++ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_USB_CFG, ocp_data); ++ ocp_reg_write(tp, 0xb87c, 0x813d); ++ ocp_reg_write(tp, 0xb87e, 0x390e); ++ ocp_reg_write(tp, 0xb87c, 0x814f); ++ ocp_reg_write(tp, 0xb87e, 0x790e); ++ ocp_reg_write(tp, 0xb87c, 0x80b0); ++ ocp_reg_write(tp, 0xb87e, 0x0f31); ++ data = ocp_reg_read(tp, 0xbf4c); ++ data |= BIT(1); ++ ocp_reg_write(tp, 0xbf4c, data); ++ data = ocp_reg_read(tp, 0xbcca); ++ data |= BIT(9) | BIT(8); ++ ocp_reg_write(tp, 0xbcca, data); ++ ocp_reg_write(tp, 0xb87c, 0x8141); ++ ocp_reg_write(tp, 0xb87e, 0x320e); ++ ocp_reg_write(tp, 0xb87c, 0x8153); ++ ocp_reg_write(tp, 0xb87e, 0x720e); ++ ocp_reg_write(tp, 0xb87c, 0x8529); ++ ocp_reg_write(tp, 0xb87e, 0x050e); ++ data = ocp_reg_read(tp, OCP_EEE_CFG); ++ data &= ~CTAP_SHORT_EN; ++ ocp_reg_write(tp, OCP_EEE_CFG, data); ++ ++ sram_write(tp, 0x816c, 0xc4a0); ++ sram_write(tp, 0x8170, 0xc4a0); ++ sram_write(tp, 0x8174, 0x04a0); ++ sram_write(tp, 0x8178, 0x04a0); ++ sram_write(tp, 0x817c, 0x0719); ++ sram_write(tp, 0x8ff4, 0x0400); ++ sram_write(tp, 0x8ff1, 0x0404); ++ ++ ocp_reg_write(tp, 0xbf4a, 0x001b); ++ ocp_reg_write(tp, 0xb87c, 0x8033); ++ ocp_reg_write(tp, 0xb87e, 0x7c13); ++ ocp_reg_write(tp, 0xb87c, 0x8037); ++ ocp_reg_write(tp, 0xb87e, 0x7c13); ++ ocp_reg_write(tp, 0xb87c, 0x803b); ++ ocp_reg_write(tp, 0xb87e, 0xfc32); ++ ocp_reg_write(tp, 0xb87c, 0x803f); ++ ocp_reg_write(tp, 0xb87e, 0x7c13); ++ ocp_reg_write(tp, 0xb87c, 0x8043); ++ ocp_reg_write(tp, 0xb87e, 0x7c13); ++ ocp_reg_write(tp, 0xb87c, 0x8047); ++ ocp_reg_write(tp, 0xb87e, 0x7c13); ++ ++ ocp_reg_write(tp, 0xb87c, 0x8145); ++ ocp_reg_write(tp, 0xb87e, 0x370e); ++ ocp_reg_write(tp, 0xb87c, 0x8157); ++ ocp_reg_write(tp, 0xb87e, 0x770e); ++ ocp_reg_write(tp, 0xb87c, 0x8169); ++ ocp_reg_write(tp, 0xb87e, 0x0d0a); ++ ocp_reg_write(tp, 0xb87c, 0x817b); ++ ocp_reg_write(tp, 0xb87e, 0x1d0a); ++ ++ data = sram_read(tp, 0x8217); ++ data &= ~0xff00; ++ data |= 0x5000; ++ sram_write(tp, 0x8217, data); ++ data = sram_read(tp, 0x821a); ++ data &= ~0xff00; ++ data |= 0x5000; ++ sram_write(tp, 0x821a, data); ++ sram_write(tp, 0x80da, 0x0403); ++ data = sram_read(tp, 0x80dc); ++ data &= ~0xff00; ++ data |= 0x1000; ++ sram_write(tp, 0x80dc, data); ++ sram_write(tp, 0x80b3, 0x0384); ++ sram_write(tp, 0x80b7, 0x2007); ++ data = sram_read(tp, 0x80ba); ++ data &= ~0xff00; ++ data |= 0x6c00; ++ sram_write(tp, 0x80ba, data); ++ sram_write(tp, 0x80b5, 0xf009); ++ data = sram_read(tp, 0x80bd); ++ data &= ~0xff00; ++ data |= 0x9f00; ++ sram_write(tp, 0x80bd, data); ++ sram_write(tp, 0x80c7, 0xf083); ++ sram_write(tp, 0x80dd, 0x03f0); ++ data = sram_read(tp, 0x80df); ++ data &= ~0xff00; ++ data |= 0x1000; ++ sram_write(tp, 0x80df, data); ++ sram_write(tp, 0x80cb, 0x2007); ++ data = sram_read(tp, 0x80ce); ++ data &= ~0xff00; ++ data |= 0x6c00; ++ sram_write(tp, 0x80ce, data); ++ sram_write(tp, 0x80c9, 0x8009); ++ data = sram_read(tp, 0x80d1); ++ data &= ~0xff00; ++ data |= 0x8000; ++ sram_write(tp, 0x80d1, data); ++ sram_write(tp, 0x80a3, 0x200a); ++ sram_write(tp, 0x80a5, 0xf0ad); ++ sram_write(tp, 0x809f, 0x6073); ++ sram_write(tp, 0x80a1, 0x000b); ++ data = sram_read(tp, 0x80a9); ++ data &= ~0xff00; ++ data |= 0xc000; ++ sram_write(tp, 0x80a9, data); ++ ++ if (rtl_phy_patch_request(tp, true, true)) ++ return; ++ ++ data = ocp_reg_read(tp, 0xb896); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xb896, data); ++ data = ocp_reg_read(tp, 0xb892); ++ data &= ~0xff00; ++ ocp_reg_write(tp, 0xb892, data); ++ ocp_reg_write(tp, 0xb88e, 0xc23e); ++ ocp_reg_write(tp, 0xb890, 0x0000); ++ ocp_reg_write(tp, 0xb88e, 0xc240); ++ ocp_reg_write(tp, 0xb890, 0x0103); ++ ocp_reg_write(tp, 0xb88e, 0xc242); ++ ocp_reg_write(tp, 0xb890, 0x0507); ++ ocp_reg_write(tp, 0xb88e, 0xc244); ++ ocp_reg_write(tp, 0xb890, 0x090b); ++ ocp_reg_write(tp, 0xb88e, 0xc246); ++ ocp_reg_write(tp, 0xb890, 0x0c0e); ++ ocp_reg_write(tp, 0xb88e, 0xc248); ++ ocp_reg_write(tp, 0xb890, 0x1012); ++ ocp_reg_write(tp, 0xb88e, 0xc24a); ++ ocp_reg_write(tp, 0xb890, 0x1416); ++ data = ocp_reg_read(tp, 0xb896); ++ data |= BIT(0); ++ ocp_reg_write(tp, 0xb896, data); ++ ++ rtl_phy_patch_request(tp, false, true); ++ ++ data = ocp_reg_read(tp, 0xa86a); ++ data |= BIT(0); ++ ocp_reg_write(tp, 0xa86a, data); ++ data = ocp_reg_read(tp, 0xa6f0); ++ data |= BIT(0); ++ ocp_reg_write(tp, 0xa6f0, data); ++ ++ ocp_reg_write(tp, 0xbfa0, 0xd70d); ++ ocp_reg_write(tp, 0xbfa2, 0x4100); ++ ocp_reg_write(tp, 0xbfa4, 0xe868); ++ ocp_reg_write(tp, 0xbfa6, 0xdc59); ++ ocp_reg_write(tp, 0xb54c, 0x3c18); ++ data = ocp_reg_read(tp, 0xbfa4); ++ data &= ~BIT(5); ++ ocp_reg_write(tp, 0xbfa4, data); ++ data = sram_read(tp, 0x817d); ++ data |= BIT(12); ++ sram_write(tp, 0x817d, data); ++ break; ++ case RTL_VER_13: ++ /* 2.5G INRX */ ++ data = ocp_reg_read(tp, 0xac46); ++ data &= ~0x00f0; ++ data |= 0x0090; ++ ocp_reg_write(tp, 0xac46, data); ++ data = ocp_reg_read(tp, 0xad30); ++ data &= ~0x0003; ++ data |= 0x0001; ++ ocp_reg_write(tp, 0xad30, data); ++ fallthrough; ++ case RTL_VER_15: ++ /* EEE parameter */ ++ ocp_reg_write(tp, 0xb87c, 0x80f5); ++ ocp_reg_write(tp, 0xb87e, 0x760e); ++ ocp_reg_write(tp, 0xb87c, 0x8107); ++ ocp_reg_write(tp, 0xb87e, 0x360e); ++ ocp_reg_write(tp, 0xb87c, 0x8551); ++ data = ocp_reg_read(tp, 0xb87e); ++ data &= ~0xff00; ++ data |= 0x0800; ++ ocp_reg_write(tp, 0xb87e, data); ++ ++ /* ADC_PGA parameter */ ++ data = ocp_reg_read(tp, 0xbf00); ++ data &= ~0xe000; ++ data |= 0xa000; ++ ocp_reg_write(tp, 0xbf00, data); ++ data = ocp_reg_read(tp, 0xbf46); ++ data &= ~0x0f00; ++ data |= 0x0300; ++ ocp_reg_write(tp, 0xbf46, data); ++ ++ /* Green Table-PGA, 1G full viterbi */ ++ sram_write(tp, 0x8044, 0x2417); ++ sram_write(tp, 0x804a, 0x2417); ++ sram_write(tp, 0x8050, 0x2417); ++ sram_write(tp, 0x8056, 0x2417); ++ sram_write(tp, 0x805c, 0x2417); ++ sram_write(tp, 0x8062, 0x2417); ++ sram_write(tp, 0x8068, 0x2417); ++ sram_write(tp, 0x806e, 0x2417); ++ sram_write(tp, 0x8074, 0x2417); ++ sram_write(tp, 0x807a, 0x2417); ++ ++ /* XG PLL */ ++ data = ocp_reg_read(tp, 0xbf84); ++ data &= ~0xe000; ++ data |= 0xa000; ++ ocp_reg_write(tp, 0xbf84, data); ++ break; ++ default: ++ break; ++ } ++ ++ if (rtl_phy_patch_request(tp, true, true)) ++ return; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4); ++ ocp_data |= EEE_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data); ++ ++ data = ocp_reg_read(tp, OCP_DOWN_SPEED); ++ data &= ~(EN_EEE_100 | EN_EEE_1000); ++ data |= EN_10M_CLKDIV; ++ ocp_reg_write(tp, OCP_DOWN_SPEED, data); ++ tp->ups_info._10m_ckdiv = true; ++ tp->ups_info.eee_plloff_100 = false; ++ tp->ups_info.eee_plloff_giga = false; ++ ++ data = ocp_reg_read(tp, OCP_POWER_CFG); ++ data &= ~EEE_CLKDIV_EN; ++ ocp_reg_write(tp, OCP_POWER_CFG, data); ++ tp->ups_info.eee_ckdiv = false; ++ ++ rtl_phy_patch_request(tp, false, true); ++ ++ rtl_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags)); ++ ++ data = ocp_reg_read(tp, 0xa428); ++ data &= ~BIT(9); ++ ocp_reg_write(tp, 0xa428, data); ++ data = ocp_reg_read(tp, 0xa5ea); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xa5ea, data); ++ tp->ups_info.lite_mode = 0; ++ ++ if (tp->eee_en) ++ rtl_eee_enable(tp, true); ++ ++ r8153_aldps_en(tp, true); ++ r8152b_enable_fc(tp); ++ r8153_u2p3en(tp, true); ++ ++ set_bit(PHY_RESET, &tp->flags); ++} ++ ++static void r8156_init(struct r8152 *tp) + { + u32 ocp_data; + u16 data; +@@ -5408,7 +7345,17 @@ static void r8153_init(struct r8152 *tp) + if (test_bit(RTL8152_UNPLUG, &tp->flags)) + return; + +- r8153_u1u2en(tp, false); ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_ECM_OP); ++ ocp_data &= ~EN_ALL_SPEED; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_ECM_OP, ocp_data); ++ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_SPEED_OPTION, 0); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_ECM_OPTION); ++ ocp_data |= BYPASS_MAC_RESET; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_ECM_OPTION, ocp_data); ++ ++ r8153b_u1u2en(tp, false); + + for (i = 0; i < 500; i++) { + if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & +@@ -5417,14 +7364,15 @@ static void r8153_init(struct r8152 *tp) + + msleep(20); + if (test_bit(RTL8152_UNPLUG, &tp->flags)) +- break; ++ return; + } + + data = r8153_phy_status(tp, 0); +- +- if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 || +- tp->version == RTL_VER_05) +- ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L); ++ if (data == PHY_STAT_EXT_INIT) { ++ data = ocp_reg_read(tp, 0xa468); ++ data &= ~(BIT(3) | BIT(1)); ++ ocp_reg_write(tp, 0xa468, data); ++ } + + data = r8152_mdio_read(tp, MII_BMCR); + if (data & BMCR_PDOWN) { +@@ -5433,118 +7381,57 @@ static void r8153_init(struct r8152 *tp) + } + + data = r8153_phy_status(tp, PHY_STAT_LAN_ON); ++ WARN_ON_ONCE(data != PHY_STAT_LAN_ON); + + r8153_u2p3en(tp, false); + +- if (tp->version == RTL_VER_04) { +- ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2); +- ocp_data &= ~pwd_dn_scale_mask; +- ocp_data |= pwd_dn_scale(96); +- ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data); +- +- ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY); +- ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND; +- ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data); +- } else if (tp->version == RTL_VER_05) { +- ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0); +- ocp_data &= ~ECM_ALDPS; +- ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data); ++ /* MSC timer = 0xfff * 8ms = 32760 ms */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff); + +- ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1); +- if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0) +- ocp_data &= ~DYNAMIC_BURST; +- else +- ocp_data |= DYNAMIC_BURST; +- ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data); +- } else if (tp->version == RTL_VER_06) { +- ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1); +- if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0) +- ocp_data &= ~DYNAMIC_BURST; +- else +- ocp_data |= DYNAMIC_BURST; +- ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data); ++ /* U1/U2/L1 idle timer. 500 us */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500); + +- r8153_queue_wake(tp, false); ++ r8153b_power_cut_en(tp, false); ++ r8156_ups_en(tp, false); ++ r8153_queue_wake(tp, false); ++ rtl_runtime_suspend_enable(tp, false); + +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); +- if (rtl8152_get_speed(tp) & LINK_STATUS) +- ocp_data |= CUR_LINK_OK; +- else +- ocp_data &= ~CUR_LINK_OK; +- ocp_data |= POLL_LINK_CHG; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); +- } ++ if (tp->udev->speed >= USB_SPEED_SUPER) ++ r8153b_u1u2en(tp, true); + +- ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2); +- ocp_data |= EP4_FULL_FC; +- ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data); ++ usb_enable_lpm(tp->udev); + +- ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL); +- ocp_data &= ~TIMER11_EN; +- ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data); ++ r8156_mac_clk_spd(tp, true); + +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE); +- ocp_data &= ~LED_MODE_MASK; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data); ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3); ++ ocp_data &= ~PLA_MCU_SPDWN_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); + +- ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM; +- if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER) +- ocp_data |= LPM_TIMER_500MS; ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); ++ if (rtl8152_get_speed(tp) & LINK_STATUS) ++ ocp_data |= CUR_LINK_OK; + else +- ocp_data |= LPM_TIMER_500US; +- ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data); +- +- ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2); +- ocp_data &= ~SEN_VAL_MASK; +- ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE; +- ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data); +- +- ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001); +- +- /* MAC clock speed down */ +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0); +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0); +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0); +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0); +- +- r8153_power_cut_en(tp, false); +- rtl_runtime_suspend_enable(tp, false); +- r8153_u1u2en(tp, true); +- usb_enable_lpm(tp->udev); +- +- ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG6); +- ocp_data |= LANWAKE_CLR_EN; +- ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG6, ocp_data); ++ ocp_data &= ~CUR_LINK_OK; ++ ocp_data |= POLL_LINK_CHG; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); + +- ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_LWAKE_CTRL_REG); +- ocp_data &= ~LANWAKE_PIN; +- ocp_write_byte(tp, MCU_TYPE_PLA, PLA_LWAKE_CTRL_REG, ocp_data); ++ set_bit(GREEN_ETHERNET, &tp->flags); + + /* rx aggregation */ + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); +- if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags)) +- ocp_data |= RX_AGG_DISABLE; +- + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); + ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_CONFIG); ++ ocp_data |= ACT_ODMA; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_CONFIG, ocp_data); ++ + rtl_tally_reset(tp); + +- switch (tp->udev->speed) { +- case USB_SPEED_SUPER: +- case USB_SPEED_SUPER_PLUS: +- tp->coalesce = COALESCE_SUPER; +- break; +- case USB_SPEED_HIGH: +- tp->coalesce = COALESCE_HIGH; +- break; +- default: +- tp->coalesce = COALESCE_SLOW; +- break; +- } ++ tp->coalesce = 15000; /* 15 us */ + } + +-static void r8153b_init(struct r8152 *tp) ++static void r8156b_init(struct r8152 *tp) + { + u32 ocp_data; + u16 data; +@@ -5553,8 +7440,31 @@ static void r8153b_init(struct r8152 *tp) + if (test_bit(RTL8152_UNPLUG, &tp->flags)) + return; + ++ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_ECM_OP); ++ ocp_data &= ~EN_ALL_SPEED; ++ ocp_write_byte(tp, MCU_TYPE_USB, USB_ECM_OP, ocp_data); ++ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_SPEED_OPTION, 0); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_ECM_OPTION); ++ ocp_data |= BYPASS_MAC_RESET; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_ECM_OPTION, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL); ++ ocp_data |= RX_DETECT8; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data); ++ + r8153b_u1u2en(tp, false); + ++ switch (tp->version) { ++ case RTL_VER_13: ++ case RTL_VER_15: ++ r8156b_wait_loading_flash(tp); ++ break; ++ default: ++ break; ++ } ++ + for (i = 0; i < 500; i++) { + if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & + AUTOLOAD_DONE) +@@ -5562,10 +7472,19 @@ static void r8153b_init(struct r8152 *tp) + + msleep(20); + if (test_bit(RTL8152_UNPLUG, &tp->flags)) +- break; ++ return; + } + + data = r8153_phy_status(tp, 0); ++ if (data == PHY_STAT_EXT_INIT) { ++ data = ocp_reg_read(tp, 0xa468); ++ data &= ~(BIT(3) | BIT(1)); ++ ocp_reg_write(tp, 0xa468, data); ++ ++ data = ocp_reg_read(tp, 0xa466); ++ data &= ~BIT(0); ++ ocp_reg_write(tp, 0xa466, data); ++ } + + data = r8152_mdio_read(tp, MII_BMCR); + if (data & BMCR_PDOWN) { +@@ -5580,41 +7499,54 @@ static void r8153b_init(struct r8152 *tp) + /* MSC timer = 0xfff * 8ms = 32760 ms */ + ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff); + ++ /* U1/U2/L1 idle timer. 500 us */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500); ++ + r8153b_power_cut_en(tp, false); +- r8153b_ups_en(tp, false); ++ r8156_ups_en(tp, false); + r8153_queue_wake(tp, false); + rtl_runtime_suspend_enable(tp, false); + +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); +- if (rtl8152_get_speed(tp) & LINK_STATUS) +- ocp_data |= CUR_LINK_OK; +- else +- ocp_data &= ~CUR_LINK_OK; +- ocp_data |= POLL_LINK_CHG; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); +- + if (tp->udev->speed >= USB_SPEED_SUPER) + r8153b_u1u2en(tp, true); + + usb_enable_lpm(tp->udev); + +- /* MAC clock speed down */ +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2); +- ocp_data |= MAC_CLK_SPDWN_EN; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data); ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RCR); ++ ocp_data &= ~SLOT_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); ++ ocp_data |= FLOW_CTRL_EN; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); ++ ++ /* enable fc timer and set timer to 600 ms. */ ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FC_TIMER, ++ CTRL_TIMER_EN | (600 / 8)); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_CTRL); ++ if (!(ocp_read_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL) & DACK_DET_EN)) ++ ocp_data |= FLOW_CTRL_PATCH_2; ++ ocp_data &= ~AUTO_SPEEDUP; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_CTRL, ocp_data); ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_TASK); ++ ocp_data |= FC_PATCH_TASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ ++ r8156_mac_clk_spd(tp, true); + + ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3); + ocp_data &= ~PLA_MCU_SPDWN_EN; + ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); + +- if (tp->version == RTL_VER_09) { +- /* Disable Test IO for 32QFN */ +- if (ocp_read_byte(tp, MCU_TYPE_PLA, 0xdc00) & BIT(5)) { +- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); +- ocp_data |= TEST_IO_OFF; +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); +- } +- } ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS); ++ if (rtl8152_get_speed(tp) & LINK_STATUS) ++ ocp_data |= CUR_LINK_OK; ++ else ++ ocp_data &= ~CUR_LINK_OK; ++ ocp_data |= POLL_LINK_CHG; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data); + + set_bit(GREEN_ETHERNET, &tp->flags); + +@@ -5991,6 +7923,22 @@ int rtl8152_get_link_ksettings(struct net_device *netdev, + + mii_ethtool_get_link_ksettings(&tp->mii, cmd); + ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ cmd->link_modes.supported, tp->support_2500full); ++ ++ if (tp->support_2500full) { ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ cmd->link_modes.advertising, ++ ocp_reg_read(tp, OCP_10GBT_CTRL) & MDIO_AN_10GBT_CTRL_ADV2_5G); ++ ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ cmd->link_modes.lp_advertising, ++ ocp_reg_read(tp, OCP_10GBT_STAT) & MDIO_AN_10GBT_STAT_LP2_5G); ++ ++ if (is_speed_2500(rtl8152_get_speed(tp))) ++ cmd->base.speed = SPEED_2500; ++ } ++ + mutex_unlock(&tp->control); + + usb_autopm_put_interface(tp->intf); +@@ -6034,6 +7982,10 @@ static int rtl8152_set_link_ksettings(struct net_device *dev, + cmd->link_modes.advertising)) + advertising |= RTL_ADVERTISED_1000_FULL; + ++ if (test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ cmd->link_modes.advertising)) ++ advertising |= RTL_ADVERTISED_2500_FULL; ++ + mutex_lock(&tp->control); + + ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed, +@@ -6623,6 +8575,67 @@ static int rtl_ops_init(struct r8152 *tp) + tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX; + break; + ++ case RTL_VER_11: ++ tp->eee_en = true; ++ tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX; ++ fallthrough; ++ case RTL_VER_10: ++ ops->init = r8156_init; ++ ops->enable = rtl8156_enable; ++ ops->disable = rtl8153_disable; ++ ops->up = rtl8156_up; ++ ops->down = rtl8156_down; ++ ops->unload = rtl8153_unload; ++ ops->eee_get = r8153_get_eee; ++ ops->eee_set = r8152_set_eee; ++ ops->in_nway = rtl8153_in_nway; ++ ops->hw_phy_cfg = r8156_hw_phy_cfg; ++ ops->autosuspend_en = rtl8156_runtime_enable; ++ ops->change_mtu = rtl8156_change_mtu; ++ tp->rx_buf_sz = 48 * 1024; ++ tp->support_2500full = 1; ++ break; ++ ++ case RTL_VER_12: ++ case RTL_VER_13: ++ tp->support_2500full = 1; ++ fallthrough; ++ case RTL_VER_15: ++ tp->eee_en = true; ++ tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX; ++ ops->init = r8156b_init; ++ ops->enable = rtl8156b_enable; ++ ops->disable = rtl8153_disable; ++ ops->up = rtl8156_up; ++ ops->down = rtl8156_down; ++ ops->unload = rtl8153_unload; ++ ops->eee_get = r8153_get_eee; ++ ops->eee_set = r8152_set_eee; ++ ops->in_nway = rtl8153_in_nway; ++ ops->hw_phy_cfg = r8156b_hw_phy_cfg; ++ ops->autosuspend_en = rtl8156_runtime_enable; ++ ops->change_mtu = rtl8156_change_mtu; ++ tp->rx_buf_sz = 48 * 1024; ++ break; ++ ++ case RTL_VER_14: ++ ops->init = r8153c_init; ++ ops->enable = rtl8153_enable; ++ ops->disable = rtl8153_disable; ++ ops->up = rtl8153c_up; ++ ops->down = rtl8153b_down; ++ ops->unload = rtl8153_unload; ++ ops->eee_get = r8153_get_eee; ++ ops->eee_set = r8152_set_eee; ++ ops->in_nway = rtl8153_in_nway; ++ ops->hw_phy_cfg = r8153c_hw_phy_cfg; ++ ops->autosuspend_en = rtl8153c_runtime_enable; ++ ops->change_mtu = rtl8153c_change_mtu; ++ tp->rx_buf_sz = 32 * 1024; ++ tp->eee_en = true; ++ tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX; ++ break; ++ + default: + ret = -ENODEV; + dev_err(&tp->intf->dev, "Unknown Device\n"); +@@ -6636,11 +8649,13 @@ static int rtl_ops_init(struct r8152 *tp) + #define FIRMWARE_8153A_3 "rtl_nic/rtl8153a-3.fw" + #define FIRMWARE_8153A_4 "rtl_nic/rtl8153a-4.fw" + #define FIRMWARE_8153B_2 "rtl_nic/rtl8153b-2.fw" ++#define FIRMWARE_8153C_1 "rtl_nic/rtl8153c-1.fw" + + MODULE_FIRMWARE(FIRMWARE_8153A_2); + MODULE_FIRMWARE(FIRMWARE_8153A_3); + MODULE_FIRMWARE(FIRMWARE_8153A_4); + MODULE_FIRMWARE(FIRMWARE_8153B_2); ++MODULE_FIRMWARE(FIRMWARE_8153C_1); + + static int rtl_fw_init(struct r8152 *tp) + { +@@ -6666,6 +8681,11 @@ static int rtl_fw_init(struct r8152 *tp) + rtl_fw->pre_fw = r8153b_pre_firmware_1; + rtl_fw->post_fw = r8153b_post_firmware_1; + break; ++ case RTL_VER_14: ++ rtl_fw->fw_name = FIRMWARE_8153C_1; ++ rtl_fw->pre_fw = r8153b_pre_firmware_1; ++ rtl_fw->post_fw = r8153c_post_firmware_1; ++ break; + default: + break; + } +@@ -6721,6 +8741,27 @@ u8 rtl8152_get_version(struct usb_interface *intf) + case 0x6010: + version = RTL_VER_09; + break; ++ case 0x7010: ++ version = RTL_TEST_01; ++ break; ++ case 0x7020: ++ version = RTL_VER_10; ++ break; ++ case 0x7030: ++ version = RTL_VER_11; ++ break; ++ case 0x7400: ++ version = RTL_VER_12; ++ break; ++ case 0x7410: ++ version = RTL_VER_13; ++ break; ++ case 0x6400: ++ version = RTL_VER_14; ++ break; ++ case 0x7420: ++ version = RTL_VER_15; ++ break; + default: + version = RTL_VER_UNKNOWN; + dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data); +@@ -6833,12 +8874,29 @@ static int rtl8152_probe(struct usb_interface *intf, + /* MTU range: 68 - 1500 or 9194 */ + netdev->min_mtu = ETH_MIN_MTU; + switch (tp->version) { ++ case RTL_VER_03: ++ case RTL_VER_04: ++ case RTL_VER_05: ++ case RTL_VER_06: ++ case RTL_VER_08: ++ case RTL_VER_09: ++ case RTL_VER_14: ++ netdev->max_mtu = size_to_mtu(9 * 1024); ++ break; ++ case RTL_VER_10: ++ case RTL_VER_11: ++ netdev->max_mtu = size_to_mtu(15 * 1024); ++ break; ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ netdev->max_mtu = size_to_mtu(16 * 1024); ++ break; + case RTL_VER_01: + case RTL_VER_02: +- netdev->max_mtu = ETH_DATA_LEN; +- break; ++ case RTL_VER_07: + default: +- netdev->max_mtu = size_to_mtu(9 * 1024); ++ netdev->max_mtu = ETH_DATA_LEN; + break; + } + +@@ -6854,7 +8912,13 @@ static int rtl8152_probe(struct usb_interface *intf, + tp->advertising = RTL_ADVERTISED_10_HALF | RTL_ADVERTISED_10_FULL | + RTL_ADVERTISED_100_HALF | RTL_ADVERTISED_100_FULL; + if (tp->mii.supports_gmii) { +- tp->speed = SPEED_1000; ++ if (tp->support_2500full && ++ tp->udev->speed >= USB_SPEED_SUPER) { ++ tp->speed = SPEED_2500; ++ tp->advertising |= RTL_ADVERTISED_2500_FULL; ++ } else { ++ tp->speed = SPEED_1000; ++ } + tp->advertising |= RTL_ADVERTISED_1000_FULL; + } + tp->duplex = DUPLEX_FULL; +@@ -6878,7 +8942,11 @@ static int rtl8152_probe(struct usb_interface *intf, + set_ethernet_addr(tp); + + usb_set_intfdata(intf, tp); +- netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT); ++ ++ if (tp->support_2500full) ++ netif_napi_add(netdev, &tp->napi, r8152_poll, 256); ++ else ++ netif_napi_add(netdev, &tp->napi, r8152_poll, 64); + + ret = register_netdev(netdev); + if (ret != 0) { +@@ -6914,7 +8982,8 @@ static void rtl8152_disconnect(struct usb_interface *intf) + unregister_netdev(tp->netdev); + tasklet_kill(&tp->tx_tl); + cancel_delayed_work_sync(&tp->hw_phy_work); +- tp->rtl_ops.unload(tp); ++ if (tp->rtl_ops.unload) ++ tp->rtl_ops.unload(tp); + rtl8152_release_firmware(tp); + free_netdev(tp->netdev); + } +@@ -6934,13 +9003,28 @@ static void rtl8152_disconnect(struct usb_interface *intf) + .idProduct = (prod), \ + .bInterfaceClass = USB_CLASS_COMM, \ + .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \ ++ .bInterfaceProtocol = USB_CDC_PROTO_NONE \ ++}, \ ++{ \ ++ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \ ++ USB_DEVICE_ID_MATCH_DEVICE, \ ++ .idVendor = (vend), \ ++ .idProduct = (prod), \ ++ .bInterfaceClass = USB_CLASS_COMM, \ ++ .bInterfaceSubClass = USB_CDC_SUBCLASS_NCM, \ + .bInterfaceProtocol = USB_CDC_PROTO_NONE + + /* table of devices that work with this driver */ + static const struct usb_device_id rtl8152_table[] = { ++ /* Realtek */ + {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)}, ++ {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8053)}, + {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)}, + {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)}, ++ {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8155)}, ++ {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8156)}, ++ ++ /* Microsoft */ + {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)}, + {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)}, + {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x0927)}, +-- +2.18.4 + + +From 5c80ec1c729ec50288984f653c986a036b9eba4e Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 16 Apr 2021 16:04:36 +0800 +Subject: [PATCH 612/661] r8152: support PHY firmware for RTL8156 series + +commit 4a51b0e8a0143b0e83d51d9c58c6416c3818a9f2 upstream. + +Support new firmware type and method for RTL8156 series. + +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +--- + drivers/net/usb/r8152.c | 563 +++++++++++++++++++++++++++++++++++++++- + 1 file changed, 561 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 72b8ef0ad5a1..34c1ee61af01 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -974,8 +974,60 @@ enum rtl8152_fw_flags { + FW_FLAGS_START, + FW_FLAGS_STOP, + FW_FLAGS_NC, ++ FW_FLAGS_NC1, ++ FW_FLAGS_NC2, ++ FW_FLAGS_UC2, ++ FW_FLAGS_UC, ++ FW_FLAGS_SPEED_UP, ++ FW_FLAGS_VER, + }; + ++enum rtl8152_fw_fixup_cmd { ++ FW_FIXUP_AND = 0, ++ FW_FIXUP_OR, ++ FW_FIXUP_NOT, ++ FW_FIXUP_XOR, ++}; ++ ++struct fw_phy_set { ++ __le16 addr; ++ __le16 data; ++} __packed; ++ ++struct fw_phy_speed_up { ++ struct fw_block blk_hdr; ++ __le16 fw_offset; ++ __le16 version; ++ __le16 fw_reg; ++ __le16 reserved; ++ char info[]; ++} __packed; ++ ++struct fw_phy_ver { ++ struct fw_block blk_hdr; ++ struct fw_phy_set ver; ++ __le32 reserved; ++} __packed; ++ ++struct fw_phy_fixup { ++ struct fw_block blk_hdr; ++ struct fw_phy_set setting; ++ __le16 bit_cmd; ++ __le16 reserved; ++} __packed; ++ ++struct fw_phy_union { ++ struct fw_block blk_hdr; ++ __le16 fw_offset; ++ __le16 fw_reg; ++ struct fw_phy_set pre_set[2]; ++ struct fw_phy_set bp[8]; ++ struct fw_phy_set bp_en; ++ u8 pre_num; ++ u8 bp_num; ++ char info[]; ++} __packed; ++ + /** + * struct fw_mac - a firmware block used by RTL_FW_PLA and RTL_FW_USB. + * The layout of the firmware block is: +@@ -1080,6 +1132,15 @@ enum rtl_fw_type { + RTL_FW_PHY_START, + RTL_FW_PHY_STOP, + RTL_FW_PHY_NC, ++ RTL_FW_PHY_FIXUP, ++ RTL_FW_PHY_UNION_NC, ++ RTL_FW_PHY_UNION_NC1, ++ RTL_FW_PHY_UNION_NC2, ++ RTL_FW_PHY_UNION_UC2, ++ RTL_FW_PHY_UNION_UC, ++ RTL_FW_PHY_UNION_MISC, ++ RTL_FW_PHY_SPEED_UP, ++ RTL_FW_PHY_VER, + }; + + enum rtl_version { +@@ -3999,6 +4060,162 @@ static int rtl_post_ram_code(struct r8152 *tp, u16 key_addr, bool wait) + return 0; + } + ++static bool rtl8152_is_fw_phy_speed_up_ok(struct r8152 *tp, struct fw_phy_speed_up *phy) ++{ ++ u16 fw_offset; ++ u32 length; ++ bool rc = false; ++ ++ switch (tp->version) { ++ case RTL_VER_01: ++ case RTL_VER_02: ++ case RTL_VER_03: ++ case RTL_VER_04: ++ case RTL_VER_05: ++ case RTL_VER_06: ++ case RTL_VER_07: ++ case RTL_VER_08: ++ case RTL_VER_09: ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_14: ++ goto out; ++ case RTL_VER_13: ++ case RTL_VER_15: ++ default: ++ break; ++ } ++ ++ fw_offset = __le16_to_cpu(phy->fw_offset); ++ length = __le32_to_cpu(phy->blk_hdr.length); ++ if (fw_offset < sizeof(*phy) || length <= fw_offset) { ++ dev_err(&tp->intf->dev, "invalid fw_offset\n"); ++ goto out; ++ } ++ ++ length -= fw_offset; ++ if (length & 3) { ++ dev_err(&tp->intf->dev, "invalid block length\n"); ++ goto out; ++ } ++ ++ if (__le16_to_cpu(phy->fw_reg) != 0x9A00) { ++ dev_err(&tp->intf->dev, "invalid register to load firmware\n"); ++ goto out; ++ } ++ ++ rc = true; ++out: ++ return rc; ++} ++ ++static bool rtl8152_is_fw_phy_ver_ok(struct r8152 *tp, struct fw_phy_ver *ver) ++{ ++ bool rc = false; ++ ++ switch (tp->version) { ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ break; ++ default: ++ goto out; ++ } ++ ++ if (__le32_to_cpu(ver->blk_hdr.length) != sizeof(*ver)) { ++ dev_err(&tp->intf->dev, "invalid block length\n"); ++ goto out; ++ } ++ ++ if (__le16_to_cpu(ver->ver.addr) != SRAM_GPHY_FW_VER) { ++ dev_err(&tp->intf->dev, "invalid phy ver addr\n"); ++ goto out; ++ } ++ ++ rc = true; ++out: ++ return rc; ++} ++ ++static bool rtl8152_is_fw_phy_fixup_ok(struct r8152 *tp, struct fw_phy_fixup *fix) ++{ ++ bool rc = false; ++ ++ switch (tp->version) { ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ break; ++ default: ++ goto out; ++ } ++ ++ if (__le32_to_cpu(fix->blk_hdr.length) != sizeof(*fix)) { ++ dev_err(&tp->intf->dev, "invalid block length\n"); ++ goto out; ++ } ++ ++ if (__le16_to_cpu(fix->setting.addr) != OCP_PHY_PATCH_CMD || ++ __le16_to_cpu(fix->setting.data) != BIT(7)) { ++ dev_err(&tp->intf->dev, "invalid phy fixup\n"); ++ goto out; ++ } ++ ++ rc = true; ++out: ++ return rc; ++} ++ ++static bool rtl8152_is_fw_phy_union_ok(struct r8152 *tp, struct fw_phy_union *phy) ++{ ++ u16 fw_offset; ++ u32 length; ++ bool rc = false; ++ ++ switch (tp->version) { ++ case RTL_VER_10: ++ case RTL_VER_11: ++ case RTL_VER_12: ++ case RTL_VER_13: ++ case RTL_VER_15: ++ break; ++ default: ++ goto out; ++ } ++ ++ fw_offset = __le16_to_cpu(phy->fw_offset); ++ length = __le32_to_cpu(phy->blk_hdr.length); ++ if (fw_offset < sizeof(*phy) || length <= fw_offset) { ++ dev_err(&tp->intf->dev, "invalid fw_offset\n"); ++ goto out; ++ } ++ ++ length -= fw_offset; ++ if (length & 1) { ++ dev_err(&tp->intf->dev, "invalid block length\n"); ++ goto out; ++ } ++ ++ if (phy->pre_num > 2) { ++ dev_err(&tp->intf->dev, "invalid pre_num %d\n", phy->pre_num); ++ goto out; ++ } ++ ++ if (phy->bp_num > 8) { ++ dev_err(&tp->intf->dev, "invalid bp_num %d\n", phy->bp_num); ++ goto out; ++ } ++ ++ rc = true; ++out: ++ return rc; ++} ++ + static bool rtl8152_is_fw_phy_nc_ok(struct r8152 *tp, struct fw_phy_nc *phy) + { + u32 length; +@@ -4319,6 +4536,10 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + case RTL_FW_PHY_START: + if (test_bit(FW_FLAGS_START, &fw_flags) || + test_bit(FW_FLAGS_NC, &fw_flags) || ++ test_bit(FW_FLAGS_NC1, &fw_flags) || ++ test_bit(FW_FLAGS_NC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC, &fw_flags) || + test_bit(FW_FLAGS_STOP, &fw_flags)) { + dev_err(&tp->intf->dev, + "check PHY_START fail\n"); +@@ -4367,7 +4588,153 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + goto fail; + } + __set_bit(FW_FLAGS_NC, &fw_flags); ++ break; ++ case RTL_FW_PHY_UNION_NC: ++ if (!test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_NC1, &fw_flags) || ++ test_bit(FW_FLAGS_NC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "PHY_UNION_NC out of order\n"); ++ goto fail; ++ } ++ ++ if (test_bit(FW_FLAGS_NC, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY_UNION_NC encountered\n"); ++ goto fail; ++ } ++ ++ if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) { ++ dev_err(&tp->intf->dev, "check PHY_UNION_NC failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_NC, &fw_flags); ++ break; ++ case RTL_FW_PHY_UNION_NC1: ++ if (!test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_NC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "PHY_UNION_NC1 out of order\n"); ++ goto fail; ++ } ++ ++ if (test_bit(FW_FLAGS_NC1, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY NC1 encountered\n"); ++ goto fail; ++ } ++ ++ if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) { ++ dev_err(&tp->intf->dev, "check PHY_UNION_NC1 failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_NC1, &fw_flags); ++ break; ++ case RTL_FW_PHY_UNION_NC2: ++ if (!test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_UC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "PHY_UNION_NC2 out of order\n"); ++ goto fail; ++ } ++ ++ if (test_bit(FW_FLAGS_NC2, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY NC2 encountered\n"); ++ goto fail; ++ } ++ ++ if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) { ++ dev_err(&tp->intf->dev, "check PHY_UNION_NC2 failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_NC2, &fw_flags); ++ break; ++ case RTL_FW_PHY_UNION_UC2: ++ if (!test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_UC, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "PHY_UNION_UC2 out of order\n"); ++ goto fail; ++ } ++ ++ if (test_bit(FW_FLAGS_UC2, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY UC2 encountered\n"); ++ goto fail; ++ } ++ ++ if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) { ++ dev_err(&tp->intf->dev, "check PHY_UNION_UC2 failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_UC2, &fw_flags); ++ break; ++ case RTL_FW_PHY_UNION_UC: ++ if (!test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "PHY_UNION_UC out of order\n"); ++ goto fail; ++ } ++ ++ if (test_bit(FW_FLAGS_UC, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY UC encountered\n"); ++ goto fail; ++ } ++ ++ if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) { ++ dev_err(&tp->intf->dev, "check PHY_UNION_UC failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_UC, &fw_flags); ++ break; ++ case RTL_FW_PHY_UNION_MISC: ++ if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) { ++ dev_err(&tp->intf->dev, "check RTL_FW_PHY_UNION_MISC failed\n"); ++ goto fail; ++ } ++ break; ++ case RTL_FW_PHY_FIXUP: ++ if (!rtl8152_is_fw_phy_fixup_ok(tp, (struct fw_phy_fixup *)block)) { ++ dev_err(&tp->intf->dev, "check PHY fixup failed\n"); ++ goto fail; ++ } ++ break; ++ case RTL_FW_PHY_SPEED_UP: ++ if (test_bit(FW_FLAGS_SPEED_UP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY firmware encountered"); ++ goto fail; ++ } + ++ if (!rtl8152_is_fw_phy_speed_up_ok(tp, (struct fw_phy_speed_up *)block)) { ++ dev_err(&tp->intf->dev, "check PHY speed up failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_SPEED_UP, &fw_flags); ++ break; ++ case RTL_FW_PHY_VER: ++ if (test_bit(FW_FLAGS_START, &fw_flags) || ++ test_bit(FW_FLAGS_NC, &fw_flags) || ++ test_bit(FW_FLAGS_NC1, &fw_flags) || ++ test_bit(FW_FLAGS_NC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC2, &fw_flags) || ++ test_bit(FW_FLAGS_UC, &fw_flags) || ++ test_bit(FW_FLAGS_STOP, &fw_flags)) { ++ dev_err(&tp->intf->dev, "Invalid order to set PHY version\n"); ++ goto fail; ++ } ++ ++ if (test_bit(FW_FLAGS_VER, &fw_flags)) { ++ dev_err(&tp->intf->dev, "multiple PHY version encountered"); ++ goto fail; ++ } ++ ++ if (!rtl8152_is_fw_phy_ver_ok(tp, (struct fw_phy_ver *)block)) { ++ dev_err(&tp->intf->dev, "check PHY version failed\n"); ++ goto fail; ++ } ++ __set_bit(FW_FLAGS_VER, &fw_flags); + break; + default: + dev_warn(&tp->intf->dev, "Unknown type %u is found\n", +@@ -4390,6 +4757,143 @@ static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw) + return ret; + } + ++static void rtl_ram_code_speed_up(struct r8152 *tp, struct fw_phy_speed_up *phy, bool wait) ++{ ++ u32 len; ++ u8 *data; ++ ++ if (sram_read(tp, SRAM_GPHY_FW_VER) >= __le16_to_cpu(phy->version)) { ++ dev_dbg(&tp->intf->dev, "PHY firmware has been the newest\n"); ++ return; ++ } ++ ++ len = __le32_to_cpu(phy->blk_hdr.length); ++ len -= __le16_to_cpu(phy->fw_offset); ++ data = (u8 *)phy + __le16_to_cpu(phy->fw_offset); ++ ++ if (rtl_phy_patch_request(tp, true, wait)) ++ return; ++ ++ while (len) { ++ u32 ocp_data, size; ++ int i; ++ ++ if (len < 2048) ++ size = len; ++ else ++ size = 2048; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_GPHY_CTRL); ++ ocp_data |= GPHY_PATCH_DONE | BACKUP_RESTRORE; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_GPHY_CTRL, ocp_data); ++ ++ generic_ocp_write(tp, __le16_to_cpu(phy->fw_reg), 0xff, size, data, MCU_TYPE_USB); ++ ++ data += size; ++ len -= size; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL); ++ ocp_data |= POL_GPHY_PATCH; ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL, ocp_data); ++ ++ for (i = 0; i < 1000; i++) { ++ if (!(ocp_read_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL) & POL_GPHY_PATCH)) ++ break; ++ } ++ ++ if (i == 1000) { ++ dev_err(&tp->intf->dev, "ram code speedup mode timeout\n"); ++ return; ++ } ++ } ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, tp->ocp_base); ++ rtl_phy_patch_request(tp, false, wait); ++ ++ if (sram_read(tp, SRAM_GPHY_FW_VER) == __le16_to_cpu(phy->version)) ++ dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info); ++ else ++ dev_err(&tp->intf->dev, "ram code speedup mode fail\n"); ++} ++ ++static int rtl8152_fw_phy_ver(struct r8152 *tp, struct fw_phy_ver *phy_ver) ++{ ++ u16 ver_addr, ver; ++ ++ ver_addr = __le16_to_cpu(phy_ver->ver.addr); ++ ver = __le16_to_cpu(phy_ver->ver.data); ++ ++ if (sram_read(tp, ver_addr) >= ver) { ++ dev_dbg(&tp->intf->dev, "PHY firmware has been the newest\n"); ++ return 0; ++ } ++ ++ sram_write(tp, ver_addr, ver); ++ ++ dev_dbg(&tp->intf->dev, "PHY firmware version %x\n", ver); ++ ++ return ver; ++} ++ ++static void rtl8152_fw_phy_fixup(struct r8152 *tp, struct fw_phy_fixup *fix) ++{ ++ u16 addr, data; ++ ++ addr = __le16_to_cpu(fix->setting.addr); ++ data = ocp_reg_read(tp, addr); ++ ++ switch (__le16_to_cpu(fix->bit_cmd)) { ++ case FW_FIXUP_AND: ++ data &= __le16_to_cpu(fix->setting.data); ++ break; ++ case FW_FIXUP_OR: ++ data |= __le16_to_cpu(fix->setting.data); ++ break; ++ case FW_FIXUP_NOT: ++ data &= ~__le16_to_cpu(fix->setting.data); ++ break; ++ case FW_FIXUP_XOR: ++ data ^= __le16_to_cpu(fix->setting.data); ++ break; ++ default: ++ return; ++ } ++ ++ ocp_reg_write(tp, addr, data); ++ ++ dev_dbg(&tp->intf->dev, "applied ocp %x %x\n", addr, data); ++} ++ ++static void rtl8152_fw_phy_union_apply(struct r8152 *tp, struct fw_phy_union *phy) ++{ ++ __le16 *data; ++ u32 length; ++ int i, num; ++ ++ num = phy->pre_num; ++ for (i = 0; i < num; i++) ++ sram_write(tp, __le16_to_cpu(phy->pre_set[i].addr), ++ __le16_to_cpu(phy->pre_set[i].data)); ++ ++ length = __le32_to_cpu(phy->blk_hdr.length); ++ length -= __le16_to_cpu(phy->fw_offset); ++ num = length / 2; ++ data = (__le16 *)((u8 *)phy + __le16_to_cpu(phy->fw_offset)); ++ ++ ocp_reg_write(tp, OCP_SRAM_ADDR, __le16_to_cpu(phy->fw_reg)); ++ for (i = 0; i < num; i++) ++ ocp_reg_write(tp, OCP_SRAM_DATA, __le16_to_cpu(data[i])); ++ ++ num = phy->bp_num; ++ for (i = 0; i < num; i++) ++ sram_write(tp, __le16_to_cpu(phy->bp[i].addr), __le16_to_cpu(phy->bp[i].data)); ++ ++ if (phy->bp_num && phy->bp_en.addr) ++ sram_write(tp, __le16_to_cpu(phy->bp_en.addr), __le16_to_cpu(phy->bp_en.data)); ++ ++ dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info); ++} ++ + static void rtl8152_fw_phy_nc_apply(struct r8152 *tp, struct fw_phy_nc *phy) + { + u16 mode_reg, bp_index; +@@ -4443,6 +4947,12 @@ static void rtl8152_fw_mac_apply(struct r8152 *tp, struct fw_mac *mac) + return; + } + ++ fw_ver_reg = __le16_to_cpu(mac->fw_ver_reg); ++ if (fw_ver_reg && ocp_read_byte(tp, MCU_TYPE_USB, fw_ver_reg) >= mac->fw_ver_data) { ++ dev_dbg(&tp->intf->dev, "%s firmware has been the newest\n", type ? "PLA" : "USB"); ++ return; ++ } ++ + rtl_clear_bp(tp, type); + + /* Enable backup/restore of MACDBG. This is required after clearing PLA +@@ -4478,7 +4988,6 @@ static void rtl8152_fw_mac_apply(struct r8152 *tp, struct fw_mac *mac) + ocp_write_word(tp, type, bp_en_addr, + __le16_to_cpu(mac->bp_en_value)); + +- fw_ver_reg = __le16_to_cpu(mac->fw_ver_reg); + if (fw_ver_reg) + ocp_write_byte(tp, MCU_TYPE_USB, fw_ver_reg, + mac->fw_ver_data); +@@ -4493,7 +5002,7 @@ static void rtl8152_apply_firmware(struct r8152 *tp, bool power_cut) + struct fw_header *fw_hdr; + struct fw_phy_patch_key *key; + u16 key_addr = 0; +- int i; ++ int i, patch_phy = 1; + + if (IS_ERR_OR_NULL(rtl_fw->fw)) + return; +@@ -4515,17 +5024,40 @@ static void rtl8152_apply_firmware(struct r8152 *tp, bool power_cut) + rtl8152_fw_mac_apply(tp, (struct fw_mac *)block); + break; + case RTL_FW_PHY_START: ++ if (!patch_phy) ++ break; + key = (struct fw_phy_patch_key *)block; + key_addr = __le16_to_cpu(key->key_reg); + rtl_pre_ram_code(tp, key_addr, __le16_to_cpu(key->key_data), !power_cut); + break; + case RTL_FW_PHY_STOP: ++ if (!patch_phy) ++ break; + WARN_ON(!key_addr); + rtl_post_ram_code(tp, key_addr, !power_cut); + break; + case RTL_FW_PHY_NC: + rtl8152_fw_phy_nc_apply(tp, (struct fw_phy_nc *)block); + break; ++ case RTL_FW_PHY_VER: ++ patch_phy = rtl8152_fw_phy_ver(tp, (struct fw_phy_ver *)block); ++ break; ++ case RTL_FW_PHY_UNION_NC: ++ case RTL_FW_PHY_UNION_NC1: ++ case RTL_FW_PHY_UNION_NC2: ++ case RTL_FW_PHY_UNION_UC2: ++ case RTL_FW_PHY_UNION_UC: ++ case RTL_FW_PHY_UNION_MISC: ++ if (patch_phy) ++ rtl8152_fw_phy_union_apply(tp, (struct fw_phy_union *)block); ++ break; ++ case RTL_FW_PHY_FIXUP: ++ if (patch_phy) ++ rtl8152_fw_phy_fixup(tp, (struct fw_phy_fixup *)block); ++ break; ++ case RTL_FW_PHY_SPEED_UP: ++ rtl_ram_code_speed_up(tp, (struct fw_phy_speed_up *)block, !power_cut); ++ break; + default: + break; + } +@@ -5033,6 +5565,21 @@ static int r8153c_post_firmware_1(struct r8152 *tp) + return 0; + } + ++static int r8156a_post_firmware_1(struct r8152 *tp) ++{ ++ u32 ocp_data; ++ ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1); ++ ocp_data |= FW_IP_RESET_EN; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data); ++ ++ /* Modify U3PHY parameter for compatibility issue */ ++ ocp_write_dword(tp, MCU_TYPE_USB, USB_UPHY3_MDCMDIO, 0x4026840e); ++ ocp_write_dword(tp, MCU_TYPE_USB, USB_UPHY3_MDCMDIO, 0x4001acc9); ++ ++ return 0; ++} ++ + static void r8153_aldps_en(struct r8152 *tp, bool enable) + { + u16 data; +@@ -8650,12 +9197,16 @@ static int rtl_ops_init(struct r8152 *tp) + #define FIRMWARE_8153A_4 "rtl_nic/rtl8153a-4.fw" + #define FIRMWARE_8153B_2 "rtl_nic/rtl8153b-2.fw" + #define FIRMWARE_8153C_1 "rtl_nic/rtl8153c-1.fw" ++#define FIRMWARE_8156A_2 "rtl_nic/rtl8156a-2.fw" ++#define FIRMWARE_8156B_2 "rtl_nic/rtl8156b-2.fw" + + MODULE_FIRMWARE(FIRMWARE_8153A_2); + MODULE_FIRMWARE(FIRMWARE_8153A_3); + MODULE_FIRMWARE(FIRMWARE_8153A_4); + MODULE_FIRMWARE(FIRMWARE_8153B_2); + MODULE_FIRMWARE(FIRMWARE_8153C_1); ++MODULE_FIRMWARE(FIRMWARE_8156A_2); ++MODULE_FIRMWARE(FIRMWARE_8156B_2); + + static int rtl_fw_init(struct r8152 *tp) + { +@@ -8681,6 +9232,14 @@ static int rtl_fw_init(struct r8152 *tp) + rtl_fw->pre_fw = r8153b_pre_firmware_1; + rtl_fw->post_fw = r8153b_post_firmware_1; + break; ++ case RTL_VER_11: ++ rtl_fw->fw_name = FIRMWARE_8156A_2; ++ rtl_fw->post_fw = r8156a_post_firmware_1; ++ break; ++ case RTL_VER_13: ++ case RTL_VER_15: ++ rtl_fw->fw_name = FIRMWARE_8156B_2; ++ break; + case RTL_VER_14: + rtl_fw->fw_name = FIRMWARE_8153C_1; + rtl_fw->pre_fw = r8153b_pre_firmware_1; +-- +2.18.4 + + +From 6cec5a0d9576f5fdee7e1129e692457c80eac5eb Mon Sep 17 00:00:00 2001 +From: Hayes Wang +Date: Fri, 16 Apr 2021 16:04:37 +0800 +Subject: [PATCH 613/661] r8152: search the configuration of vendor mode + +commit c2198943e33b100ed21dfb636c8fa6baef841e9d upstream. + +The vendor mode is not always at config #1, so it is necessary to +set the correct configuration number. + +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +--- + drivers/net/usb/r8152.c | 39 +++++++++++++++++++++++++++++++++++---- + 1 file changed, 35 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 34c1ee61af01..9119a860e9bd 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -29,7 +29,7 @@ + #include + + /* Information for net-next */ +-#define NETNEXT_VERSION "11" ++#define NETNEXT_VERSION "12" + + /* Information for net */ + #define NET_VERSION "11" +@@ -8107,6 +8107,39 @@ static void r8156b_init(struct r8152 *tp) + tp->coalesce = 15000; /* 15 us */ + } + ++static bool rtl_vendor_mode(struct usb_interface *intf) ++{ ++ struct usb_host_interface *alt = intf->cur_altsetting; ++ struct usb_device *udev; ++ struct usb_host_config *c; ++ int i, num_configs; ++ ++ if (alt->desc.bInterfaceClass == USB_CLASS_VENDOR_SPEC) ++ return true; ++ ++ /* The vendor mode is not always config #1, so to find it out. */ ++ udev = interface_to_usbdev(intf); ++ c = udev->config; ++ num_configs = udev->descriptor.bNumConfigurations; ++ for (i = 0; i < num_configs; (i++, c++)) { ++ struct usb_interface_descriptor *desc = NULL; ++ ++ if (c->desc.bNumInterfaces > 0) ++ desc = &c->intf_cache[0]->altsetting->desc; ++ else ++ continue; ++ ++ if (desc->bInterfaceClass == USB_CLASS_VENDOR_SPEC) { ++ usb_driver_set_configuration(udev, c->desc.bConfigurationValue); ++ break; ++ } ++ } ++ ++ WARN_ON_ONCE(i == num_configs); ++ ++ return false; ++} ++ + static int rtl8152_pre_reset(struct usb_interface *intf) + { + struct r8152 *tp = usb_get_intfdata(intf); +@@ -9345,10 +9378,8 @@ static int rtl8152_probe(struct usb_interface *intf, + if (version == RTL_VER_UNKNOWN) + return -ENODEV; + +- if (udev->actconfig->desc.bConfigurationValue != 1) { +- usb_driver_set_configuration(udev, 1); ++ if (!rtl_vendor_mode(intf)) + return -ENODEV; +- } + + if (intf->cur_altsetting->desc.bNumEndpoints < 3) + return -ENODEV; +-- +2.18.4 + + +From b503b7e132588cd915e84109f0ab342ed13b49e9 Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Tue, 20 Apr 2021 13:34:18 +0100 +Subject: [PATCH 614/661] rpivid: Only clk_request_done once + +Fixes: 25486f49bfe2e3ae13b90478d1eebd91413136ad +Signed-off-by: Dom Cobley +--- + drivers/staging/media/rpivid/rpivid_video.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/rpivid/rpivid_video.c b/drivers/staging/media/rpivid/rpivid_video.c +index def891a86e55..37c8f62649d6 100644 +--- a/drivers/staging/media/rpivid/rpivid_video.c ++++ b/drivers/staging/media/rpivid/rpivid_video.c +@@ -526,7 +526,11 @@ static void rpivid_stop_streaming(struct vb2_queue *vq) + + rpivid_queue_cleanup(vq, VB2_BUF_STATE_ERROR); + +- clk_request_done(dev->hevc_req); ++ if (dev->hevc_req) ++ { ++ clk_request_done(dev->hevc_req); ++ dev->hevc_req = NULL; ++ } + clk_disable_unprepare(dev->clock); + } + +-- +2.18.4 + + +From dea885e2bc2aa3d7aef62eabc7465025fe83fee6 Mon Sep 17 00:00:00 2001 +From: wangzx <593074943@qq.com> +Date: Tue, 20 Apr 2021 22:33:26 +0800 +Subject: [PATCH 615/661] dwc_otg: fix an undeclared variable Replace an + undeclared variable used by DWC_DEBUGPL with the real endpoint address. + DWC_DEBUGPL does nothing with DEBUG undefined so it did not go wrong before. + Signed-off-by: Zixuan Wang + +--- + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +index 50c8705185ad..2ee27450c6f6 100644 +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +@@ -1026,7 +1026,8 @@ static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep) + dwc_irqflags_t flags; + dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); + +- DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD EP RESET: Endpoint Num=0x%02d\n", epnum); ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD EP RESET: Endpoint Num=0x%02d\n", ++ ep->desc.bEndpointAddress); + + DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags); + if (ep->hcpriv) { +-- +2.18.4 + + +From 35a4d639212b6764639a3afa8f9e4de2f67cacea Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 25 Mar 2021 18:40:51 +0000 +Subject: [PATCH 616/661] Revert "drm/vc4: Add configuration for BCM2711 DSI1." + +This reverts commit 10faa28e1474e6cf33cb0809d2a6d5b7a8351a28. + +Revert in order to take the cleaner upstream version. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 9 ++------- + 1 file changed, 2 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index bac5e07c05de..ce4db68827c8 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1308,11 +1308,6 @@ static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = { + static const struct of_device_id vc4_dsi_dt_match[] = { + { .compatible = "brcm,bcm2835-dsi0", (void *)(uintptr_t)0 }, + { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 }, +- /* +- * Use 2 so that it uses the DSI1 register layout, but not DMA +- * workaround +- */ +- { .compatible = "brcm,bcm2711-dsi1", (void *)(uintptr_t)2 }, + {} + }; + +@@ -1500,8 +1495,8 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + return -ENODEV; + } + +- /* DSI1 on BCM2835/6/7 has a broken AXI slave that doesn't respond to +- * writes from the ARM. It does handle writes from the DMA engine, ++ /* DSI1 has a broken AXI slave that doesn't respond to writes ++ * from the ARM. It does handle writes from the DMA engine, + * so set up a channel for talking to it. + */ + if (dsi->port == 1) { +-- +2.18.4 + + +From 361868b872bb251d5fda9b30e2fb75f9690c262b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 25 Mar 2021 18:46:23 +0000 +Subject: [PATCH 617/661] Revert "drm/vc4: Add support for DSI0" + +This reverts commit d704a3c965783ed51476031206b2120676418672. + +Revert in order to apply upstream version + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_drv.h | 1 - + drivers/gpu/drm/vc4/vc4_dsi.c | 15 +++++---------- + 2 files changed, 5 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h +index 52c3ee43d004..1a1ce65567f2 100644 +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -81,7 +81,6 @@ struct vc4_dev { + struct vc4_hvs *hvs; + struct vc4_v3d *v3d; + struct vc4_dpi *dpi; +- struct vc4_dsi *dsi0; + struct vc4_dsi *dsi1; + struct vc4_vec *vec; + struct vc4_txp *txp; +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index ce4db68827c8..2646a6dbf584 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1306,7 +1306,6 @@ static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = { + }; + + static const struct of_device_id vc4_dsi_dt_match[] = { +- { .compatible = "brcm,bcm2835-dsi0", (void *)(uintptr_t)0 }, + { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 }, + {} + }; +@@ -1430,10 +1429,10 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) + memset(&init, 0, sizeof(init)); + init.parent_names = &parent_name; + init.num_parents = 1; +- if (dsi->port == 0) +- init.name = phy_clocks[i].dsi0_name; +- else ++ if (dsi->port == 1) + init.name = phy_clocks[i].dsi1_name; ++ else ++ init.name = phy_clocks[i].dsi0_name; + init.ops = &clk_fixed_factor_ops; + + ret = devm_clk_hw_register(dev, &fix->hw); +@@ -1605,9 +1604,7 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + if (ret) + return ret; + +- if (dsi->port == 0) +- vc4->dsi0 = dsi; +- else ++ if (dsi->port == 1) + vc4->dsi1 = dsi; + + drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI); +@@ -1652,9 +1649,7 @@ static void vc4_dsi_unbind(struct device *dev, struct device *master, + list_splice_init(&dsi->bridge_chain, &dsi->encoder->bridge_chain); + drm_encoder_cleanup(dsi->encoder); + +- if (dsi->port == 0) +- vc4->dsi0 = NULL; +- else ++ if (dsi->port == 1) + vc4->dsi1 = NULL; + } + +-- +2.18.4 + + +From 23ebf38c473ddfb8c5bc469929ba930acc8b3097 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 3 Dec 2020 14:25:36 +0100 +Subject: [PATCH 618/661] drm/vc4: drv: Remove the DSI pointer in vc4_drv + +Commit 51f4fcd9c4ea867c3b4fe58111f342ad0e80642a upstream. + +That pointer isn't used anywhere, so there's no point in keeping it. + +Reviewed-by: Dave Stevenson +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-2-maxime@cerno.tech +--- + drivers/gpu/drm/vc4/vc4_drv.h | 1 - + drivers/gpu/drm/vc4/vc4_dsi.c | 9 --------- + 2 files changed, 10 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h +index 1a1ce65567f2..7a70838595b2 100644 +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -81,7 +81,6 @@ struct vc4_dev { + struct vc4_hvs *hvs; + struct vc4_v3d *v3d; + struct vc4_dpi *dpi; +- struct vc4_dsi *dsi1; + struct vc4_vec *vec; + struct vc4_txp *txp; + struct vc4_fkms *fkms; +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index 2646a6dbf584..8c413d21f752 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1451,7 +1451,6 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + { + struct platform_device *pdev = to_platform_device(dev); + struct drm_device *drm = dev_get_drvdata(master); +- struct vc4_dev *vc4 = to_vc4_dev(drm); + struct vc4_dsi *dsi = dev_get_drvdata(dev); + struct vc4_dsi_encoder *vc4_dsi_encoder; + struct drm_panel *panel; +@@ -1604,9 +1603,6 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + if (ret) + return ret; + +- if (dsi->port == 1) +- vc4->dsi1 = dsi; +- + drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI); + drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs); + +@@ -1635,8 +1631,6 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + static void vc4_dsi_unbind(struct device *dev, struct device *master, + void *data) + { +- struct drm_device *drm = dev_get_drvdata(master); +- struct vc4_dev *vc4 = to_vc4_dev(drm); + struct vc4_dsi *dsi = dev_get_drvdata(dev); + + if (dsi->bridge) +@@ -1648,9 +1642,6 @@ static void vc4_dsi_unbind(struct device *dev, struct device *master, + */ + list_splice_init(&dsi->bridge_chain, &dsi->encoder->bridge_chain); + drm_encoder_cleanup(dsi->encoder); +- +- if (dsi->port == 1) +- vc4->dsi1 = NULL; + } + + static const struct component_ops vc4_dsi_ops = { +-- +2.18.4 + + +From d21d9f8b97ad41398fff9d8b50687cc4535863ba Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 3 Dec 2020 14:25:38 +0100 +Subject: [PATCH 619/661] drm/vc4: dsi: Use snprintf for the PHY clocks instead + of an array + +Commit dc0bf36401e891c853e0a25baeb4e0b4e6f3626d upstream. + +The DSI clocks setup function has been using an array to store the clock +name of either the DSI0 or DSI1 blocks, using the port ID to choose the +proper one. + +Let's switch to an snprintf call to do the same thing and simplify the +array a bit. + +Reviewed-by: Dave Stevenson +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-4-maxime@cerno.tech +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index 8c413d21f752..2727ad61989f 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1390,12 +1390,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) + struct device *dev = &dsi->pdev->dev; + const char *parent_name = __clk_get_name(dsi->pll_phy_clock); + static const struct { +- const char *dsi0_name, *dsi1_name; ++ const char *name; + int div; + } phy_clocks[] = { +- { "dsi0_byte", "dsi1_byte", 8 }, +- { "dsi0_ddr2", "dsi1_ddr2", 4 }, +- { "dsi0_ddr", "dsi1_ddr", 2 }, ++ { "byte", 8 }, ++ { "ddr2", 4 }, ++ { "ddr", 2 }, + }; + int i; + +@@ -1411,8 +1411,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) + for (i = 0; i < ARRAY_SIZE(phy_clocks); i++) { + struct clk_fixed_factor *fix = &dsi->phy_clocks[i]; + struct clk_init_data init; ++ char clk_name[16]; + int ret; + ++ snprintf(clk_name, sizeof(clk_name), ++ "dsi%u_%s", dsi->port, phy_clocks[i].name); ++ + /* We just use core fixed factor clock ops for the PHY + * clocks. The clocks are actually gated by the + * PHY_AFEC0_DDRCLK_EN bits, which we should be +@@ -1429,10 +1433,7 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) + memset(&init, 0, sizeof(init)); + init.parent_names = &parent_name; + init.num_parents = 1; +- if (dsi->port == 1) +- init.name = phy_clocks[i].dsi1_name; +- else +- init.name = phy_clocks[i].dsi0_name; ++ init.name = clk_name; + init.ops = &clk_fixed_factor_ops; + + ret = devm_clk_hw_register(dev, &fix->hw); +-- +2.18.4 + + +From 6dcee514499c4f0fd8ac06d53e9cbd4f3a7503ba Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 3 Dec 2020 14:25:39 +0100 +Subject: [PATCH 620/661] drm/vc4: dsi: Introduce a variant structure + +Commit d1d195ce26a14ec0a87816c09ae514e1c40e97f7 upstream. + +Most of the differences between DSI0 and DSI1 are handled through the +ID. However, the BCM2711 DSI is going to introduce one more variable to +the mix and will break some expectations of the earlier, simpler, test. + +Let's add a variant structure that will address most of the differences +between those three controllers. + +Reviewed-by: Dave Stevenson +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-5-maxime@cerno.tech +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 63 ++++++++++++++++++++--------------- + 1 file changed, 37 insertions(+), 26 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index 2727ad61989f..ea4cd8284454 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -493,6 +493,18 @@ + */ + #define DSI1_ID 0x8c + ++struct vc4_dsi_variant { ++ /* Whether we're on bcm2835's DSI0 or DSI1. */ ++ unsigned int port; ++ ++ bool broken_axi_workaround; ++ ++ const char *debugfs_name; ++ const struct debugfs_reg32 *regs; ++ size_t nregs; ++ ++}; ++ + /* General DSI hardware state. */ + struct vc4_dsi { + struct platform_device *pdev; +@@ -509,8 +521,7 @@ struct vc4_dsi { + u32 *reg_dma_mem; + dma_addr_t reg_paddr; + +- /* Whether we're on bcm2835's DSI0 or DSI1. */ +- int port; ++ const struct vc4_dsi_variant *variant; + + /* DSI channel for the panel we're connected to. */ + u32 channel; +@@ -586,10 +597,10 @@ dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) + #define DSI_READ(offset) readl(dsi->regs + (offset)) + #define DSI_WRITE(offset, val) dsi_dma_workaround_write(dsi, offset, val) + #define DSI_PORT_READ(offset) \ +- DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset) ++ DSI_READ(dsi->variant->port ? DSI1_##offset : DSI0_##offset) + #define DSI_PORT_WRITE(offset, val) \ +- DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val) +-#define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit) ++ DSI_WRITE(dsi->variant->port ? DSI1_##offset : DSI0_##offset, val) ++#define DSI_PORT_BIT(bit) (dsi->variant->port ? DSI1_##bit : DSI0_##bit) + + /* VC4 DSI encoder KMS struct */ + struct vc4_dsi_encoder { +@@ -837,7 +848,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) + + ret = pm_runtime_get_sync(dev); + if (ret) { +- DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->port); ++ DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->variant->port); + return; + } + +@@ -871,7 +882,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) + DSI_PORT_WRITE(STAT, DSI_PORT_READ(STAT)); + + /* Set AFE CTR00/CTR1 to release powerdown of analog. */ +- if (dsi->port == 0) { ++ if (dsi->variant->port == 0) { + u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | + VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ)); + +@@ -1017,7 +1028,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) + DSI_PORT_BIT(PHYC_CLANE_ENABLE) | + ((dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? + 0 : DSI_PORT_BIT(PHYC_HS_CLK_CONTINUOUS)) | +- (dsi->port == 0 ? ++ (dsi->variant->port == 0 ? + VC4_SET_FIELD(lpx - 1, DSI0_PHYC_ESC_CLK_LPDT) : + VC4_SET_FIELD(lpx - 1, DSI1_PHYC_ESC_CLK_LPDT))); + +@@ -1043,13 +1054,13 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) + DSI_DISP1_ENABLE); + + /* Ungate the block. */ +- if (dsi->port == 0) ++ if (dsi->variant->port == 0) + DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI0_CTRL_CTRL0); + else + DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN); + + /* Bring AFE out of reset. */ +- if (dsi->port == 0) { ++ if (dsi->variant->port == 0) { + } else { + DSI_PORT_WRITE(PHY_AFEC0, + DSI_PORT_READ(PHY_AFEC0) & +@@ -1305,8 +1316,16 @@ static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = { + .mode_fixup = vc4_dsi_encoder_mode_fixup, + }; + ++static const struct vc4_dsi_variant bcm2835_dsi1_variant = { ++ .port = 1, ++ .broken_axi_workaround = true, ++ .debugfs_name = "dsi1_regs", ++ .regs = dsi1_regs, ++ .nregs = ARRAY_SIZE(dsi1_regs), ++}; ++ + static const struct of_device_id vc4_dsi_dt_match[] = { +- { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 }, ++ { .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant }, + {} + }; + +@@ -1317,7 +1336,7 @@ static void dsi_handle_error(struct vc4_dsi *dsi, + if (!(stat & bit)) + return; + +- DRM_ERROR("DSI%d: %s error\n", dsi->port, type); ++ DRM_ERROR("DSI%d: %s error\n", dsi->variant->port, type); + *ret = IRQ_HANDLED; + } + +@@ -1415,7 +1434,7 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) + int ret; + + snprintf(clk_name, sizeof(clk_name), +- "dsi%u_%s", dsi->port, phy_clocks[i].name); ++ "dsi%u_%s", dsi->variant->port, phy_clocks[i].name); + + /* We just use core fixed factor clock ops for the PHY + * clocks. The clocks are actually gated by the +@@ -1463,7 +1482,7 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + if (!match) + return -ENODEV; + +- dsi->port = (uintptr_t)match->data; ++ dsi->variant = match->data; + + vc4_dsi_encoder = devm_kzalloc(dev, sizeof(*vc4_dsi_encoder), + GFP_KERNEL); +@@ -1480,13 +1499,8 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + return PTR_ERR(dsi->regs); + + dsi->regset.base = dsi->regs; +- if (dsi->port == 0) { +- dsi->regset.regs = dsi0_regs; +- dsi->regset.nregs = ARRAY_SIZE(dsi0_regs); +- } else { +- dsi->regset.regs = dsi1_regs; +- dsi->regset.nregs = ARRAY_SIZE(dsi1_regs); +- } ++ dsi->regset.regs = dsi->variant->regs; ++ dsi->regset.nregs = dsi->variant->nregs; + + if (DSI_PORT_READ(ID) != DSI_ID_VALUE) { + dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n", +@@ -1498,7 +1512,7 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + * from the ARM. It does handle writes from the DMA engine, + * so set up a channel for talking to it. + */ +- if (dsi->port == 1) { ++ if (dsi->variant->broken_axi_workaround) { + dsi->reg_dma_mem = dma_alloc_coherent(dev, 4, + &dsi->reg_dma_paddr, + GFP_KERNEL); +@@ -1619,10 +1633,7 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + */ + list_splice_init(&dsi->encoder->bridge_chain, &dsi->bridge_chain); + +- if (dsi->port == 0) +- vc4_debugfs_add_regset32(drm, "dsi0_regs", &dsi->regset); +- else +- vc4_debugfs_add_regset32(drm, "dsi1_regs", &dsi->regset); ++ vc4_debugfs_add_regset32(drm, dsi->variant->debugfs_name, &dsi->regset); + + pm_runtime_enable(dev); + +-- +2.18.4 + + +From 5f51ec3dfb5285e8d9083ab6d88f51abd86b8b2d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 3 Dec 2020 14:25:40 +0100 +Subject: [PATCH 621/661] drm/vc4: dsi: Add support for DSI0 + +Commit 4b265fe11fad4234b12d92dd8091f9aa0c878eea upstream. + +DSI0 was partially supported, but didn't register with the main +driver, and the code was inconsistent as to whether it checked +port == 0 or port == 1. + +Add compatible string and other support to make it consistent. + +Signed-off-by: Dave Stevenson +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-6-maxime@cerno.tech +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index ea4cd8284454..c2ed98013f9d 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1316,6 +1316,13 @@ static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = { + .mode_fixup = vc4_dsi_encoder_mode_fixup, + }; + ++static const struct vc4_dsi_variant bcm2835_dsi0_variant = { ++ .port = 0, ++ .debugfs_name = "dsi0_regs", ++ .regs = dsi0_regs, ++ .nregs = ARRAY_SIZE(dsi0_regs), ++}; ++ + static const struct vc4_dsi_variant bcm2835_dsi1_variant = { + .port = 1, + .broken_axi_workaround = true, +@@ -1325,6 +1332,7 @@ static const struct vc4_dsi_variant bcm2835_dsi1_variant = { + }; + + static const struct of_device_id vc4_dsi_dt_match[] = { ++ { .compatible = "brcm,bcm2835-dsi0", &bcm2835_dsi0_variant }, + { .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant }, + {} + }; +-- +2.18.4 + + +From 468e9e6cbc2f52d9059b9f10f913b2c075e93d4c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 3 Dec 2020 14:25:42 +0100 +Subject: [PATCH 622/661] drm/vc4: dsi: Add configuration for BCM2711 DSI1 + +Commit d0666be8ef9e8e65d4b7fabc1606ec51f61384c0 upstream. + +BCM2711 DSI1 doesn't have the issue with the ARM not being +able to write to the registers, therefore remove the DMA +workaround for that compatible string. + +Signed-off-by: Dave Stevenson +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-8-maxime@cerno.tech +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index c2ed98013f9d..6dfcbd9e234e 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1316,6 +1316,13 @@ static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = { + .mode_fixup = vc4_dsi_encoder_mode_fixup, + }; + ++static const struct vc4_dsi_variant bcm2711_dsi1_variant = { ++ .port = 1, ++ .debugfs_name = "dsi1_regs", ++ .regs = dsi1_regs, ++ .nregs = ARRAY_SIZE(dsi1_regs), ++}; ++ + static const struct vc4_dsi_variant bcm2835_dsi0_variant = { + .port = 0, + .debugfs_name = "dsi0_regs", +@@ -1332,6 +1339,7 @@ static const struct vc4_dsi_variant bcm2835_dsi1_variant = { + }; + + static const struct of_device_id vc4_dsi_dt_match[] = { ++ { .compatible = "brcm,bcm2711-dsi1", &bcm2711_dsi1_variant }, + { .compatible = "brcm,bcm2835-dsi0", &bcm2835_dsi0_variant }, + { .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant }, + {} +@@ -1516,8 +1524,8 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + return -ENODEV; + } + +- /* DSI1 has a broken AXI slave that doesn't respond to writes +- * from the ARM. It does handle writes from the DMA engine, ++ /* DSI1 on BCM2835/6/7 has a broken AXI slave that doesn't respond to ++ * writes from the ARM. It does handle writes from the DMA engine, + * so set up a channel for talking to it. + */ + if (dsi->variant->broken_axi_workaround) { +-- +2.18.4 + + +From 1037305bc6b965a6cd6b56e54839674cc6e0080b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 11 Feb 2021 18:37:04 +0000 +Subject: [PATCH 623/661] drm/vc4: Correct pixel order for DSI0 + +For slightly unknown reasons, dsi0 takes a different pixel format +to dsi1, and that has to be set in the pixel valve. + +Amend the setup accordingly. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c +index 339567dd015c..bee11bb2cbf5 100644 +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -319,7 +319,8 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc) + u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1; + bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 || + vc4_encoder->type == VC4_ENCODER_TYPE_DSI1); +- u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24; ++ bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1; ++ u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24; + u8 ppc = pv_data->pixels_per_clock; + bool debug_dump_regs = false; + +-- +2.18.4 + + +From 393ca387d3748c48245c6cab330ac785c0dc86a7 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 8 Feb 2021 11:22:01 +0000 +Subject: [PATCH 624/661] drm/vc4: Register dsi0 as the correct vc4 encoder + type + +vc4_dsi was registering both dsi0 and dsi1 as VC4_ENCODER_TYPE_DSI1 +which seemed to work OK for a single DSI display, but fails +if there are two DSI displays connected. + +Update to register the correct type. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index 6dfcbd9e234e..053930eaa48f 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1506,7 +1506,8 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) + return -ENOMEM; + + INIT_LIST_HEAD(&dsi->bridge_chain); +- vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1; ++ vc4_dsi_encoder->base.type = dsi->variant->port ? ++ VC4_ENCODER_TYPE_DSI1 : VC4_ENCODER_TYPE_DSI0; + vc4_dsi_encoder->dsi = dsi; + dsi->encoder = &vc4_dsi_encoder->base.base; + +-- +2.18.4 + + +From 509ca1479387d4f733de2d96e7c5baab8f3cd8f6 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 10 Feb 2021 18:46:22 +0000 +Subject: [PATCH 625/661] drm/vc4: Fix dsi0 interrupt support. + +DSI0 seemingly had very little or no testing as a load of +the register mappings were incorrect/missing, so host +transfers always timed out due to enabling/checking incorrect +bits in the interrupt enable and status registers. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 111 ++++++++++++++++++++++++++-------- + 1 file changed, 85 insertions(+), 26 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index 053930eaa48f..fb0efc67d31d 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -181,8 +181,50 @@ + + #define DSI0_TXPKT_PIX_FIFO 0x20 /* AKA PIX_FIFO */ + +-#define DSI0_INT_STAT 0x24 +-#define DSI0_INT_EN 0x28 ++#define DSI0_INT_STAT 0x24 ++#define DSI0_INT_EN 0x28 ++# define DSI0_INT_FIFO_ERR BIT(25) ++# define DSI0_INT_CMDC_DONE_MASK VC4_MASK(24, 23) ++# define DSI0_INT_CMDC_DONE_SHIFT 23 ++# define DSI0_INT_CMDC_DONE_NO_REPEAT 1 ++# define DSI0_INT_CMDC_DONE_REPEAT 3 ++# define DSI0_INT_PHY_DIR_RTF BIT(22) ++# define DSI0_INT_PHY_D1_ULPS BIT(21) ++# define DSI0_INT_PHY_D1_STOP BIT(20) ++# define DSI0_INT_PHY_RXLPDT BIT(19) ++# define DSI0_INT_PHY_RXTRIG BIT(18) ++# define DSI0_INT_PHY_D0_ULPS BIT(17) ++# define DSI0_INT_PHY_D0_LPDT BIT(16) ++# define DSI0_INT_PHY_D0_FTR BIT(15) ++# define DSI0_INT_PHY_D0_STOP BIT(14) ++/* Signaled when the clock lane enters the given state. */ ++# define DSI0_INT_PHY_CLK_ULPS BIT(13) ++# define DSI0_INT_PHY_CLK_HS BIT(12) ++# define DSI0_INT_PHY_CLK_FTR BIT(11) ++/* Signaled on timeouts */ ++# define DSI0_INT_PR_TO BIT(10) ++# define DSI0_INT_TA_TO BIT(9) ++# define DSI0_INT_LPRX_TO BIT(8) ++# define DSI0_INT_HSTX_TO BIT(7) ++/* Contention on a line when trying to drive the line low */ ++# define DSI0_INT_ERR_CONT_LP1 BIT(6) ++# define DSI0_INT_ERR_CONT_LP0 BIT(5) ++/* Control error: incorrect line state sequence on data lane 0. */ ++# define DSI0_INT_ERR_CONTROL BIT(4) ++# define DSI0_INT_ERR_SYNC_ESC BIT(3) ++# define DSI0_INT_RX2_PKT BIT(2) ++# define DSI0_INT_RX1_PKT BIT(1) ++# define DSI0_INT_CMD_PKT BIT(0) ++ ++#define DSI0_INTERRUPTS_ALWAYS_ENABLED (DSI0_INT_ERR_SYNC_ESC | \ ++ DSI0_INT_ERR_CONTROL | \ ++ DSI0_INT_ERR_CONT_LP0 | \ ++ DSI0_INT_ERR_CONT_LP1 | \ ++ DSI0_INT_HSTX_TO | \ ++ DSI0_INT_LPRX_TO | \ ++ DSI0_INT_TA_TO | \ ++ DSI0_INT_PR_TO) ++ + # define DSI1_INT_PHY_D3_ULPS BIT(30) + # define DSI1_INT_PHY_D3_STOP BIT(29) + # define DSI1_INT_PHY_D2_ULPS BIT(28) +@@ -894,6 +936,9 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) + + DSI_PORT_WRITE(PHY_AFEC0, afec0); + ++ /* AFEC reset hold time */ ++ mdelay(1); ++ + DSI_PORT_WRITE(PHY_AFEC1, + VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE1) | + VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE0) | +@@ -1060,12 +1105,9 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) + DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN); + + /* Bring AFE out of reset. */ +- if (dsi->variant->port == 0) { +- } else { +- DSI_PORT_WRITE(PHY_AFEC0, +- DSI_PORT_READ(PHY_AFEC0) & +- ~DSI1_PHY_AFEC0_RESET); +- } ++ DSI_PORT_WRITE(PHY_AFEC0, ++ DSI_PORT_READ(PHY_AFEC0) & ++ ~DSI_PORT_BIT(PHY_AFEC0_RESET)); + + vc4_dsi_ulps(dsi, false); + +@@ -1184,13 +1226,28 @@ static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host, + /* Enable the appropriate interrupt for the transfer completion. */ + dsi->xfer_result = 0; + reinit_completion(&dsi->xfer_completion); +- DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF); +- if (msg->rx_len) { +- DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED | +- DSI1_INT_PHY_DIR_RTF)); ++ if (dsi->variant->port == 0) { ++ DSI_PORT_WRITE(INT_STAT, ++ DSI0_INT_CMDC_DONE_MASK | DSI1_INT_PHY_DIR_RTF); ++ if (msg->rx_len) { ++ DSI_PORT_WRITE(INT_EN, (DSI0_INTERRUPTS_ALWAYS_ENABLED | ++ DSI0_INT_PHY_DIR_RTF)); ++ } else { ++ DSI_PORT_WRITE(INT_EN, ++ (DSI0_INTERRUPTS_ALWAYS_ENABLED | ++ VC4_SET_FIELD(DSI0_INT_CMDC_DONE_NO_REPEAT, ++ DSI0_INT_CMDC_DONE))); ++ } + } else { +- DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED | +- DSI1_INT_TXPKT1_DONE)); ++ DSI_PORT_WRITE(INT_STAT, ++ DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF); ++ if (msg->rx_len) { ++ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED | ++ DSI1_INT_PHY_DIR_RTF)); ++ } else { ++ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED | ++ DSI1_INT_TXPKT1_DONE)); ++ } + } + + /* Send the packet. */ +@@ -1207,7 +1264,7 @@ static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host, + ret = dsi->xfer_result; + } + +- DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED); ++ DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED)); + + if (ret) + goto reset_fifo_and_return; +@@ -1253,7 +1310,7 @@ static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host, + DSI_PORT_BIT(CTRL_RESET_FIFOS)); + + DSI_PORT_WRITE(TXPKT1C, 0); +- DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED); ++ DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED)); + return ret; + } + +@@ -1386,26 +1443,28 @@ static irqreturn_t vc4_dsi_irq_handler(int irq, void *data) + DSI_PORT_WRITE(INT_STAT, stat); + + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_ERR_SYNC_ESC, "LPDT sync"); ++ DSI_PORT_BIT(INT_ERR_SYNC_ESC), "LPDT sync"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_ERR_CONTROL, "data lane 0 sequence"); ++ DSI_PORT_BIT(INT_ERR_CONTROL), "data lane 0 sequence"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_ERR_CONT_LP0, "LP0 contention"); ++ DSI_PORT_BIT(INT_ERR_CONT_LP0), "LP0 contention"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_ERR_CONT_LP1, "LP1 contention"); ++ DSI_PORT_BIT(INT_ERR_CONT_LP1), "LP1 contention"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_HSTX_TO, "HSTX timeout"); ++ DSI_PORT_BIT(INT_HSTX_TO), "HSTX timeout"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_LPRX_TO, "LPRX timeout"); ++ DSI_PORT_BIT(INT_LPRX_TO), "LPRX timeout"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_TA_TO, "turnaround timeout"); ++ DSI_PORT_BIT(INT_TA_TO), "turnaround timeout"); + dsi_handle_error(dsi, &ret, stat, +- DSI1_INT_PR_TO, "peripheral reset timeout"); ++ DSI_PORT_BIT(INT_PR_TO), "peripheral reset timeout"); + +- if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) { ++ if (stat & ((dsi->variant->port ? DSI1_INT_TXPKT1_DONE : ++ DSI0_INT_CMDC_DONE_MASK) | ++ DSI_PORT_BIT(INT_PHY_DIR_RTF))) { + complete(&dsi->xfer_completion); + ret = IRQ_HANDLED; +- } else if (stat & DSI1_INT_HSTX_TO) { ++ } else if (stat & DSI_PORT_BIT(INT_HSTX_TO)) { + complete(&dsi->xfer_completion); + dsi->xfer_result = -ETIMEDOUT; + ret = IRQ_HANDLED; +-- +2.18.4 + + +From fe0267044aafaae2d42ee68db99484307f449fa3 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 15 Apr 2021 16:18:16 +0100 +Subject: [PATCH 626/661] drm/vc4: Add correct stop condition to + vc4_dsi_encoder_disable iteration + +vc4_dsi_encoder_disable is partially an open coded version of +drm_bridge_chain_disable, but it missed a termination condition +in the loop for ->disable which meant that no post_disable +calls were made. + +Add in the termination clause. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index fb0efc67d31d..9861e2d2c05d 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -803,6 +803,9 @@ static void vc4_dsi_encoder_disable(struct drm_encoder *encoder) + list_for_each_entry_reverse(iter, &dsi->bridge_chain, chain_node) { + if (iter->funcs->disable) + iter->funcs->disable(iter); ++ ++ if (iter == dsi->bridge) ++ break; + } + + vc4_dsi_ulps(dsi, true); +-- +2.18.4 + + +From 23169310a067d23970c1334a102911ce09722f29 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 7 Jan 2021 16:30:55 +0000 +Subject: [PATCH 627/661] drm/atomic: Don't fixup modes that haven't been reset + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/drm_atomic_helper.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c +index 134d3000fb18..172144627c59 100644 +--- a/drivers/gpu/drm/drm_atomic_helper.c ++++ b/drivers/gpu/drm/drm_atomic_helper.c +@@ -430,6 +430,11 @@ mode_fixup(struct drm_atomic_state *state) + new_crtc_state = + drm_atomic_get_new_crtc_state(state, new_conn_state->crtc); + ++ if (!new_crtc_state->mode_changed && ++ !new_crtc_state->connectors_changed) { ++ continue; ++ } ++ + /* + * Each encoder has at most one connector (since we always steal + * it away), so we won't call ->mode_fixup twice. +-- +2.18.4 + + +From 5a1997af8a41dcc921d7ec34b9732bf332cdede4 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 15 Apr 2021 17:30:35 +0100 +Subject: [PATCH 628/661] drm/panel: jdi-lt070me05000: Use + gpiod_set_value_cansleep + +There is no reason why the control GPIOs for the panel can not +be connected to I2C or similar GPIO interfaces that may need to +sleep, therefore switch from gpiod_set_value to +gpiod_set_value_cansleep calls to configure them. +Without that you get complaints from gpiolib every time the state +is changed. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/panel/panel-jdi-lt070me05000.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c +index 733010b5e4f5..7fb4d98e166d 100644 +--- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ++++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c +@@ -205,11 +205,11 @@ static int jdi_panel_unprepare(struct drm_panel *panel) + if (ret < 0) + dev_err(dev, "regulator disable failed, %d\n", ret); + +- gpiod_set_value(jdi->enable_gpio, 0); ++ gpiod_set_value_cansleep(jdi->enable_gpio, 0); + +- gpiod_set_value(jdi->reset_gpio, 1); ++ gpiod_set_value_cansleep(jdi->reset_gpio, 1); + +- gpiod_set_value(jdi->dcdc_en_gpio, 0); ++ gpiod_set_value_cansleep(jdi->dcdc_en_gpio, 0); + + jdi->prepared = false; + +@@ -233,13 +233,13 @@ static int jdi_panel_prepare(struct drm_panel *panel) + + msleep(20); + +- gpiod_set_value(jdi->dcdc_en_gpio, 1); ++ gpiod_set_value_cansleep(jdi->dcdc_en_gpio, 1); + usleep_range(10, 20); + +- gpiod_set_value(jdi->reset_gpio, 0); ++ gpiod_set_value_cansleep(jdi->reset_gpio, 0); + usleep_range(10, 20); + +- gpiod_set_value(jdi->enable_gpio, 1); ++ gpiod_set_value_cansleep(jdi->enable_gpio, 1); + usleep_range(10, 20); + + ret = jdi_panel_init(jdi); +@@ -263,11 +263,11 @@ static int jdi_panel_prepare(struct drm_panel *panel) + if (ret < 0) + dev_err(dev, "regulator disable failed, %d\n", ret); + +- gpiod_set_value(jdi->enable_gpio, 0); ++ gpiod_set_value_cansleep(jdi->enable_gpio, 0); + +- gpiod_set_value(jdi->reset_gpio, 1); ++ gpiod_set_value_cansleep(jdi->reset_gpio, 1); + +- gpiod_set_value(jdi->dcdc_en_gpio, 0); ++ gpiod_set_value_cansleep(jdi->dcdc_en_gpio, 0); + + return ret; + } +-- +2.18.4 + + +From 050a238cd93a100fc65220119b412b29f160a7dd Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 15 Apr 2021 18:09:56 +0100 +Subject: [PATCH 629/661] defconfigs: Add PANEL_JDI_LT070ME05000 DSI panel + +Used by the 2013 Nexus 7" tablet, and working via an adapter +board on Compute Modules. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcm2711_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcm2711_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 5 files changed, 5 insertions(+) + +diff --git a/arch/arm/configs/bcm2709_defconfig b/arch/arm/configs/bcm2709_defconfig +index f4da60298fae..ca05d73516e2 100644 +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -924,6 +924,7 @@ CONFIG_DRM=m + CONFIG_DRM_LOAD_EDID_FIRMWARE=y + CONFIG_DRM_UDL=m + CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_JDI_LT070ME05000=m + CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m + CONFIG_DRM_DISPLAY_CONNECTOR=m + CONFIG_DRM_SIMPLE_BRIDGE=m +diff --git a/arch/arm/configs/bcm2711_defconfig b/arch/arm/configs/bcm2711_defconfig +index b3a4441748e8..c1204afae5ac 100644 +--- a/arch/arm/configs/bcm2711_defconfig ++++ b/arch/arm/configs/bcm2711_defconfig +@@ -935,6 +935,7 @@ CONFIG_DRM=m + CONFIG_DRM_LOAD_EDID_FIRMWARE=y + CONFIG_DRM_UDL=m + CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_JDI_LT070ME05000=m + CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m + CONFIG_DRM_DISPLAY_CONNECTOR=m + CONFIG_DRM_SIMPLE_BRIDGE=m +diff --git a/arch/arm/configs/bcmrpi_defconfig b/arch/arm/configs/bcmrpi_defconfig +index fcc63ee8b578..554f87044043 100644 +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -917,6 +917,7 @@ CONFIG_DRM=m + CONFIG_DRM_LOAD_EDID_FIRMWARE=y + CONFIG_DRM_UDL=m + CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_JDI_LT070ME05000=m + CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m + CONFIG_DRM_DISPLAY_CONNECTOR=m + CONFIG_DRM_SIMPLE_BRIDGE=m +diff --git a/arch/arm64/configs/bcm2711_defconfig b/arch/arm64/configs/bcm2711_defconfig +index 73bb908fc4e9..93159a7a2d9b 100644 +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -935,6 +935,7 @@ CONFIG_DRM=m + CONFIG_DRM_LOAD_EDID_FIRMWARE=y + CONFIG_DRM_UDL=m + CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_JDI_LT070ME05000=m + CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m + CONFIG_DRM_DISPLAY_CONNECTOR=m + CONFIG_DRM_SIMPLE_BRIDGE=m +diff --git a/arch/arm64/configs/bcmrpi3_defconfig b/arch/arm64/configs/bcmrpi3_defconfig +index 584e82f7de99..ff857505902b 100644 +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -860,6 +860,7 @@ CONFIG_DRM=m + CONFIG_DRM_LOAD_EDID_FIRMWARE=y + CONFIG_DRM_UDL=m + CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_JDI_LT070ME05000=m + CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m + CONFIG_DRM_DISPLAY_CONNECTOR=m + CONFIG_DRM_SIMPLE_BRIDGE=m +-- +2.18.4 + + +From 8d8dcdadf04ab941e5db6465088a6b7beb322265 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 15 Apr 2021 16:46:34 +0100 +Subject: [PATCH 630/661] dtoverlays: Add overlays for JDI LT070ME05000 + 1200x1920 DSI panel + +Credit to forum member gizmomouse on +https://www.raspberrypi.org/forums/viewtopic.php?f=98&t=253912 and +Andrey Vostrukhin of Harlab for these overlays. + +See https://github.com/harlab/CM4_LCD_LT070ME05000 for +schematics and docs for the adapter board to connect this panel which +is found in the Asus/Google 2013 Nexus 7" tablet and therefore +relatively easily available. + +Note that this uses 4 DSI data lanes, and therefore MUST be used +with DISP1 on a Compute Module. It can not be used on a standard +Pi. + +There are two versions of the adapter board. V1 connects the +display controls to Pi GPIOs, whilst v2 uses an I2C GPIO expander +so needs no additional connections beyond the FFC and power. + +The touchscreen overlay for these panels varies, so that part +is not configured. + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/overlays/Makefile | 2 + + arch/arm/boot/dts/overlays/README | 21 ++++++ + .../vc4-kms-dsi-lt070me05000-overlay.dts | 69 +++++++++++++++++++ + .../vc4-kms-dsi-lt070me05000-v2-overlay.dts | 64 +++++++++++++++++ + 4 files changed, 156 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts + +diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile +index 823daad2f28a..611cb431834f 100644 +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -213,6 +213,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + upstream-pi4.dtbo \ + vc4-fkms-v3d.dtbo \ + vc4-kms-dsi-7inch.dtbo \ ++ vc4-kms-dsi-lt070me05000.dtbo \ ++ vc4-kms-dsi-lt070me05000-v2.dtbo \ + vc4-kms-kippah-7inch.dtbo \ + vc4-kms-v3d.dtbo \ + vc4-kms-v3d-pi4.dtbo \ +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index a5f1913d0367..b6856092721d 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -3158,6 +3158,27 @@ Load: dtoverlay=vc4-kms-dsi-7inch + Params: + + ++Name: vc4-kms-dsi-lt070me05000 ++Info: Enable a JDI LT070ME05000 DSI display on DSI1. ++ Note that this is a 4 lane DSI device, so it will only work on a Compute ++ Module. ++ Requires vc4-kms-v3d to be loaded. ++Load: dtoverlay=vc4-kms-dsi-lt070me05000, ++Params: reset GPIO for the reset signal (default 17) ++ enable GPIO for the enable signal (default 4) ++ dcdc-en GPIO for the DC-DC converter enable (default 5) ++ ++ ++Name: vc4-kms-dsi-lt070me05000-v2 ++Info: Enable a JDI LT070ME05000 DSI display on DSI1 using Harlab's V2 ++ interface board. ++ Note that this is a 4 lane DSI device, so it will only work on a Compute ++ Module. ++ Requires vc4-kms-v3d to be loaded. ++Load: dtoverlay=vc4-kms-dsi-lt070me05000-v2 ++Params: ++ ++ + Name: vc4-kms-kippah-7inch + Info: Enable the Adafruit DPI Kippah with the 7" Ontat panel attached. + Requires vc4-kms-v3d to be loaded. +diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts +new file mode 100644 +index 000000000000..d7b8f6713804 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts +@@ -0,0 +1,69 @@ ++/* ++ * Device Tree overlay to connect a JDI LT070ME05000 DSI panel to DSI1. ++ * This uses 4 DSI data lanes, so can only be used with a Compute Module. ++ * ++ * Credit to forum user gizmomouse on ++ * https://www.raspberrypi.org/forums/viewtopic.php?f=98&t=253912 and ++ * Andrey Vostrukhin of Harlab for the overlay. ++ * ++ * Refer to https://github.com/harlab/CM4_LCD_LT070ME05000 for schematics and ++ * other documentation. ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&dsi1>; ++ __overlay__{ ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port { ++ dsi_out_port:endpoint { ++ remote-endpoint = <&panel_dsi_port>; ++ }; ++ }; ++ ++ lt070me05000:lt070me05000@0 { ++ compatible = "jdi,lt070me05000"; ++ status = "okay"; ++ reg = <0>; ++ reset-gpios = <&gpio 17 1>; // LCD RST ++ enable-gpios = <&gpio 4 0>; // LCD Enable ++ dcdc-en-gpios = <&gpio 5 0>; // LCD DC-DC Enable ++ port { ++ panel_dsi_port: endpoint { ++ remote-endpoint = <&dsi_out_port>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ lt070me05000_pins: lt070me05000_pins { ++ brcm,pins = <4 5 17>; ++ brcm,function = <1 1 1>; // out ++ brcm,pull = <0 0 0>; // off ++ }; ++ }; ++ ++ }; ++ ++ __overrides__ { ++ reset = <<070me05000_pins>,"brcm,pins:8", ++ <<070me05000>,"reset-gpios:4"; ++ ++ enable = <<070me05000_pins>,"brcm,pins:0", ++ <<070me05000>,"enable-gpios:4"; ++ ++ dcdc-en = <<070me05000_pins>,"brcm,pins:4", ++ <<070me05000>,"dcdc-en-gpios:4"; ++ }; ++}; +diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts +new file mode 100644 +index 000000000000..5dcd0f2243e2 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts +@@ -0,0 +1,64 @@ ++/* ++ * Device Tree overlay to connect a JDI LT070ME05000 DSI panel to DSI1. ++ * This uses 4 DSI data lanes, so can only be used with a Compute Module. ++ * ++ * The overlay is for V2 of Harlab's interface board that uses a PCA9536 to ++ * handle the panel's control GPIOs instead of wiring it back to Pi GPIOs. ++ * ++ * Credit to Andrey Vostrukhin of Harlab for the overlay. ++ * ++ * Refer to https://github.com/harlab/CM4_LCD_LT070ME05000 for schematics and ++ * other documentation. ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&i2c_csi_dsi>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pca: pca@41 { ++ compatible = "nxp,pca9536"; ++ reg = <0x41>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&dsi1>; ++ __overlay__{ ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port { ++ dsi_out_port:endpoint { ++ remote-endpoint = <&panel_dsi_port>; ++ }; ++ }; ++ ++ lt070me05000:lt070me05000@0 { ++ compatible = "jdi,lt070me05000"; ++ status = "okay"; ++ reg = <0>; ++ reset-gpios = <&pca 0 1>; ++ enable-gpios = <&pca 2 0>; ++ dcdc-en-gpios = <&pca 1 0>; ++ port { ++ panel_dsi_port: endpoint { ++ remote-endpoint = <&dsi_out_port>; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; +-- +2.18.4 + + +From 94b8afbb5c408471de1c2bb79126b377938f6cc2 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Wed, 21 Apr 2021 12:14:44 +0200 +Subject: [PATCH 631/661] clk: requests: Ignore if the pointer is null + +Signed-off-by: Maxime Ripard +--- + drivers/clk/clk.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 031627757b11..af0f638d1769 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -2498,6 +2498,9 @@ void clk_request_done(struct clk_request *req) + { + struct clk_core *core = req->clk->core; + ++ if (!req) ++ return; ++ + clk_prepare_lock(); + + list_del(&req->list); +-- +2.18.4 + + +From 27609635d4ead043f9a60c6d3ec26016c11a0a83 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 16 Mar 2021 13:42:01 +0100 +Subject: [PATCH 632/661] drm/vc4: txp: Properly set the possible_crtcs mask + +The current code does a binary OR on the possible_crtcs variable of the +TXP encoder, while we want to set it to that value instead. + +Cc: # v5.9+ +Fixes: 39fcb2808376 ("drm/vc4: txp: Turn the TXP into a CRTC of its own") +Acked-by: Thomas Zimmermann +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_txp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c +index 4a26750b5e93..22430640786f 100644 +--- a/drivers/gpu/drm/vc4/vc4_txp.c ++++ b/drivers/gpu/drm/vc4/vc4_txp.c +@@ -506,7 +506,7 @@ static int vc4_txp_bind(struct device *dev, struct device *master, void *data) + return ret; + + encoder = &txp->connector.encoder; +- encoder->possible_crtcs |= drm_crtc_mask(crtc); ++ encoder->possible_crtcs = drm_crtc_mask(crtc); + + ret = devm_request_irq(dev, irq, vc4_txp_interrupt, 0, + dev_name(dev), txp); +-- +2.18.4 + + +From b794d8eba572634794dad907240af5ff518412c1 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 16 Mar 2021 13:42:19 +0100 +Subject: [PATCH 633/661] drm/vc4: crtc: Skip the TXP + +The vc4_set_crtc_possible_masks is meant to run over all the encoders +and then set their possible_crtcs mask to their associated pixelvalve. + +However, since the commit 39fcb2808376 ("drm/vc4: txp: Turn the TXP into +a CRTC of its own"), the TXP has been turned to a CRTC and encoder of +its own, and while it does indeed register an encoder, it no longer has +an associated pixelvalve. The code will thus run over the TXP encoder +and set a bogus possible_crtcs mask, overriding the one set in the TXP +bind function. + +In order to fix this, let's skip any virtual encoder. + +Cc: # v5.9+ +Fixes: 39fcb2808376 ("drm/vc4: txp: Turn the TXP into a CRTC of its own") +Acked-by: Thomas Zimmermann +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c +index bee11bb2cbf5..4efd3892192a 100644 +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -1050,6 +1050,9 @@ static void vc4_set_crtc_possible_masks(struct drm_device *drm, + struct vc4_encoder *vc4_encoder; + int i; + ++ if (encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL) ++ continue; ++ + vc4_encoder = to_vc4_encoder(encoder); + for (i = 0; i < ARRAY_SIZE(pv_data->encoder_types); i++) { + if (vc4_encoder->type == encoder_types[i]) { +-- +2.18.4 + + +From 8d31f467b18fe2861e0a5ce248ec321d88d2d89b Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 16 Mar 2021 13:51:52 +0100 +Subject: [PATCH 634/661] drm/vc4: Rework the encoder retrieval code + +Due to a FIFO that cannot be flushed between the pixelvalve and the HDMI +controllers on BCM2711, we need to carefully disable both at boot time +if they were left enabled by the firmware. + +However, at the time we're running that code, the struct drm_connector +encoder pointer isn't set yet, and thus we cannot retrieve the encoder +associated to our CRTC. + +We can however make use of the fact that we have a less flexible setup +than what DRM allows where we have a 1:1 relationship between our CRTCs +and encoders (and connectors), and thus store the crtc associated to our +encoder at boot time. + +We cannot do that at the time the encoders are probed though, since the +CRTCs won't be probed yet and thus we don't know at that time which CRTC +index we're going to get, so let's do this in two passes: we can first +bind all the components and then once they all are bound, we can iterate +over all the encoders to find their associated CRTC and set the pointer. + +This is similar to what we're doing to set the possible_crtcs field. + +Fixes: 875a4d536842 ("drm/vc4: drv: Disable the CRTC at boot time") +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 25 +++++++++++++++++++++-- + drivers/gpu/drm/vc4/vc4_drv.c | 36 ++++++++++++++++++++++++++++++++++ + drivers/gpu/drm/vc4/vc4_drv.h | 10 ++++++++++ + 3 files changed, 69 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c +index 4efd3892192a..133c96ee4829 100644 +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -272,6 +272,19 @@ static u32 vc4_crtc_get_fifo_full_level_bits(struct vc4_crtc *vc4_crtc, + PV_CONTROL_FIFO_LEVEL); + } + ++static struct drm_encoder *vc4_get_connector_encoder(struct drm_connector *connector) ++{ ++ struct drm_encoder *encoder; ++ ++ if (drm_WARN_ON(connector->dev, hweight32(connector->possible_encoders) != 1)) ++ return NULL; ++ ++ drm_connector_for_each_possible_encoder(connector, encoder) ++ return encoder; ++ ++ return NULL; ++} ++ + /* + * Returns the encoder attached to the CRTC. + * +@@ -286,9 +299,17 @@ static struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc) + + drm_connector_list_iter_begin(crtc->dev, &conn_iter); + drm_for_each_connector_iter(connector, &conn_iter) { +- if (connector->state->crtc == crtc) { ++ struct drm_encoder *encoder; ++ struct vc4_encoder *vc4_encoder; ++ ++ encoder = vc4_get_connector_encoder(connector); ++ if (!encoder) ++ continue; ++ ++ vc4_encoder = to_vc4_encoder(encoder); ++ if (vc4_encoder->crtc == crtc) { + drm_connector_list_iter_end(&conn_iter); +- return connector->encoder; ++ return encoder; + } + } + drm_connector_list_iter_end(&conn_iter); +diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c +index 617c113b033f..8baa90837e9e 100644 +--- a/drivers/gpu/drm/vc4/vc4_drv.c ++++ b/drivers/gpu/drm/vc4/vc4_drv.c +@@ -226,6 +226,41 @@ static int compare_dev(struct device *dev, void *data) + return dev == data; + } + ++static struct drm_crtc *vc4_drv_find_crtc(struct drm_device *drm, ++ struct drm_encoder *encoder) ++{ ++ struct drm_crtc *crtc; ++ ++ if (WARN_ON(hweight32(encoder->possible_crtcs) != 1)) ++ return NULL; ++ ++ drm_for_each_crtc(crtc, drm) { ++ if (!drm_encoder_crtc_ok(encoder, crtc)) ++ continue; ++ ++ return crtc; ++ } ++ ++ return NULL; ++} ++ ++static void vc4_drv_set_encoder_data(struct drm_device *drm) ++{ ++ struct drm_encoder *encoder; ++ ++ drm_for_each_encoder(encoder, drm) { ++ struct vc4_encoder *vc4_encoder; ++ struct drm_crtc *crtc; ++ ++ crtc = vc4_drv_find_crtc(drm, encoder); ++ if (WARN_ON(!crtc)) ++ return; ++ ++ vc4_encoder = to_vc4_encoder(encoder); ++ vc4_encoder->crtc = crtc; ++ } ++} ++ + static void vc4_match_add_drivers(struct device *dev, + struct component_match **match, + struct platform_driver *const *drivers, +@@ -308,6 +343,7 @@ static int vc4_drm_bind(struct device *dev) + ret = component_bind_all(dev, drm); + if (ret) + return ret; ++ vc4_drv_set_encoder_data(drm); + + if (!vc4->firmware_kms) { + ret = vc4_plane_create_additional_planes(drm); +diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h +index 7a70838595b2..ff4e71f79e49 100644 +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -445,6 +445,16 @@ enum vc4_encoder_type { + + struct vc4_encoder { + struct drm_encoder base; ++ ++ /* ++ * At boot time, we need to be able to retrieve the CRTC for a given ++ * connector in order to run the disable hooks below to avoid the stuck ++ * pixel issue. Unfortunately the drm_connector->encoder pointer is ++ * NULL at that time so we can't move up the chain, so we'll store it ++ * ourselves here. ++ */ ++ struct drm_crtc *crtc; ++ + enum vc4_encoder_type type; + u32 clock_select; + +-- +2.18.4 + + +From 8821b5b72dfef5fe1db1ef9c9cd915541db6c617 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 25 Mar 2021 10:37:38 +0100 +Subject: [PATCH 635/661] drm/vc4: hdmi: Prevent clock unbalance + +Since we fixed the hooks to disable the encoder at boot, we now have an +unbalanced clk_disable call at boot since we never enabled them in the +first place. + +Let's mimic the state of the hardware and enable the clocks at boot if +the controller is enabled to get the use-count right. + +Cc: # v5.10+ +Fixes: 09c438139b8f ("drm/vc4: hdmi: Implement finer-grained hooks") +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 1872b3a2bb51..3a0ac5a9c027 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -2626,6 +2626,14 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) + if (vc4_hdmi->variant->reset) + vc4_hdmi->variant->reset(vc4_hdmi); + ++ if ((of_device_is_compatible(dev->of_node, "brcm,bcm2711-hdmi0") || ++ of_device_is_compatible(dev->of_node, "brcm,bcm2711-hdmi1")) && ++ HDMI_READ(HDMI_VID_CTL) & VC4_HD_VID_CTL_ENABLE) { ++ clk_prepare_enable(vc4_hdmi->pixel_clock); ++ clk_prepare_enable(vc4_hdmi->hsm_clock); ++ clk_prepare_enable(vc4_hdmi->pixel_bvb_clock); ++ } ++ + pm_runtime_enable(dev); + + drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); +-- +2.18.4 + + +From a645d20fa9dd8ea3a22e8d360b645cac22da8e7d Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 25 Feb 2021 14:42:03 +0100 +Subject: [PATCH 636/661] drm/vc4: hvs: Make the HVS bind first + +We'll need to have the HVS binding before the HDMI controllers so that +we can check whether the firmware allows to run in 4kp60. Reorder a bit +the component list, and document the current constraints we're aware of. + +Acked-by: Dave Stevenson +Acked-by: Thomas Zimmermann +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_drv.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c +index 8baa90837e9e..c404ef49f420 100644 +--- a/drivers/gpu/drm/vc4/vc4_drv.c ++++ b/drivers/gpu/drm/vc4/vc4_drv.c +@@ -390,12 +390,21 @@ static const struct component_master_ops vc4_drm_ops = { + .unbind = vc4_drm_unbind, + }; + ++/* ++ * This list determines the binding order of our components, and we have ++ * a few constraints: ++ * - The TXP driver needs to be bound before the PixelValves (CRTC) ++ * but after the HVS to set the possible_crtc field properly ++ * - The HDMI driver needs to be bound after the HVS so that we can ++ * lookup the HVS maximum core clock rate and figure out if we ++ * support 4kp60 or not. ++ */ + static struct platform_driver *const component_drivers[] = { ++ &vc4_hvs_driver, + &vc4_hdmi_driver, + &vc4_vec_driver, + &vc4_dpi_driver, + &vc4_dsi_driver, +- &vc4_hvs_driver, + &vc4_txp_driver, + &vc4_crtc_driver, + &vc4_firmware_kms_driver, +-- +2.18.4 + + +From e9b2f2322eb806c4c45dc445f67fd96138c68ce1 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 8 Oct 2020 16:06:08 +0200 +Subject: [PATCH 637/661] drm/vc4: hdmi: Properly compute the BVB clock rate + +The BVB clock rate computation doesn't take into account a mode clock of +594MHz that we're going to need to support 4k60. + +Acked-by: Thomas Zimmermann +Reviewed-by: Dave Stevenson +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 3a0ac5a9c027..ca6651607acd 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -93,7 +93,6 @@ + # define VC4_HD_M_ENABLE BIT(0) + + #define CEC_CLOCK_FREQ 40000 +-#define VC4_HSM_MID_CLOCK 149985000 + + #define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1 + +@@ -1120,7 +1119,7 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + conn_state_to_vc4_hdmi_conn_state(conn_state); + struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; + struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); +- unsigned long pixel_rate, hsm_rate; ++ unsigned long bvb_rate, pixel_rate, hsm_rate; + int ret; + + ret = pm_runtime_get_sync(&vc4_hdmi->pdev->dev); +@@ -1174,12 +1173,14 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + + vc4_hdmi_cec_update_clk_div(vc4_hdmi); + +- /* +- * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup +- * at 300MHz. +- */ +- vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, +- (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000)); ++ if (pixel_rate > 297000000) ++ bvb_rate = 300000000; ++ else if (pixel_rate > 148500000) ++ bvb_rate = 150000000; ++ else ++ bvb_rate = 75000000; ++ ++ vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, bvb_rate); + if (IS_ERR(vc4_hdmi->bvb_req)) { + DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req)); + clk_request_done(vc4_hdmi->hsm_req); +-- +2.18.4 + + +From 3707d96b7a19d3a0c267710458c7d69afd385b91 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 25 Feb 2021 15:35:02 +0100 +Subject: [PATCH 638/661] drm/vc4: hdmi: Check and warn if we can't reach 4kp60 + frequencies + +In order to reach the frequencies needed to output at 594MHz, the +firmware needs to be configured with the appropriate parameters in the +config.txt file (enable_hdmi_4kp60 and force_turbo). + +Let's detect it at bind time, warn the user if we can't, and filter out +the relevant modes. + +Acked-by: Thomas Zimmermann +Reviewed-by: Dave Stevenson +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 31 +++++++++++++++++++++++++++++++ + drivers/gpu/drm/vc4/vc4_hdmi.h | 8 ++++++++ + 2 files changed, 39 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index ca6651607acd..08bb54eb76e3 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -401,6 +401,11 @@ static void hdmi_codec_eld_chmap(struct vc4_hdmi *vc4_hdmi) + + #define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000) + ++static bool vc4_hdmi_mode_needs_scrambling(const struct drm_display_mode *mode) ++{ ++ return (mode->clock * 1000) > HDMI_14_MAX_TMDS_CLK; ++} ++ + static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused) + { + struct drm_info_node *node = (struct drm_info_node *)m->private; +@@ -523,6 +528,18 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) + ret = drm_add_edid_modes(connector, edid); + kfree(edid); + ++ if (vc4_hdmi->disable_4kp60) { ++ struct drm_device *drm = connector->dev; ++ struct drm_display_mode *mode; ++ ++ list_for_each_entry(mode, &connector->probed_modes, head) { ++ if (vc4_hdmi_mode_needs_scrambling(mode)) { ++ drm_warn_once(drm, "The core clock cannot reach frequencies high enough to support 4k @ 60Hz."); ++ drm_warn_once(drm, "Please change your config.txt file to add hdmi_enable_4kp60."); ++ } ++ } ++ } ++ + return ret; + } + +@@ -1343,6 +1360,9 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder, + if (pixel_rate > vc4_hdmi->variant->max_pixel_clock) + return -EINVAL; + ++ if (vc4_hdmi->disable_4kp60 && (pixel_rate > HDMI_14_MAX_TMDS_CLK)) ++ return -EINVAL; ++ + vc4_state->pixel_rate = pixel_rate; + + return 0; +@@ -1362,6 +1382,9 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder, + if ((mode->clock * 1000) > vc4_hdmi->variant->max_pixel_clock) + return MODE_CLOCK_HIGH; + ++ if (vc4_hdmi->disable_4kp60 && vc4_hdmi_mode_needs_scrambling(mode)) ++ return MODE_CLOCK_HIGH; ++ + return MODE_OK; + } + +@@ -2624,6 +2647,14 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) + vc4_hdmi->disable_wifi_frequencies = + of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence"); + ++ if (variant->max_pixel_clock == 600000000) { ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ long max_rate = clk_round_rate(vc4->hvs->core_clk, 550000000); ++ ++ if (max_rate < 550000000) ++ vc4_hdmi->disable_4kp60 = true; ++ } ++ + if (vc4_hdmi->variant->reset) + vc4_hdmi->variant->reset(vc4_hdmi); + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h +index 11a4b737d0ab..23e8cfc22c4d 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.h ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.h +@@ -162,6 +162,14 @@ struct vc4_hdmi { + */ + bool disable_wifi_frequencies; + ++ /* ++ * Even if HDMI0 on the RPi4 can output modes requiring a pixel ++ * rate higher than 297MHz, it needs some adjustments in the ++ * config.txt file to be able to do so and thus won't always be ++ * available. ++ */ ++ bool disable_4kp60; ++ + struct cec_adapter *cec_adap; + struct cec_msg cec_rx_msg; + bool cec_tx_ok; +-- +2.18.4 + + +From aba8a43f1ed56720927eeb72a1a7badb65a434cc Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 8 Oct 2020 16:06:58 +0200 +Subject: [PATCH 639/661] drm/vc4: hdmi: Enable the scrambler + +The HDMI controller on the BCM2711 includes a scrambler in order to +reach the HDMI 2.0 modes that require it. Let's add the support for it. + +Acked-by: Thomas Zimmermann +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 64 +++++++++++++++++++++++++++++ + drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 3 ++ + 2 files changed, 67 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 08bb54eb76e3..b8785dc9f4f3 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -35,6 +35,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -78,6 +79,8 @@ + #define VC5_HDMI_VERTB_VSPO_SHIFT 16 + #define VC5_HDMI_VERTB_VSPO_MASK VC4_MASK(29, 16) + ++#define VC5_HDMI_SCRAMBLER_CTL_ENABLE BIT(0) ++ + #define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT 8 + #define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_MASK VC4_MASK(10, 8) + +@@ -841,6 +844,64 @@ static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder) + vc4_hdmi_set_hdr_infoframe(encoder); + } + ++static bool vc4_hdmi_supports_scrambling(struct drm_encoder *encoder, ++ struct drm_display_mode *mode) ++{ ++ struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder); ++ struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); ++ struct drm_display_info *display = &vc4_hdmi->connector.display_info; ++ ++ if (!vc4_encoder->hdmi_monitor) ++ return false; ++ ++ if (!display->hdmi.scdc.supported || ++ !display->hdmi.scdc.scrambling.supported) ++ return false; ++ ++ return true; ++} ++ ++static void vc4_hdmi_enable_scrambling(struct drm_encoder *encoder) ++{ ++ struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; ++ struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); ++ ++ if (!vc4_hdmi_supports_scrambling(encoder, mode)) ++ return; ++ ++ if (!vc4_hdmi_mode_needs_scrambling(mode)) ++ return; ++ ++ drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true); ++ drm_scdc_set_scrambling(vc4_hdmi->ddc, true); ++ ++ HDMI_WRITE(HDMI_SCRAMBLER_CTL, HDMI_READ(HDMI_SCRAMBLER_CTL) | ++ VC5_HDMI_SCRAMBLER_CTL_ENABLE); ++} ++ ++static void vc4_hdmi_disable_scrambling(struct drm_encoder *encoder) ++{ ++ struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); ++ struct drm_crtc *crtc = encoder->crtc; ++ ++ /* ++ * At boot, encoder->crtc will be NULL. Since we don't know the ++ * state of the scrambler and in order to avoid any ++ * inconsistency, let's disable it all the time. ++ */ ++ if (crtc && !vc4_hdmi_supports_scrambling(encoder, &crtc->mode)) ++ return; ++ ++ if (crtc && !vc4_hdmi_mode_needs_scrambling(&crtc->mode)) ++ return; ++ ++ HDMI_WRITE(HDMI_SCRAMBLER_CTL, HDMI_READ(HDMI_SCRAMBLER_CTL) & ++ ~VC5_HDMI_SCRAMBLER_CTL_ENABLE); ++ ++ drm_scdc_set_scrambling(vc4_hdmi->ddc, false); ++ drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, false); ++} ++ + static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) + { +@@ -853,6 +914,8 @@ static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder, + + HDMI_WRITE(HDMI_VID_CTL, + HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX); ++ ++ vc4_hdmi_disable_scrambling(encoder); + } + + static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder, +@@ -1308,6 +1371,7 @@ static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder, + } + + vc4_hdmi_recenter_fifo(vc4_hdmi); ++ vc4_hdmi_enable_scrambling(encoder); + } + + static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder) +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h +index 20a1438a72cb..a81fdf90f66b 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h ++++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h +@@ -100,6 +100,7 @@ enum vc4_hdmi_field { + HDMI_RM_FORMAT, + HDMI_RM_OFFSET, + HDMI_SCHEDULER_CONTROL, ++ HDMI_SCRAMBLER_CTL, + HDMI_SW_RESET_CONTROL, + HDMI_TX_PHY_CHANNEL_SWAP, + HDMI_TX_PHY_CLK_DIV, +@@ -238,6 +239,7 @@ static const struct vc4_hdmi_register vc5_hdmi_hdmi0_fields[] = { + VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178), + VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c), + VC4_HDMI_REG(HDMI_HOTPLUG, 0x1a8), ++ VC4_HDMI_REG(HDMI_SCRAMBLER_CTL, 0x1c4), + + VC5_DVP_REG(HDMI_CLOCK_STOP, 0x0bc), + VC5_DVP_REG(HDMI_VEC_INTERFACE_XBAR, 0x0f0), +@@ -317,6 +319,7 @@ static const struct vc4_hdmi_register vc5_hdmi_hdmi1_fields[] = { + VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178), + VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c), + VC4_HDMI_REG(HDMI_HOTPLUG, 0x1a8), ++ VC4_HDMI_REG(HDMI_SCRAMBLER_CTL, 0x1c4), + + VC5_DVP_REG(HDMI_CLOCK_STOP, 0x0bc), + VC5_DVP_REG(HDMI_VEC_INTERFACE_XBAR, 0x0f0), +-- +2.18.4 + + +From 08b2f3b59807fbd61c5c50f0c12067f44ef111f7 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 8 Oct 2020 16:08:06 +0200 +Subject: [PATCH 640/661] drm/vc4: hdmi: Raise the maximum clock rate + +Now that we have the infrastructure in place, we can raise the maximum +pixel rate we can reach for HDMI0 on the BCM2711. + +HDMI1 is left untouched since its pixelvalve has a smaller FIFO and +would need a clock faster than what we can provide to support the same +modes. + +Acked-by: Thomas Zimmermann +Reviewed-by: Dave Stevenson +Signed-off-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index b8785dc9f4f3..7d0d1da47609 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -2844,7 +2844,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = { + .encoder_type = VC4_ENCODER_TYPE_HDMI0, + .debugfs_name = "hdmi0_regs", + .card_name = "vc4-hdmi-0", +- .max_pixel_clock = HDMI_14_MAX_TMDS_CLK, ++ .max_pixel_clock = 600000000, + .registers = vc5_hdmi_hdmi0_fields, + .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields), + .phy_lane_mapping = { +-- +2.18.4 + + +From aaf8f4b251cb605782dd969e935ef5d9da5d08b6 Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Wed, 21 Apr 2021 15:15:42 +0100 +Subject: [PATCH 641/661] vc4/drm: hdmi: Handle case when bvb clock is null + +Pi2/3 have no bvb clock but want the other clocks to remain enabled here + +See: https://github.com/raspberrypi/linux/issues/4299 +Signed-off-by: Dom Cobley +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 7d0d1da47609..c785923f2294 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -931,7 +931,8 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder, + HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE); + + clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock); +- clk_request_done(vc4_hdmi->bvb_req); ++ if (vc4_hdmi->bvb_req) ++ clk_request_done(vc4_hdmi->bvb_req); + clk_disable_unprepare(vc4_hdmi->hsm_clock); + clk_request_done(vc4_hdmi->hsm_req); + clk_disable_unprepare(vc4_hdmi->pixel_clock); +@@ -1260,7 +1261,8 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + else + bvb_rate = 75000000; + +- vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, bvb_rate); ++ if (vc4_hdmi->pixel_bvb_clock) ++ vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, bvb_rate); + if (IS_ERR(vc4_hdmi->bvb_req)) { + DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req)); + clk_request_done(vc4_hdmi->hsm_req); +@@ -1272,7 +1274,8 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock); + if (ret) { + DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret); +- clk_request_done(vc4_hdmi->bvb_req); ++ if (vc4_hdmi->bvb_req) ++ clk_request_done(vc4_hdmi->bvb_req); + clk_request_done(vc4_hdmi->hsm_req); + clk_disable_unprepare(vc4_hdmi->hsm_clock); + clk_disable_unprepare(vc4_hdmi->pixel_clock); +-- +2.18.4 + + +From 934d27288f0ef1639daa617d87f461af96a398d9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 19 Apr 2021 10:33:24 +0100 +Subject: [PATCH 642/661] overlays: spi-rtc: Add ds3232 and ds3234 + +Extend the spi-rtc overlay to support the ds3232 and ds3234 RTCs, as +well as adding parameters to select difference SPI controllers and +chip selects. + +N.B. The default CS is now active-low - use the "cs_high" parameter to +override this. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 12 +++- + .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 58 ++++++++++++++++--- + 2 files changed, 61 insertions(+), 9 deletions(-) + +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index b6856092721d..17521568cee5 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -2689,7 +2689,17 @@ Params: + Name: spi-rtc + Info: Adds support for a number of SPI Real Time Clock devices + Load: dtoverlay=spi-rtc,= +-Params: pcf2123 Select the PCF2123 device ++Params: ds3232 Select the DS3232 device ++ ds3234 Select the DS3234 device ++ pcf2123 Select the PCF2123 device ++ ++ spi0_0 Use spi0.0 (default) ++ spi0_1 Use spi0.1 ++ spi1_0 Use spi1.0 ++ spi1_1 Use spi1.1 ++ spi2_0 Use spi2.0 ++ spi2_1 Use spi2.1 ++ cs_high This device requires an active-high CS + + + Name: spi0-1cs +diff --git a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts +index 9664afc9845c..51b7fec281c0 100644 +--- a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts +@@ -1,3 +1,4 @@ ++// Definitions for several SPI-based Real Time Clocks + /dts-v1/; + /plugin/; + +@@ -5,29 +6,70 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target = <&spidev0>; ++ target = <&rtc>; + __dormant__ { +- status = "disabled"; ++ compatible = "maxim,ds3232"; + }; + }; + + fragment@1 { +- target = <&spi0>; ++ target = <&rtc>; ++ __dormant__ { ++ compatible = "maxim,ds3234"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&rtc>; + __dormant__ { ++ compatible = "nxp,rtc-pcf2123"; ++ }; ++ }; ++ ++ spidev: fragment@100 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ frag101: fragment@101 { ++ target = <&spi0>; ++ __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + +- rtc-pcf2123@0 { +- compatible = "nxp,rtc-pcf2123"; +- spi-max-frequency = <5000000>; +- spi-cs-high = <1>; ++ rtc: rtc@0 { + reg = <0>; ++ spi-max-frequency = <5000000>; + }; + }; + }; + + __overrides__ { +- pcf2123 = <0>, "=0=1"; ++ spi0_0 = <&spidev>, "target:0=",<&spidev0>, ++ <&frag101>, "target:0=",<&spi0>, ++ <&rtc>, "reg:0=0"; ++ spi0_1 = <&spidev>, "target:0=",<&spidev1>, ++ <&frag101>, "target:0=",<&spi0>, ++ <&rtc>, "reg:0=1"; ++ spi1_0 = <0>,"-100", ++ <&frag101>, "target:0=",<&spi1>, ++ <&rtc>, "reg:0=0"; ++ spi1_1 = <0>,"-100", ++ <&frag101>, "target:0=",<&spi1>, ++ <&rtc>, "reg:0=1"; ++ spi2_0 = <0>,"-100", ++ <&frag101>, "target:0=",<&spi2>, ++ <&rtc>, "reg:0=0"; ++ spi2_1 = <0>,"-100", ++ <&frag101>, "target:0=",<&spi2>, ++ <&rtc>, "reg:0=1"; ++ cs_high = <&rtc>, "spi-cs-high?"; ++ ++ ds3232 = <0>,"+0"; ++ ds3234 = <0>,"+1"; ++ pcf2123 = <0>,"+2"; + }; + }; +-- +2.18.4 + + +From b4a8f470aa21c32b95c4f9108ef863e5bb0ab242 Mon Sep 17 00:00:00 2001 +From: kFYatek <4499762+kFYatek@users.noreply.github.com> +Date: Sat, 27 Mar 2021 21:43:33 +0100 +Subject: [PATCH 643/661] drm/vc4: Fix VEC address for BCM2711 in the + devicetrees + +The VEC has a different address (0x7ec13000) on the BCM2711 (used in +e.g. Raspberry Pi 4) compared to BCM238x (e.g. Pi 3 and earlier). This +was erroneously not taken account for. + +Definition of the VEC in the devicetrees had to be moved from +bcm283x.dtsi to bcm2711.dtsi and bcm2835-common.dtsi to allow for this +differentiation. + +Signed-off-by: Mateusz Kwiatkowski +--- + arch/arm/boot/dts/bcm2711.dtsi | 8 ++++++++ + arch/arm/boot/dts/bcm2835-common.dtsi | 8 ++++++++ + arch/arm/boot/dts/bcm283x.dtsi | 8 -------- + 3 files changed, 16 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi +index b4bca5af95e1..11098835cc05 100644 +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -300,6 +300,14 @@ + status = "disabled"; + }; + ++ vec: vec@7ec13000 { ++ compatible = "brcm,bcm2835-vec"; ++ reg = <0x7ec13000 0x1000>; ++ clocks = <&clocks BCM2835_CLOCK_VEC>; ++ interrupts = <2 27>; ++ status = "disabled"; ++ }; ++ + dvp: clock@7ef00000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7ef00000 0x10>; +diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi +index 47b958428d0c..06d8c3882cb7 100644 +--- a/arch/arm/boot/dts/bcm2835-common.dtsi ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi +@@ -106,6 +106,14 @@ + status = "okay"; + }; + ++ vec: vec@7e806000 { ++ compatible = "brcm,bcm2835-vec"; ++ reg = <0x7e806000 0x1000>; ++ clocks = <&clocks BCM2835_CLOCK_VEC>; ++ interrupts = <2 27>; ++ status = "disabled"; ++ }; ++ + pixelvalve@7e807000 { + compatible = "brcm,bcm2835-pixelvalve2"; + reg = <0x7e807000 0x100>; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index 346838ee9d21..b95e0cf827d3 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -488,14 +488,6 @@ + status = "disabled"; + }; + +- vec: vec@7e806000 { +- compatible = "brcm,bcm2835-vec"; +- reg = <0x7e806000 0x1000>; +- clocks = <&clocks BCM2835_CLOCK_VEC>; +- interrupts = <2 27>; +- status = "disabled"; +- }; +- + usb: usb@7e980000 { + compatible = "brcm,bcm2835-usb"; + reg = <0x7e980000 0x10000>; +-- +2.18.4 + + +From b9ed8f889f5f32eadb0241bfb0135e6f615ca5cb Mon Sep 17 00:00:00 2001 +From: kFYatek <4499762+kFYatek@users.noreply.github.com> +Date: Sat, 27 Mar 2021 21:43:38 +0100 +Subject: [PATCH 644/661] drm/vc4: Fix clock source for VEC PixelValve on + BCM2711 + +On the BCM2711 (Raspberry Pi 4), the VEC is actually connected to +output 2 of pixelvalve3. + +NOTE: This contradicts the Broadcom docs, but has been empirically +tested and confirmed by Raspberry Pi firmware devs. + +Signed-off-by: Mateusz Kwiatkowski +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c +index 133c96ee4829..d6a932246240 100644 +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -1030,7 +1030,7 @@ static const struct vc4_pv_data bcm2711_pv3_data = { + .fifo_depth = 64, + .pixels_per_clock = 1, + .encoder_types = { +- [0] = VC4_ENCODER_TYPE_VEC, ++ [PV_CONTROL_CLK_SELECT_VEC] = VC4_ENCODER_TYPE_VEC, + }, + }; + +-- +2.18.4 + + +From 1198ea4a3399d6c8a2583ebe68107e3deb5cfff2 Mon Sep 17 00:00:00 2001 +From: kFYatek <4499762+kFYatek@users.noreply.github.com> +Date: Sat, 27 Mar 2021 21:43:40 +0100 +Subject: [PATCH 645/661] drm/vc4: Separate VEC compatible variants + +The VEC's DAC on BCM2711 is slightly different compared to the one on +BCM283x and needs different configuration. In particular, bit 3 +(mask 0x8) switches the BCM2711 DAC input to "self-test input data", +which makes the output unusable. Separating two compatible variants in +devicetrees and the DRM driver was therefore necessary. + +The configurations used for both variants have been borrowed from +Raspberry Pi (model 3B for BCM283x, 4B for BCM2711) firmware defaults. + +Signed-off-by: Mateusz Kwiatkowski +--- + .../bindings/display/brcm,bcm2835-vec.yaml | 4 ++- + arch/arm/boot/dts/bcm2711.dtsi | 2 +- + drivers/gpu/drm/vc4/vc4_vec.c | 27 +++++++++++++++---- + 3 files changed, 26 insertions(+), 7 deletions(-) + +diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-vec.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-vec.yaml +index d900cc57b4ec..4d8a6b615e5b 100644 +--- a/Documentation/devicetree/bindings/display/brcm,bcm2835-vec.yaml ++++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-vec.yaml +@@ -11,7 +11,9 @@ maintainers: + + properties: + compatible: +- const: brcm,bcm2835-vec ++ enum: ++ - brcm,bcm2835-vec ++ - brcm,bcm2711-vec + + reg: + maxItems: 1 +diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi +index 11098835cc05..e8434edc2bff 100644 +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -301,7 +301,7 @@ + }; + + vec: vec@7ec13000 { +- compatible = "brcm,bcm2835-vec"; ++ compatible = "brcm,bcm2711-vec"; + reg = <0x7ec13000 0x1000>; + clocks = <&clocks BCM2835_CLOCK_VEC>; + interrupts = <2 27>; +diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c +index bd5b8eb58b18..a467ceba75e4 100644 +--- a/drivers/gpu/drm/vc4/vc4_vec.c ++++ b/drivers/gpu/drm/vc4/vc4_vec.c +@@ -154,9 +154,14 @@ + #define VEC_DAC_MISC_DAC_RST_N BIT(0) + + ++struct vc4_vec_variant { ++ u32 dac_config; ++}; ++ + /* General VEC hardware state. */ + struct vc4_vec { + struct platform_device *pdev; ++ const struct vc4_vec_variant *variant; + + struct drm_encoder *encoder; + struct drm_connector *connector; +@@ -451,10 +456,7 @@ static void vc4_vec_encoder_enable(struct drm_encoder *encoder) + VEC_WRITE(VEC_CONFIG2, + VEC_CONFIG2_UV_DIG_DIS | VEC_CONFIG2_RGB_DIG_DIS); + VEC_WRITE(VEC_CONFIG3, VEC_CONFIG3_HORIZ_LEN_STD); +- VEC_WRITE(VEC_DAC_CONFIG, +- VEC_DAC_CONFIG_DAC_CTRL(0xc) | +- VEC_DAC_CONFIG_DRIVER_CTRL(0xc) | +- VEC_DAC_CONFIG_LDO_BIAS_CTRL(0x46)); ++ VEC_WRITE(VEC_DAC_CONFIG, vec->variant->dac_config); + + /* Mask all interrupts. */ + VEC_WRITE(VEC_MASK0, 0); +@@ -507,8 +509,21 @@ static const struct drm_encoder_helper_funcs vc4_vec_encoder_helper_funcs = { + .atomic_mode_set = vc4_vec_encoder_atomic_mode_set, + }; + ++static const struct vc4_vec_variant bcm2835_vec_variant = { ++ .dac_config = VEC_DAC_CONFIG_DAC_CTRL(0xc) | ++ VEC_DAC_CONFIG_DRIVER_CTRL(0xc) | ++ VEC_DAC_CONFIG_LDO_BIAS_CTRL(0x46) ++}; ++ ++static const struct vc4_vec_variant bcm2711_vec_variant = { ++ .dac_config = VEC_DAC_CONFIG_DAC_CTRL(0x0) | ++ VEC_DAC_CONFIG_DRIVER_CTRL(0x80) | ++ VEC_DAC_CONFIG_LDO_BIAS_CTRL(0x61) ++}; ++ + static const struct of_device_id vc4_vec_dt_match[] = { +- { .compatible = "brcm,bcm2835-vec", .data = NULL }, ++ { .compatible = "brcm,bcm2835-vec", .data = &bcm2835_vec_variant }, ++ { .compatible = "brcm,bcm2711-vec", .data = &bcm2711_vec_variant }, + { /* sentinel */ }, + }; + +@@ -546,6 +561,8 @@ static int vc4_vec_bind(struct device *dev, struct device *master, void *data) + vec->encoder = &vc4_vec_encoder->base.base; + + vec->pdev = pdev; ++ vec->variant = (const struct vc4_vec_variant *) ++ of_device_get_match_data(dev); + vec->regs = vc4_ioremap_regs(pdev, 0); + if (IS_ERR(vec->regs)) + return PTR_ERR(vec->regs); +-- +2.18.4 + + +From 1b04aef7754994e21ab3f51cc60fd9dc8eba327b Mon Sep 17 00:00:00 2001 +From: Jeff Geerling +Date: Thu, 1 Apr 2021 10:34:27 -0500 +Subject: [PATCH 646/661] configs: Enable ATA and AHCI for SATA drive support. + +--- + arch/arm/configs/bcm2711_defconfig | 3 +++ + arch/arm64/configs/bcm2711_defconfig | 3 +++ + 2 files changed, 6 insertions(+) + +diff --git a/arch/arm/configs/bcm2711_defconfig b/arch/arm/configs/bcm2711_defconfig +index c1204afae5ac..b03546d12299 100644 +--- a/arch/arm/configs/bcm2711_defconfig ++++ b/arch/arm/configs/bcm2711_defconfig +@@ -479,6 +479,9 @@ CONFIG_CHR_DEV_SG=m + CONFIG_SCSI_ISCSI_ATTRS=y + CONFIG_ISCSI_TCP=m + CONFIG_ISCSI_BOOT_SYSFS=m ++CONFIG_ATA=m ++CONFIG_SATA_AHCI=m ++CONFIG_SATA_MV=m + CONFIG_MD=y + CONFIG_MD_LINEAR=m + CONFIG_BLK_DEV_DM=m +diff --git a/arch/arm64/configs/bcm2711_defconfig b/arch/arm64/configs/bcm2711_defconfig +index 93159a7a2d9b..b90bcc5b6ef8 100644 +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -473,6 +473,9 @@ CONFIG_CHR_DEV_SG=m + CONFIG_SCSI_ISCSI_ATTRS=y + CONFIG_ISCSI_TCP=m + CONFIG_ISCSI_BOOT_SYSFS=m ++CONFIG_ATA=m ++CONFIG_SATA_AHCI=m ++CONFIG_SATA_MV=m + CONFIG_MD=y + CONFIG_MD_LINEAR=m + CONFIG_BLK_DEV_DM=m +-- +2.18.4 + + +From 521928c7278d7b27eb25470938ffcc22c7cfc912 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 22 Apr 2021 10:45:37 +0200 +Subject: [PATCH 647/661] clk: requests: Dereference the request pointer after + the check + +The current code will first dereference the req pointer and then test if +it's NULL, resulting in a NULL pointer dereference if req is indeed +NULL. Reorder the test and derefence to avoid the issue + +Signed-off-by: Maxime Ripard +--- + drivers/clk/clk.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index af0f638d1769..1b9a76c7dafa 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -2496,10 +2496,11 @@ EXPORT_SYMBOL_GPL(clk_request_start); + */ + void clk_request_done(struct clk_request *req) + { +- struct clk_core *core = req->clk->core; ++ struct clk_core *core; + + if (!req) + return; ++ core = req->clk->core; + + clk_prepare_lock(); + +-- +2.18.4 + + +From 96cb7a7097c6f0029d15a7d4735d6c1c95ab7bb5 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 25 Mar 2021 18:28:40 +0000 +Subject: [PATCH 648/661] staging/bcm2835-codec: Fix support for levels 4.1 and + 4.2 + +The driver said it supported H264 levels 4.1 and 4.2, but +was missing the V4L2 to MMAL mappings. + +Add in those mappings. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +index 5729a8a7d94e..4622057e71cb 100644 +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -1789,6 +1789,17 @@ static int bcm2835_codec_set_level_profile(struct bcm2835_codec_ctx *ctx, + case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: + param.level = MMAL_VIDEO_LEVEL_H264_4; + break; ++ /* ++ * Note that the hardware spec is level 4.0. Levels above that ++ * are there for correctly encoding the headers and may not ++ * be able to keep up with real-time. ++ */ ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_1: ++ param.level = MMAL_VIDEO_LEVEL_H264_41; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_2: ++ param.level = MMAL_VIDEO_LEVEL_H264_42; ++ break; + default: + /* Should never get here */ + break; +-- +2.18.4 + + +From 214c7fd002cbd44b6c6e1b7239ccb7af56feb72e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 4 Feb 2021 19:08:23 +0000 +Subject: [PATCH 649/661] staging/bcm2835-codec: Set the colourspace + appropriately for RGB formats + +Video decode supports YUV and RGB formats. YUV needs to report SMPTE170M +or REC709 appropriately, whilst RGB should report SRGB. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 51 +++++++++++++------ + 1 file changed, 36 insertions(+), 15 deletions(-) + +diff --git a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +index 4622057e71cb..08429a42c847 100644 +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -930,23 +930,43 @@ static void send_eos_event(struct bcm2835_codec_ctx *ctx) + v4l2_event_queue_fh(&ctx->fh, &ev); + } + +-static void color_mmal2v4l(struct bcm2835_codec_ctx *ctx, u32 mmal_color_space) +-{ +- switch (mmal_color_space) { +- case MMAL_COLOR_SPACE_ITUR_BT601: +- ctx->colorspace = V4L2_COLORSPACE_REC709; +- ctx->xfer_func = V4L2_XFER_FUNC_709; +- ctx->ycbcr_enc = V4L2_YCBCR_ENC_601; +- ctx->quant = V4L2_QUANTIZATION_LIM_RANGE; +- break; ++static void color_mmal2v4l(struct bcm2835_codec_ctx *ctx, u32 encoding, ++ u32 color_space) ++{ ++ int is_rgb; ++ ++ switch (encoding) { ++ case MMAL_ENCODING_I420: ++ case MMAL_ENCODING_YV12: ++ case MMAL_ENCODING_NV12: ++ case MMAL_ENCODING_NV21: ++ case V4L2_PIX_FMT_YUYV: ++ case V4L2_PIX_FMT_YVYU: ++ case V4L2_PIX_FMT_UYVY: ++ case V4L2_PIX_FMT_VYUY: ++ /* YUV based colourspaces */ ++ switch (color_space) { ++ case MMAL_COLOR_SPACE_ITUR_BT601: ++ ctx->colorspace = V4L2_COLORSPACE_SMPTE170M; ++ break; + +- case MMAL_COLOR_SPACE_ITUR_BT709: +- ctx->colorspace = V4L2_COLORSPACE_REC709; +- ctx->xfer_func = V4L2_XFER_FUNC_709; +- ctx->ycbcr_enc = V4L2_YCBCR_ENC_709; +- ctx->quant = V4L2_QUANTIZATION_LIM_RANGE; ++ case MMAL_COLOR_SPACE_ITUR_BT709: ++ ctx->colorspace = V4L2_COLORSPACE_REC709; ++ break; ++ default: ++ break; ++ } ++ break; ++ default: ++ /* RGB based colourspaces */ ++ ctx->colorspace = V4L2_COLORSPACE_SRGB; + break; + } ++ ctx->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(ctx->colorspace); ++ ctx->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(ctx->colorspace); ++ is_rgb = ctx->colorspace == V4L2_COLORSPACE_SRGB; ++ ctx->quant = V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb, ctx->colorspace, ++ ctx->ycbcr_enc); + } + + static void handle_fmt_changed(struct bcm2835_codec_ctx *ctx, +@@ -985,7 +1005,8 @@ static void handle_fmt_changed(struct bcm2835_codec_ctx *ctx, + q_data->height = format->es.video.height; + q_data->sizeimage = format->buffer_size_min; + if (format->es.video.color_space) +- color_mmal2v4l(ctx, format->es.video.color_space); ++ color_mmal2v4l(ctx, format->format.encoding, ++ format->es.video.color_space); + + q_data->aspect_ratio.numerator = format->es.video.par.num; + q_data->aspect_ratio.denominator = format->es.video.par.den; +-- +2.18.4 + + +From c13708dfc31787ee55b276846d2822e65b560048 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 9 Dec 2020 18:53:56 +0000 +Subject: [PATCH 650/661] staging/bcm2835-codec: Pass corrupt frame flag. + +MMAL has the flag MMAL_BUFFER_HEADER_FLAG_CORRUPTED but that +wasn't being passed through, so add it. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +index 08429a42c847..3ed9f47a37fe 100644 +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -1019,6 +1019,7 @@ static void op_buffer_cb(struct vchiq_mmal_instance *instance, + struct mmal_buffer *mmal_buf) + { + struct bcm2835_codec_ctx *ctx = port->cb_ctx; ++ enum vb2_buffer_state buf_state = VB2_BUF_STATE_DONE; + struct m2m_mmal_buffer *buf; + struct vb2_v4l2_buffer *vb2; + +@@ -1075,6 +1076,9 @@ static void op_buffer_cb(struct vchiq_mmal_instance *instance, + vb2->flags |= V4L2_BUF_FLAG_LAST; + } + ++ if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_CORRUPTED) ++ buf_state = VB2_BUF_STATE_ERROR; ++ + /* vb2 timestamps in nsecs, mmal in usecs */ + vb2->vb2_buf.timestamp = mmal_buf->pts * 1000; + +@@ -1082,7 +1086,7 @@ static void op_buffer_cb(struct vchiq_mmal_instance *instance, + if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) + vb2->flags |= V4L2_BUF_FLAG_KEYFRAME; + +- vb2_buffer_done(&vb2->vb2_buf, VB2_BUF_STATE_DONE); ++ vb2_buffer_done(&vb2->vb2_buf, buf_state); + ctx->num_op_buffers++; + + v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: done %d output buffers\n", +-- +2.18.4 + + +From 3ec1ad06517437c54e8149a7ad17333c0e55ed88 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 25 Mar 2021 18:34:50 +0000 +Subject: [PATCH 651/661] staging/bcm2835-camera: Add support for H264 levels + 4.1 and 4.2 + +Whilst the hardware can't achieve the limits of level 4.2 under +all situations, it can exceed level 4.0. + +Allow selection of levels 4.1 and 4.2. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/controls.c | 19 +++++++++++++++++-- + 1 file changed, 17 insertions(+), 2 deletions(-) + +diff --git a/drivers/staging/vc04_services/bcm2835-camera/controls.c b/drivers/staging/vc04_services/bcm2835-camera/controls.c +index f73daa38fa66..f3480a5c5170 100644 +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -709,6 +709,8 @@ static int ctrl_set_video_encode_profile_level(struct bm2835_mmal_dev *dev, + case V4L2_MPEG_VIDEO_H264_LEVEL_3_1: + case V4L2_MPEG_VIDEO_H264_LEVEL_3_2: + case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_1: ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_2: + dev->capture.enc_level = ctrl->val; + break; + default: +@@ -774,6 +776,17 @@ static int ctrl_set_video_encode_profile_level(struct bm2835_mmal_dev *dev, + case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: + param.level = MMAL_VIDEO_LEVEL_H264_4; + break; ++ /* ++ * Note that the hardware spec is level 4.0. Achieving levels ++ * above that depend on exactly the resolution and frame rate ++ * being requested. ++ */ ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_1: ++ param.level = MMAL_VIDEO_LEVEL_H264_41; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_2: ++ param.level = MMAL_VIDEO_LEVEL_H264_42; ++ break; + default: + /* Should never get here */ + break; +@@ -1224,8 +1237,10 @@ static const struct bm2835_mmal_v4l2_ctrl v4l2_ctrls[V4L2_CTRL_COUNT] = { + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | +- BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0)), +- .max = V4L2_MPEG_VIDEO_H264_LEVEL_4_0, ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2)), ++ .max = V4L2_MPEG_VIDEO_H264_LEVEL_4_2, + .def = V4L2_MPEG_VIDEO_H264_LEVEL_4_0, + .step = 1, + .imenu = NULL, +-- +2.18.4 + + +From 04389ff7c74ddac12395a68e555d27aac308813a Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 15 Apr 2021 11:07:55 +0100 +Subject: [PATCH 652/661] staging/bcm2835-codec: Do not update crop from S_FMT + after res change + +During decode, setting the CAPTURE queue format was setting the crop +rectangle to the requested height before aligning up the format to +cater for simple clients that weren't expecting to deal with cropping +and the SELECTION API. +This caused problems on some resolution change events if the client +didn't also then use the selection API. + +Disable the crop update after a resolution change. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +index 3ed9f47a37fe..a97666a1a4be 100644 +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -999,6 +999,13 @@ static void handle_fmt_changed(struct bcm2835_codec_ctx *ctx, + + q_data->crop_width = format->es.video.crop.width; + q_data->crop_height = format->es.video.crop.height; ++ /* ++ * Stop S_FMT updating crop_height should it be unaligned. ++ * Client can still update the crop region via S_SELECTION should it ++ * really want to, but the decoder is likely to complain that the ++ * format then doesn't match. ++ */ ++ q_data->selection_set = true; + q_data->bytesperline = get_bytesperline(format->es.video.width, + q_data->fmt); + +-- +2.18.4 + + +From 9584422718b0ac0afb0e17b38295d39f6ee845dc Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 23 Apr 2021 16:16:49 +0100 +Subject: [PATCH 653/661] staging/bcm2835-isp: Fix compiler warning + +The result of dividing a u32 by a size_t is an unsigned int on arm32 +and a long unsigned int on arm64. Use "%zu" (the size_t format) to +remove the build warning for 64-bit builds. + +Signed-off-by: Phil Elwell +--- + drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c b/drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c +index 5cca8bdd1d65..08dce8bba9bb 100644 +--- a/drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c ++++ b/drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c +@@ -1235,7 +1235,7 @@ static int bcm2835_isp_get_supported_fmts(struct bcm2835_isp_node *node) + if (ret) { + if (ret == MMAL_MSG_STATUS_ENOSPC) { + v4l2_err(&dev->v4l2_dev, +- "%s: port has more encodings than we provided space for. Some are dropped (%u vs %u).\n", ++ "%s: port has more encodings than we provided space for. Some are dropped (%zu vs %u).\n", + __func__, param_size / sizeof(u32), + MAX_SUPPORTED_ENCODINGS); + num_encodings = MAX_SUPPORTED_ENCODINGS; +-- +2.18.4 + + +From a934e1128941818705d1d03ce190a593debb3b82 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Sun, 25 Apr 2021 21:07:03 +0100 +Subject: [PATCH 654/661] overlays: Allow multiple gpio-shutdown instances + +There is no reason not to support multiple gpio-shutdown signals, +so add the necessary __override__ magic. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts +index 0a27595143ec..da148064aedd 100644 +--- a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts +@@ -24,7 +24,7 @@ + // by a "pinctrl client", as is done below. See: + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt +- pin_state: shutdown_button_pins { ++ pin_state: shutdown_button_pins@3 { + brcm,pins = <3>; // gpio number + brcm,function = <0>; // 0 = input, 1 = output + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up +@@ -35,7 +35,7 @@ + // Add a new device to the /soc devicetree node + target-path = "/soc"; + __overlay__ { +- shutdown_button { ++ shutdown_button: shutdown_button@3 { + // Let the gpio-keys driver handle this device. See: + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt + compatible = "gpio-keys"; +@@ -69,6 +69,8 @@ + __overrides__ { + // Allow overriding the GPIO number. + gpio_pin = <&button>,"gpios:4", ++ <&shutdown_button>,"reg:0", ++ <&pin_state>,"reg:0", + <&pin_state>,"brcm,pins:0"; + + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup +-- +2.18.4 + + +From 0d2d4c6802cebcb3a04dbd21bcf47e9abadf335d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 26 Apr 2021 09:58:14 +0100 +Subject: [PATCH 655/661] overlays: README - improve the gpio-poweroff guide + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index 17521568cee5..b9be3bece19b 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -987,8 +987,15 @@ Params: + + + Name: gpio-poweroff +-Info: Drives a GPIO high or low on poweroff (including halt). Enabling this +- overlay will prevent the ability to boot by driving GPIO3 low. ++Info: Drives a GPIO high or low on poweroff (including halt). Using this ++ overlay interferes with the normal power-down sequence, preventing the ++ kernel from resetting the SoC (a necessary step in a normal power-off ++ or reboot). This also disables the ability to triger a boot by driving ++ GPIO3 low. ++ ++ Users of this overlay are required to provide an external mechanism to ++ switch off the power supply when signalled - failure to do so results ++ in a kernel BUG, increased power consumption and undefined behaviour. + Load: dtoverlay=gpio-poweroff,= + Params: gpiopin GPIO for signalling (default 26) + +-- +2.18.4 + + +From c291b7877a6a0386a165facaf9f3c0de4e0bc666 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 26 Apr 2021 10:08:21 +0100 +Subject: [PATCH 656/661] SQUASH: overlays: Fix typo in README + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index b9be3bece19b..79878f4f30e6 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -990,7 +990,7 @@ Name: gpio-poweroff + Info: Drives a GPIO high or low on poweroff (including halt). Using this + overlay interferes with the normal power-down sequence, preventing the + kernel from resetting the SoC (a necessary step in a normal power-off +- or reboot). This also disables the ability to triger a boot by driving ++ or reboot). This also disables the ability to trigger a boot by driving + GPIO3 low. + + Users of this overlay are required to provide an external mechanism to +-- +2.18.4 + + +From 41066759aed55614ed395ea64ca28e4ab519a45d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 27 Apr 2021 08:59:01 +0100 +Subject: [PATCH 657/661] gpio-poweroff: Remember the old poweroff handler + +Keeping a copy of the old poweroff handler allows it to be restored +should this module be unloaded, but also provides a fallback if the +power hasn't been removed when the timeout elapses. + +See: https://github.com/raspberrypi/rpi-eeprom/issues/330 + +Signed-off-by: Phil Elwell +--- + drivers/power/reset/gpio-poweroff.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/power/reset/gpio-poweroff.c b/drivers/power/reset/gpio-poweroff.c +index 3acbe711b792..1b18dbf3deff 100644 +--- a/drivers/power/reset/gpio-poweroff.c ++++ b/drivers/power/reset/gpio-poweroff.c +@@ -24,6 +24,7 @@ static struct gpio_desc *reset_gpio; + static u32 timeout = DEFAULT_TIMEOUT_MS; + static u32 active_delay = 100; + static u32 inactive_delay = 100; ++static void (*old_power_off)(void); + + static void gpio_poweroff_do_poweroff(void) + { +@@ -43,6 +44,9 @@ static void gpio_poweroff_do_poweroff(void) + /* give it some time */ + mdelay(timeout); + ++ if (old_power_off) ++ old_power_off(); ++ + WARN_ON(1); + } + +@@ -83,6 +87,7 @@ static int gpio_poweroff_probe(struct platform_device *pdev) + gpiod_export_link(&pdev->dev, "poweroff-gpio", reset_gpio); + } + ++ old_power_off = pm_power_off; + pm_power_off = &gpio_poweroff_do_poweroff; + return 0; + } +@@ -90,7 +95,7 @@ static int gpio_poweroff_probe(struct platform_device *pdev) + static int gpio_poweroff_remove(struct platform_device *pdev) + { + if (pm_power_off == &gpio_poweroff_do_poweroff) +- pm_power_off = NULL; ++ pm_power_off = old_power_off; + + gpiod_unexport(reset_gpio); + +-- +2.18.4 + + +From d9379d2337d90c433bd0151a758c476b86054d20 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 28 Apr 2021 16:14:21 +0100 +Subject: [PATCH 658/661] drm/vc4: Allow DBLCLK modes even if horz timing is + odd. + +The 2711 pixel valve can't produce odd horizontal timings, and +checks were added to vc4_hdmi_encoder_atomic_check and +vc4_hdmi_encoder_mode_valid to filter out/block selection of +such modes. + +Modes with DRM_MODE_FLAG_DBLCLK double all the horizontal timing +values before programming them into the PV. The PV values, +therefore, can not be odd, and so the modes can be supported. + +Amend the filtering appropriately. + +See https://github.com/raspberrypi/linux/issues/4307 + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index c785923f2294..0a786803c320 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -1395,6 +1395,7 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder, + unsigned long long tmds_rate; + + if (vc4_hdmi->variant->unsupported_odd_h_timings && ++ !(mode->flags & DRM_MODE_FLAG_DBLCLK) && + ((mode->hdisplay % 2) || (mode->hsync_start % 2) || + (mode->hsync_end % 2) || (mode->htotal % 2))) + return -EINVAL; +@@ -1442,6 +1443,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder, + struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); + + if (vc4_hdmi->variant->unsupported_odd_h_timings && ++ !(mode->flags & DRM_MODE_FLAG_DBLCLK) && + ((mode->hdisplay % 2) || (mode->hsync_start % 2) || + (mode->hsync_end % 2) || (mode->htotal % 2))) + return MODE_H_ILLEGAL; +-- +2.18.4 + + +From d77ebc01428d76ac2eabd616440702a972db6529 Mon Sep 17 00:00:00 2001 +From: Christoph +Date: Wed, 28 Apr 2021 20:30:44 +0200 +Subject: [PATCH 659/661] overlays: Add ugreen-dabboard overlay + +This is a simple overlay based on the simple-audio-card and the dmic +codec. It has the speciality that it is configured to use the codec +as a master I2S device. It works for example with the Si468x DAB +receiver on the uGreen DABBoard. + +See: https://github.com/raspberrypi/linux/issues/4304 + +Signed-off-by: Christoph Orth +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 10 ++++ + .../dts/overlays/ugreen-dabboard-overlay.dts | 49 +++++++++++++++++++ + 3 files changed, 60 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts + +diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile +index 611cb431834f..823f14ee96ff 100644 +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -209,6 +209,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + uart4.dtbo \ + uart5.dtbo \ + udrc.dtbo \ ++ ugreen-dabboard.dtbo \ + upstream.dtbo \ + upstream-pi4.dtbo \ + vc4-fkms-v3d.dtbo \ +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index 79878f4f30e6..a0e28b881ade 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -3130,6 +3130,16 @@ Load: dtoverlay=udrc,= + Params: alsaname Name of the ALSA audio device (default "udrc") + + ++Name: ugreen-dabboard ++Info: Configures the ugreen-dabboard I2S overlay ++ This is a simple overlay based on the simple-audio-card and the dmic ++ codec. It has the speciality that it is configured to use the codec ++ as a master I2S device. It works for example with the Si468x DAB ++ receiver on the uGreen DABBoard. ++Load: dtoverlay=ugreen-dabboard,= ++Params: card-name Override the default, "dabboard", card name. ++ ++ + Name: upstream + Info: Allow usage of downstream .dtb with upstream kernel. Comprises the + vc4-kms-v3d and dwc2 overlays. +diff --git a/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts +new file mode 100644 +index 000000000000..fc8d9b118068 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts +@@ -0,0 +1,49 @@ ++// Definitions for the ugreen dabboard I2S ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ dmic_codec: dmic-codec { ++ #sound-dai-cells = <0>; ++ compatible = "dmic-codec"; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ sound_overlay: __overlay__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "dabboard"; ++ simple-audio-card,bitclock-master = <&dailink0_slave>; ++ simple-audio-card,frame-master = <&dailink0_slave>; ++ simple-audio-card,widgets = "Microphone", "Microphone Jack"; ++ status = "okay"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ dailink0_slave: simple-audio-card,codec { ++ #sound-dai-cells = <0>; ++ sound-dai = <&dmic_codec>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ card-name = <&sound_overlay>,"simple-audio-card,name"; ++ }; ++}; +-- +2.18.4 + + +From a7335f2d83b250d8e41c8dd2b0f97fa8eb020353 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 23 Apr 2021 15:02:58 +0100 +Subject: [PATCH 660/661] ARM: dts: bcm2711-rpi-400: Limit MDIO clock speed + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-400.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2711-rpi-400.dts b/arch/arm/boot/dts/bcm2711-rpi-400.dts +index 1bb8854e69d6..4ffd5e04ccf1 100644 +--- a/arch/arm/boot/dts/bcm2711-rpi-400.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-400.dts +@@ -616,6 +616,10 @@ + brcm,disable-headphones = <1>; + }; + ++&genet_mdio { ++ clock-frequency = <1950000>; ++}; ++ + / { + __overrides__ { + act_led_gpio = <&act_led>,"gpios:4"; +-- +2.18.4 + + +From 108ea0d859cddc9cfda8794fd801ee4776e15324 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 30 Apr 2021 08:34:36 +0100 +Subject: [PATCH 661/661] spi: bcm2835: Increase the CS limit to 24 + +Increase the maximum number of CS lines to 24, and ensure this limit is +not exceeded. + +See: https://github.com/raspberrypi/linux/pull/4281 + +Suggested-by: Joe Burmeister +Signed-off-by: Phil Elwell +--- + drivers/spi/spi-bcm2835.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c +index aab6c7e5c114..ae74d86b2ee8 100644 +--- a/drivers/spi/spi-bcm2835.c ++++ b/drivers/spi/spi-bcm2835.c +@@ -28,6 +28,7 @@ + #include + #include /* FIXME: using chip internals */ + #include /* FIXME: using chip internals */ ++#include + #include + #include + +@@ -68,7 +69,7 @@ + #define BCM2835_SPI_FIFO_SIZE 64 + #define BCM2835_SPI_FIFO_SIZE_3_4 48 + #define BCM2835_SPI_DMA_MIN_LENGTH 96 +-#define BCM2835_SPI_NUM_CS 4 /* raise as necessary */ ++#define BCM2835_SPI_NUM_CS 24 /* more than enough */ + #define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \ + | SPI_NO_CS | SPI_3WIRE) + +@@ -1292,6 +1293,11 @@ static int bcm2835_spi_probe(struct platform_device *pdev) + struct bcm2835_spi *bs; + int err; + ++ if (of_gpio_named_count(pdev->dev.of_node, "cs-gpios") > ++ BCM2835_SPI_NUM_CS) ++ return dev_err_probe(&pdev->dev, -EINVAL, ++ "too many chip selects\n"); ++ + ctlr = devm_spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs), + dma_get_cache_alignment())); + if (!ctlr) +-- +2.18.4 + diff --git a/SPECS/raspberrypi2.spec b/SPECS/raspberrypi2.spec index 470d84d..b549b52 100644 --- a/SPECS/raspberrypi2.spec +++ b/SPECS/raspberrypi2.spec @@ -1,5 +1,5 @@ -%global commit_firmware_long 8c7c52466505df5d420a5cb9131ec29205bcecf8 -%global commit_linux_long b460129fcbebe39b8ce1a3dfc18129998d12c40b +%global commit_firmware_long 1a46874494146f470d7a61b0b6f4f15a07dd8b35 +%global commit_linux_long 96110e96f1a82e236afb9a248258f1ef917766e9 ExclusiveArch: aarch64 armv7hl @@ -32,7 +32,7 @@ ExclusiveArch: aarch64 armv7hl %define extra_version 1 %define kversion 5.10 -%define kfullversion %{kversion}.29 +%define kfullversion %{kversion}.33 Name: raspberrypi2 Version: %{kfullversion} @@ -277,6 +277,9 @@ cp $(ls -1d /usr/share/%{name}-kernel/*-*/|sort -V|tail -1)/boot/overlays/README %doc /boot/LICENCE.broadcom %changelog +* Sat May 1 2021 Pablo Greco - 5.10.33 +- Update to version v5.10.33 + * Sun Apr 11 2021 Pablo Greco - 5.10.29 - Update to version v5.10.29