Blame 0431-qxl-add-optinal-64bit-vram-bar.patch

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From f1e729a041efbd2d562e8202407e927745210bbd Mon Sep 17 00:00:00 2001
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Fri, 14 Oct 2011 18:05:48 +0200
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Subject: [PATCH 431/434] qxl: add optinal 64bit vram bar
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This patch adds an 64bit pci bar for vram.  It is turned off by default.
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It can be enabled by setting the size of the 64bit bar to be larger than
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the 32bit bar.  Both 32bit and 64bit bar refer to the same memory.  Only
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the first part of the memory is available via 32bit bar.
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The intention is to allow large vram sizes for 64bit guests, by allowing
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the vram bar being mapped above 4G, so we don't have to squeeze it into
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the pci I/O window below 4G.
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With vram_size_mb=16 and vram64_size_mb=256 it looks like this:
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00:02.0 VGA compatible controller: Red Hat, Inc. Device 0100 (rev 02) (prog-if 00 [VGA controller])
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        Subsystem: Red Hat, Inc Device 1100
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        Physical Slot: 2
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        Flags: fast devsel, IRQ 10
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        Memory at f8000000 (32-bit, non-prefetchable) [size=64M]
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        Memory at fc000000 (32-bit, non-prefetchable) [size=16M]
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        Memory at fd020000 (32-bit, non-prefetchable) [size=8K]
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        I/O ports at c5a0 [size=32]
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        Memory at ffe0000000 (64-bit, prefetchable) [size=256M]
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        Expansion ROM at fd000000 [disabled] [size=64K]
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[ mapping above 4G needs patched seabios:
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  http://www.kraxel.org/cgit/seabios/commit/?h=pci64 ]
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Conflicts:
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	hw/qxl.c
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---
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 hw/qxl.c |   51 ++++++++++++++++++++++++++++++++++++++++++++-------
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 hw/qxl.h |    7 +++++++
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 2 files changed, 51 insertions(+), 7 deletions(-)
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diff --git a/hw/qxl.c b/hw/qxl.c
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index bcdf274..18f3759 100644
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--- a/hw/qxl.c
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+++ b/hw/qxl.c
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@@ -1002,6 +1002,7 @@ static void qxl_add_memslot(PCIQXLDevice *d, uint32_t slot_id, uint64_t delta,
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     static const int regions[] = {
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         QXL_RAM_RANGE_INDEX,
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         QXL_VRAM_RANGE_INDEX,
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+        QXL_VRAM64_RANGE_INDEX,
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     };
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     uint64_t guest_start;
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     uint64_t guest_end;
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@@ -1046,6 +1047,7 @@ static void qxl_add_memslot(PCIQXLDevice *d, uint32_t slot_id, uint64_t delta,
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         virt_start = (intptr_t)memory_region_get_ram_ptr(&d->vga.vram);
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         break;
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     case QXL_VRAM_RANGE_INDEX:
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+    case 4 /* vram 64bit */:
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         virt_start = (intptr_t)memory_region_get_ram_ptr(&d->vram_bar);
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         break;
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     default:
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@@ -1630,18 +1632,28 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl, uint32_t ram_min_mb)
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         qxl->vga.vram_size = ram_min_mb * 1024 * 1024;
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     }
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-    /* vram (surfaces, bar 1) */
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+    /* vram32 (surfaces, 32bit, bar 1) */
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+    if (qxl->vram32_size_mb != -1) {
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+        qxl->vram32_size = qxl->vram32_size_mb * 1024 * 1024;
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+    }
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+    if (qxl->vram32_size < 4096) {
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+        qxl->vram32_size = 4096;
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+    }
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+
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+    /* vram (surfaces, 64bit, bar 4+5) */
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     if (qxl->vram_size_mb != -1) {
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         qxl->vram_size = qxl->vram_size_mb * 1024 * 1024;
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     }
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-    if (qxl->vram_size < 4096) {
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-        qxl->vram_size = 4096;
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+    if (qxl->vram_size < qxl->vram32_size) {
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+        qxl->vram_size = qxl->vram32_size;
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     }
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+
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     if (qxl->revision == 1) {
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+        qxl->vram32_size = 4096;
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         qxl->vram_size = 4096;
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     }
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-
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     qxl->vga.vram_size = msb_mask(qxl->vga.vram_size * 2 - 1);
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+    qxl->vram32_size = msb_mask(qxl->vram32_size * 2 - 1);
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     qxl->vram_size = msb_mask(qxl->vram_size * 2 - 1);
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 }
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@@ -1683,6 +1695,8 @@ static int qxl_init_common(PCIQXLDevice *qxl)
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     memory_region_init_ram(&qxl->vram_bar, &qxl->pci.qdev, "qxl.vram",
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                            qxl->vram_size);
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+    memory_region_init_alias(&qxl->vram32_bar, "qxl.vram32", &qxl->vram_bar,
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+                             0, qxl->vram32_size);
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     io_size = msb_mask(QXL_IO_RANGE_SIZE * 2 - 1);
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     if (qxl->revision == 1) {
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@@ -1706,7 +1720,29 @@ static int qxl_init_common(PCIQXLDevice *qxl)
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                      PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vga.vram);
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     pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX,
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-                     PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram_bar);
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+                     PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar);
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+
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+    if (qxl->vram32_size < qxl->vram_size) {
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+        /*
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+         * Make the 64bit vram bar show up only in case it is
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+         * configured to be larger than the 32bit vram bar.
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+         */
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+        pci_register_bar(&qxl->pci, QXL_VRAM64_RANGE_INDEX,
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+                         PCI_BASE_ADDRESS_SPACE_MEMORY |
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+                         PCI_BASE_ADDRESS_MEM_TYPE_64 |
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+                         PCI_BASE_ADDRESS_MEM_PREFETCH,
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+                         &qxl->vram_bar);
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+    }
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+
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+    /* print pci bar details */
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+    dprint(qxl, 1, "ram/%s: %d MB [region 0]\n",
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+           qxl->id == 0 ? "pri" : "sec",
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+           qxl->vga.vram_size / (1024*1024));
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+    dprint(qxl, 1, "vram/32: %d MB [region 1]\n",
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+           qxl->vram32_size / (1024*1024));
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+    dprint(qxl, 1, "vram/64: %d MB %s\n",
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+           qxl->vram_size / (1024*1024),
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+           qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
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     qxl->ssd.qxl.base.sif = &qxl_interface.base;
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     qxl->ssd.qxl.id = qxl->id;
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@@ -1918,7 +1954,7 @@ static VMStateDescription qxl_vmstate = {
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 static Property qxl_properties[] = {
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         DEFINE_PROP_UINT32("ram_size", PCIQXLDevice, vga.vram_size,
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                            64 * 1024 * 1024),
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-        DEFINE_PROP_UINT32("vram_size", PCIQXLDevice, vram_size,
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+        DEFINE_PROP_UINT32("vram_size", PCIQXLDevice, vram32_size,
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                            64 * 1024 * 1024),
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         DEFINE_PROP_UINT32("revision", PCIQXLDevice, revision,
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                            QXL_DEFAULT_REVISION),
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@@ -1926,7 +1962,8 @@ static Property qxl_properties[] = {
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         DEFINE_PROP_UINT32("guestdebug", PCIQXLDevice, guestdebug, 0),
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         DEFINE_PROP_UINT32("cmdlog", PCIQXLDevice, cmdlog, 0),
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         DEFINE_PROP_UINT32("ram_size_mb",  PCIQXLDevice, ram_size_mb, -1),
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-        DEFINE_PROP_UINT32("vram_size_mb", PCIQXLDevice, vram_size_mb, -1),
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+        DEFINE_PROP_UINT32("vram_size_mb", PCIQXLDevice, vram32_size_mb, 0),
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+        DEFINE_PROP_UINT32("vram64_size_mb", PCIQXLDevice, vram_size_mb, 0),
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         DEFINE_PROP_END_OF_LIST(),
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 };
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diff --git a/hw/qxl.h b/hw/qxl.h
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index 86e415b..11a0db3 100644
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--- a/hw/qxl.h
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+++ b/hw/qxl.h
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@@ -16,6 +16,10 @@ enum qxl_mode {
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     QXL_MODE_NATIVE,
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 };
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+#ifndef QXL_VRAM64_RANGE_INDEX
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+#define QXL_VRAM64_RANGE_INDEX 4
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+#endif
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+
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 #define QXL_UNDEFINED_IO UINT32_MAX
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 #define QXL_NUM_DIRTY_RECTS 64
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@@ -88,6 +92,8 @@ typedef struct PCIQXLDevice {
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     /* vram pci bar */
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     uint32_t           vram_size;
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     MemoryRegion       vram_bar;
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+    uint32_t           vram32_size;
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+    MemoryRegion       vram32_bar;
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     /* io bar */
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     MemoryRegion       io_bar;
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@@ -95,6 +101,7 @@ typedef struct PCIQXLDevice {
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     /* user-friendly properties (in megabytes) */
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     uint32_t          ram_size_mb;
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     uint32_t          vram_size_mb;
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+    uint32_t          vram32_size_mb;
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     /* qxl_render_update state */
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     int                render_update_cookie_num;
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-- 
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1.7.10
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