Blame 0201-spapr-Don-t-trigger-a-CAS-reboot-for-XICS-XIVE-mode-.patch

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From: David Gibson <david@gibson.dropbear.id.au>
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Date: Fri, 18 Oct 2019 15:19:31 +1100
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Subject: [PATCH] spapr: Don't trigger a CAS reboot for XICS/XIVE mode
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 changeover
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PAPR allows the interrupt controller used on a POWER9 machine (XICS or
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XIVE) to be selected by the guest operating system, by using the
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ibm,client-architecture-support (CAS) feature negotiation call.
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Currently, if the guest selects an interrupt controller different from the
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one selected at initial boot, this causes the system to be reset with the
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new model and the boot starts again.  This means we run through the SLOF
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boot process twice, as well as any other bootloader (e.g. grub) in use
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before the OS calls CAS.  This can be confusing and/or inconvenient for
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users.
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Thanks to two fairly recent changes, we no longer need this reboot.  1) we
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now completely regenerate the device tree when CAS is called (meaning we
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don't need special case updates for all the device tree changes caused by
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the interrupt controller mode change),  2) we now have explicit code paths
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to activate and deactivate the different interrupt controllers, rather than
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just implicitly calling those at machine reset time.
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We can therefore eliminate the reboot for changing irq mode, simply by
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putting a call to spapr_irq_update_active_intc() before we call
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spapr_h_cas_compose_response() (which gives the updated device tree to
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the guest firmware and OS).
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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Reviewed-by: Cedric Le Goater <clg@fr.ibm.com>
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Reviewed-by: Greg Kurz <groug@kaod.org>
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(cherry picked from commit 8deb8019d696c75e6ecaee7545026b62aba2f1bb)
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---
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 hw/ppc/spapr_hcall.c | 33 +++++++++++++--------------------
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 1 file changed, 13 insertions(+), 20 deletions(-)
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diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
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index 140f05c1c6..05a7ca275b 100644
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--- a/hw/ppc/spapr_hcall.c
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+++ b/hw/ppc/spapr_hcall.c
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@@ -1767,21 +1767,10 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
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     }
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     spapr->cas_pre_isa3_guest = !spapr_ovec_test(ov1_guest, OV1_PPC_3_00);
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     spapr_ovec_cleanup(ov1_guest);
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-    if (!spapr->cas_reboot) {
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-        /* If spapr_machine_reset() did not set up a HPT but one is necessary
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-         * (because the guest isn't going to use radix) then set it up here. */
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-        if ((spapr->patb_entry & PATE1_GR) && !guest_radix) {
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-            /* legacy hash or new hash: */
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-            spapr_setup_hpt_and_vrma(spapr);
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-        }
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-        spapr->cas_reboot =
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-            (spapr_h_cas_compose_response(spapr, args[1], args[2],
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-                                          ov5_updates) != 0);
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-    }
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     /*
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-     * Ensure the guest asks for an interrupt mode we support; otherwise
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-     * terminate the boot.
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+     * Ensure the guest asks for an interrupt mode we support;
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+     * otherwise terminate the boot.
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      */
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     if (guest_xive) {
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         if (!spapr->irq->xive) {
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@@ -1797,14 +1786,18 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
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         }
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     }
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-    /*
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-     * Generate a machine reset when we have an update of the
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-     * interrupt mode. Only required when the machine supports both
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-     * modes.
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-     */
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+    spapr_irq_update_active_intc(spapr);
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+
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     if (!spapr->cas_reboot) {
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-        spapr->cas_reboot = spapr_ovec_test(ov5_updates, OV5_XIVE_EXPLOIT)
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-            && spapr->irq->xics && spapr->irq->xive;
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+        /* If spapr_machine_reset() did not set up a HPT but one is necessary
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+         * (because the guest isn't going to use radix) then set it up here. */
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+        if ((spapr->patb_entry & PATE1_GR) && !guest_radix) {
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+            /* legacy hash or new hash: */
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+            spapr_setup_hpt_and_vrma(spapr);
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+        }
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+        spapr->cas_reboot =
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+            (spapr_h_cas_compose_response(spapr, args[1], args[2],
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+                                          ov5_updates) != 0);
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     }
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     spapr_ovec_cleanup(ov5_updates);