Blame 0018-target-ppc-gdbstub-Add-VSX-support.patch

7d975d
From: Anton Blanchard <anton@samba.org>
7d975d
Date: Fri, 15 Jan 2016 16:00:51 +0100
7d975d
Subject: [PATCH] target-ppc: gdbstub: Add VSX support
7d975d
7d975d
Add the XML and functions to get and set VSX registers.
7d975d
7d975d
Signed-off-by: Anton Blanchard <anton@samba.org>
7d975d
(fixed little-endian guests)
7d975d
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
7d975d
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7d975d
7d975d
(cherry picked from commit 1438eff302cbc6c85d477fd7181b8a9aeea2efd7)
7d975d
---
7d975d
 configure                   |  6 +++---
7d975d
 gdb-xml/power-vsx.xml       | 44 ++++++++++++++++++++++++++++++++++++++++++++
7d975d
 target-ppc/translate_init.c | 24 ++++++++++++++++++++++++
7d975d
 3 files changed, 71 insertions(+), 3 deletions(-)
7d975d
 create mode 100644 gdb-xml/power-vsx.xml
7d975d
7d975d
diff --git a/configure b/configure
7d975d
index b9552fd..7811180 100755
7d975d
--- a/configure
7d975d
+++ b/configure
7d975d
@@ -5617,20 +5617,20 @@ case "$target_name" in
7d975d
   ppc64)
7d975d
     TARGET_BASE_ARCH=ppc
7d975d
     TARGET_ABI_DIR=ppc
7d975d
-    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
7d975d
+    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
7d975d
   ;;
7d975d
   ppc64le)
7d975d
     TARGET_ARCH=ppc64
7d975d
     TARGET_BASE_ARCH=ppc
7d975d
     TARGET_ABI_DIR=ppc
7d975d
-    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
7d975d
+    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
7d975d
   ;;
7d975d
   ppc64abi32)
7d975d
     TARGET_ARCH=ppc64
7d975d
     TARGET_BASE_ARCH=ppc
7d975d
     TARGET_ABI_DIR=ppc
7d975d
     echo "TARGET_ABI32=y" >> $config_target_mak
7d975d
-    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
7d975d
+    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
7d975d
   ;;
7d975d
   sh4|sh4eb)
7d975d
     TARGET_ARCH=sh4
7d975d
diff --git a/gdb-xml/power-vsx.xml b/gdb-xml/power-vsx.xml
7d975d
new file mode 100644
7d975d
index 0000000..fd290e9
7d975d
--- /dev/null
7d975d
+++ b/gdb-xml/power-vsx.xml
7d975d
@@ -0,0 +1,44 @@
7d975d
+
7d975d
+
7d975d
+
7d975d
+     Copying and distribution of this file, with or without modification,
7d975d
+     are permitted in any medium without royalty provided the copyright
7d975d
+     notice and this notice are preserved.  -->
7d975d
+
7d975d
+
7d975d
+     registers.  -->
7d975d
+
7d975d
+<feature name="org.gnu.gdb.power.vsx">
7d975d
+  <reg name="vs0h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs1h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs2h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs3h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs4h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs5h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs6h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs7h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs8h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs9h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs10h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs11h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs12h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs13h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs14h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs15h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs16h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs17h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs18h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs19h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs20h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs21h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs22h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs23h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs24h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs25h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs26h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs27h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs28h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs29h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs30h" bitsize="64" type="uint64"/>
7d975d
+  <reg name="vs31h" bitsize="64" type="uint64"/>
7d975d
+</feature>
7d975d
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
7d975d
index 5ea168c..8069f3c 100644
7d975d
--- a/target-ppc/translate_init.c
7d975d
+++ b/target-ppc/translate_init.c
7d975d
@@ -8897,6 +8897,26 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
7d975d
     return 0;
7d975d
 }
7d975d
 
7d975d
+static int gdb_get_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
7d975d
+{
7d975d
+    if (n < 32) {
7d975d
+        stq_p(mem_buf, env->vsr[n]);
7d975d
+        ppc_maybe_bswap_register(env, mem_buf, 8);
7d975d
+        return 8;
7d975d
+    }
7d975d
+    return 0;
7d975d
+}
7d975d
+
7d975d
+static int gdb_set_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
7d975d
+{
7d975d
+    if (n < 32) {
7d975d
+        ppc_maybe_bswap_register(env, mem_buf, 8);
7d975d
+        env->vsr[n] = ldq_p(mem_buf);
7d975d
+        return 8;
7d975d
+    }
7d975d
+    return 0;
7d975d
+}
7d975d
+
7d975d
 static int ppc_fixup_cpu(PowerPCCPU *cpu)
7d975d
 {
7d975d
     CPUPPCState *env = &cpu->env;
7d975d
@@ -9002,6 +9022,10 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
7d975d
         gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg,
7d975d
                                  34, "power-spe.xml", 0);
7d975d
     }
7d975d
+    if (pcc->insns_flags2 & PPC2_VSX) {
7d975d
+        gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg,
7d975d
+                                 32, "power-vsx.xml", 0);
7d975d
+    }
7d975d
 
7d975d
     qemu_init_vcpu(cs);
7d975d