Blame 0007-target-s390x-split-condition-code-helpers.patch

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From f642126aece222f6ff87d26c29f00e1b6c47e10a Mon Sep 17 00:00:00 2001
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From: Blue Swirl <blauwirbel@gmail.com>
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Date: Sun, 2 Sep 2012 07:33:32 +0000
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Subject: [PATCH] target-s390x: split condition code helpers
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Move condition code helpers to cc_helper.c.
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Alexander Graf <agraf@suse.de>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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 target-s390x/Makefile.objs |   3 +-
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 target-s390x/cc_helper.c   | 551 +++++++++++++++++++++++++++++++++++++++++++++
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 target-s390x/cpu.h         |   3 +
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 target-s390x/op_helper.c   | 522 +-----------------------------------------
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 4 files changed, 557 insertions(+), 522 deletions(-)
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 create mode 100644 target-s390x/cc_helper.c
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diff --git a/target-s390x/Makefile.objs b/target-s390x/Makefile.objs
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index 23b3bd9..f9437d6 100644
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--- a/target-s390x/Makefile.objs
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+++ b/target-s390x/Makefile.objs
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@@ -1,7 +1,8 @@
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 obj-y += translate.o op_helper.o helper.o cpu.o interrupt.o
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-obj-y += fpu_helper.o
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+obj-y += fpu_helper.o cc_helper.o
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 obj-$(CONFIG_SOFTMMU) += machine.o
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 obj-$(CONFIG_KVM) += kvm.o
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 $(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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 $(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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+$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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diff --git a/target-s390x/cc_helper.c b/target-s390x/cc_helper.c
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new file mode 100644
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index 0000000..2ac1659
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--- /dev/null
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+++ b/target-s390x/cc_helper.c
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@@ -0,0 +1,551 @@
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+/*
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+ *  S/390 condition code helper routines
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+ *
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+ *  Copyright (c) 2009 Ulrich Hecht
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+ *  Copyright (c) 2009 Alexander Graf
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+ *
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+ * This library is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU Lesser General Public
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+ * License as published by the Free Software Foundation; either
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+ * version 2 of the License, or (at your option) any later version.
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+ *
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+ * This library is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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+ * Lesser General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU Lesser General Public
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+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include "cpu.h"
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+#include "dyngen-exec.h"
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+#include "helper.h"
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+
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+/* #define DEBUG_HELPER */
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+#ifdef DEBUG_HELPER
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+#define HELPER_LOG(x...) qemu_log(x)
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+#else
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+#define HELPER_LOG(x...)
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+#endif
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+
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+static inline uint32_t cc_calc_ltgt_32(CPUS390XState *env, int32_t src,
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+                                       int32_t dst)
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+{
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+    if (src == dst) {
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+        return 0;
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+    } else if (src < dst) {
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+        return 1;
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+    } else {
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+        return 2;
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+    }
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+}
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+
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+static inline uint32_t cc_calc_ltgt0_32(CPUS390XState *env, int32_t dst)
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+{
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+    return cc_calc_ltgt_32(env, dst, 0);
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+}
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+
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+static inline uint32_t cc_calc_ltgt_64(CPUS390XState *env, int64_t src,
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+                                       int64_t dst)
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+{
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+    if (src == dst) {
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+        return 0;
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+    } else if (src < dst) {
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+        return 1;
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+    } else {
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+        return 2;
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+    }
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+}
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+
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+static inline uint32_t cc_calc_ltgt0_64(CPUS390XState *env, int64_t dst)
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+{
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+    return cc_calc_ltgt_64(env, dst, 0);
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+}
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+
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+static inline uint32_t cc_calc_ltugtu_32(CPUS390XState *env, uint32_t src,
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+                                         uint32_t dst)
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+{
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+    if (src == dst) {
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+        return 0;
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+    } else if (src < dst) {
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+        return 1;
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+    } else {
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+        return 2;
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+    }
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+}
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+
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+static inline uint32_t cc_calc_ltugtu_64(CPUS390XState *env, uint64_t src,
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+                                         uint64_t dst)
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+{
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+    if (src == dst) {
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+        return 0;
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+    } else if (src < dst) {
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+        return 1;
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+    } else {
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+        return 2;
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+    }
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+}
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+
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+static inline uint32_t cc_calc_tm_32(CPUS390XState *env, uint32_t val,
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+                                     uint32_t mask)
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+{
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+    uint16_t r = val & mask;
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+
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+    HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__, val, mask);
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+    if (r == 0 || mask == 0) {
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+        return 0;
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+    } else if (r == mask) {
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+        return 3;
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+    } else {
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+        return 1;
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+    }
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+}
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+
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+/* set condition code for test under mask */
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+static inline uint32_t cc_calc_tm_64(CPUS390XState *env, uint64_t val,
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+                                     uint32_t mask)
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+{
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+    uint16_t r = val & mask;
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+
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+    HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__, val, mask, r);
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+    if (r == 0 || mask == 0) {
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+        return 0;
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+    } else if (r == mask) {
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+        return 3;
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+    } else {
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+        while (!(mask & 0x8000)) {
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+            mask <<= 1;
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+            val <<= 1;
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+        }
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+        if (val & 0x8000) {
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+            return 2;
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+        } else {
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+            return 1;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_nz(CPUS390XState *env, uint64_t dst)
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+{
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+    return !!dst;
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+}
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+
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+static inline uint32_t cc_calc_add_64(CPUS390XState *env, int64_t a1,
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+                                      int64_t a2, int64_t ar)
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+{
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+    if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
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+        return 3; /* overflow */
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+    } else {
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+        if (ar < 0) {
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+            return 1;
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+        } else if (ar > 0) {
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+            return 2;
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+        } else {
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+            return 0;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_addu_64(CPUS390XState *env, uint64_t a1,
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+                                       uint64_t a2, uint64_t ar)
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+{
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+    if (ar == 0) {
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+        if (a1) {
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+            return 2;
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+        } else {
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+            return 0;
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+        }
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+    } else {
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+        if (ar < a1 || ar < a2) {
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+            return 3;
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+        } else {
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+            return 1;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_sub_64(CPUS390XState *env, int64_t a1,
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+                                      int64_t a2, int64_t ar)
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+{
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+    if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
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+        return 3; /* overflow */
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+    } else {
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+        if (ar < 0) {
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+            return 1;
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+        } else if (ar > 0) {
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+            return 2;
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+        } else {
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+            return 0;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_subu_64(CPUS390XState *env, uint64_t a1,
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+                                       uint64_t a2, uint64_t ar)
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+{
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+    if (ar == 0) {
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+        return 2;
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+    } else {
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+        if (a2 > a1) {
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+            return 1;
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+        } else {
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+            return 3;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_abs_64(CPUS390XState *env, int64_t dst)
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+{
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+    if ((uint64_t)dst == 0x8000000000000000ULL) {
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+        return 3;
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+    } else if (dst) {
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+        return 1;
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+    } else {
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+        return 0;
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+    }
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+}
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+
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+static inline uint32_t cc_calc_nabs_64(CPUS390XState *env, int64_t dst)
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+{
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+    return !!dst;
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+}
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+
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+static inline uint32_t cc_calc_comp_64(CPUS390XState *env, int64_t dst)
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+{
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+    if ((uint64_t)dst == 0x8000000000000000ULL) {
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+        return 3;
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+    } else if (dst < 0) {
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+        return 1;
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+    } else if (dst > 0) {
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+        return 2;
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+    } else {
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+        return 0;
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+    }
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+}
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+
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+
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+static inline uint32_t cc_calc_add_32(CPUS390XState *env, int32_t a1,
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+                                      int32_t a2, int32_t ar)
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+{
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+    if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
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+        return 3; /* overflow */
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+    } else {
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+        if (ar < 0) {
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+            return 1;
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+        } else if (ar > 0) {
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+            return 2;
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+        } else {
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+            return 0;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_addu_32(CPUS390XState *env, uint32_t a1,
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+                                       uint32_t a2, uint32_t ar)
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+{
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+    if (ar == 0) {
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+        if (a1) {
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+            return 2;
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+        } else {
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+            return 0;
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+        }
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+    } else {
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+        if (ar < a1 || ar < a2) {
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+            return 3;
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+        } else {
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+            return 1;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_sub_32(CPUS390XState *env, int32_t a1,
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+                                      int32_t a2, int32_t ar)
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+{
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+    if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
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+        return 3; /* overflow */
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+    } else {
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+        if (ar < 0) {
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+            return 1;
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+        } else if (ar > 0) {
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+            return 2;
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+        } else {
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+            return 0;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_subu_32(CPUS390XState *env, uint32_t a1,
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+                                       uint32_t a2, uint32_t ar)
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+{
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+    if (ar == 0) {
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+        return 2;
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+    } else {
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+        if (a2 > a1) {
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+            return 1;
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+        } else {
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+            return 3;
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+        }
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+    }
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+}
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+
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+static inline uint32_t cc_calc_abs_32(CPUS390XState *env, int32_t dst)
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+{
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+    if ((uint32_t)dst == 0x80000000UL) {
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+        return 3;
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+    } else if (dst) {
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+        return 1;
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+    } else {
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+        return 0;
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+    }
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+}
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+
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+static inline uint32_t cc_calc_nabs_32(CPUS390XState *env, int32_t dst)
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+{
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+    return !!dst;
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+}
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+
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+static inline uint32_t cc_calc_comp_32(CPUS390XState *env, int32_t dst)
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+{
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+    if ((uint32_t)dst == 0x80000000UL) {
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+        return 3;
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+    } else if (dst < 0) {
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+        return 1;
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+    } else if (dst > 0) {
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+        return 2;
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+    } else {
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+        return 0;
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+    }
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+}
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+
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+/* calculate condition code for insert character under mask insn */
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+static inline uint32_t cc_calc_icm_32(CPUS390XState *env, uint32_t mask,
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+                                      uint32_t val)
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+{
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+    uint32_t cc;
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+
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+    HELPER_LOG("%s: mask 0x%x val %d\n", __func__, mask, val);
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+    if (mask == 0xf) {
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+        if (!val) {
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+            return 0;
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+        } else if (val & 0x80000000) {
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+            return 1;
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+        } else {
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+            return 2;
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+        }
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+    }
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+
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+    if (!val || !mask) {
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+        cc = 0;
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+    } else {
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+        while (mask != 1) {
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+            mask >>= 1;
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+            val >>= 8;
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+        }
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+        if (val & 0x80) {
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+            cc = 1;
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+        } else {
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+            cc = 2;
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+        }
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+    }
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+    return cc;
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+}
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+
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+static inline uint32_t cc_calc_slag(CPUS390XState *env, uint64_t src,
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+                                    uint64_t shift)
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+{
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+    uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
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+    uint64_t match, r;
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+
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+    /* check if the sign bit stays the same */
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+    if (src & (1ULL << 63)) {
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+        match = mask;
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+    } else {
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+        match = 0;
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+    }
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+
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+    if ((src & mask) != match) {
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+        /* overflow */
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+        return 3;
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+    }
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+
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+    r = ((src << shift) & ((1ULL << 63) - 1)) | (src & (1ULL << 63));
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+
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+    if ((int64_t)r == 0) {
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+        return 0;
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+    } else if ((int64_t)r < 0) {
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+        return 1;
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+    }
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+
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+    return 2;
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+}
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+
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+
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+static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
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+                                  uint64_t src, uint64_t dst, uint64_t vr)
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+{
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+    uint32_t r = 0;
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+
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+    switch (cc_op) {
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+    case CC_OP_CONST0:
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+    case CC_OP_CONST1:
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+    case CC_OP_CONST2:
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+    case CC_OP_CONST3:
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+        /* cc_op value _is_ cc */
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+        r = cc_op;
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+        break;
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+    case CC_OP_LTGT0_32:
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+        r = cc_calc_ltgt0_32(env, dst);
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+        break;
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+    case CC_OP_LTGT0_64:
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+        r =  cc_calc_ltgt0_64(env, dst);
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+        break;
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+    case CC_OP_LTGT_32:
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+        r =  cc_calc_ltgt_32(env, src, dst);
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+        break;
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+    case CC_OP_LTGT_64:
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+        r =  cc_calc_ltgt_64(env, src, dst);
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+        break;
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+    case CC_OP_LTUGTU_32:
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+        r =  cc_calc_ltugtu_32(env, src, dst);
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+        break;
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+    case CC_OP_LTUGTU_64:
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+        r =  cc_calc_ltugtu_64(env, src, dst);
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+        break;
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+    case CC_OP_TM_32:
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+        r =  cc_calc_tm_32(env, src, dst);
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+        break;
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+    case CC_OP_TM_64:
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+        r =  cc_calc_tm_64(env, src, dst);
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+        break;
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+    case CC_OP_NZ:
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+        r =  cc_calc_nz(env, dst);
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+        break;
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+    case CC_OP_ADD_64:
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+        r =  cc_calc_add_64(env, src, dst, vr);
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+        break;
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+    case CC_OP_ADDU_64:
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+        r =  cc_calc_addu_64(env, src, dst, vr);
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+        break;
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+    case CC_OP_SUB_64:
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+        r =  cc_calc_sub_64(env, src, dst, vr);
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+        break;
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+    case CC_OP_SUBU_64:
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+        r =  cc_calc_subu_64(env, src, dst, vr);
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+        break;
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+    case CC_OP_ABS_64:
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+        r =  cc_calc_abs_64(env, dst);
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+        break;
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+    case CC_OP_NABS_64:
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+        r =  cc_calc_nabs_64(env, dst);
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+        break;
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+    case CC_OP_COMP_64:
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+        r =  cc_calc_comp_64(env, dst);
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+        break;
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+
5544c1
+    case CC_OP_ADD_32:
5544c1
+        r =  cc_calc_add_32(env, src, dst, vr);
5544c1
+        break;
5544c1
+    case CC_OP_ADDU_32:
5544c1
+        r =  cc_calc_addu_32(env, src, dst, vr);
5544c1
+        break;
5544c1
+    case CC_OP_SUB_32:
5544c1
+        r =  cc_calc_sub_32(env, src, dst, vr);
5544c1
+        break;
5544c1
+    case CC_OP_SUBU_32:
5544c1
+        r =  cc_calc_subu_32(env, src, dst, vr);
5544c1
+        break;
5544c1
+    case CC_OP_ABS_32:
5544c1
+        r =  cc_calc_abs_64(env, dst);
5544c1
+        break;
5544c1
+    case CC_OP_NABS_32:
5544c1
+        r =  cc_calc_nabs_64(env, dst);
5544c1
+        break;
5544c1
+    case CC_OP_COMP_32:
5544c1
+        r =  cc_calc_comp_32(env, dst);
5544c1
+        break;
5544c1
+
5544c1
+    case CC_OP_ICM:
5544c1
+        r =  cc_calc_icm_32(env, src, dst);
5544c1
+        break;
5544c1
+    case CC_OP_SLAG:
5544c1
+        r =  cc_calc_slag(env, src, dst);
5544c1
+        break;
5544c1
+
5544c1
+    case CC_OP_LTGT_F32:
5544c1
+        r = set_cc_f32(src, dst);
5544c1
+        break;
5544c1
+    case CC_OP_LTGT_F64:
5544c1
+        r = set_cc_f64(src, dst);
5544c1
+        break;
5544c1
+    case CC_OP_NZ_F32:
5544c1
+        r = set_cc_nz_f32(dst);
5544c1
+        break;
5544c1
+    case CC_OP_NZ_F64:
5544c1
+        r = set_cc_nz_f64(dst);
5544c1
+        break;
5544c1
+
5544c1
+    default:
5544c1
+        cpu_abort(env, "Unknown CC operation: %s\n", cc_name(cc_op));
5544c1
+    }
5544c1
+
5544c1
+    HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
5544c1
+               cc_name(cc_op), src, dst, vr, r);
5544c1
+    return r;
5544c1
+}
5544c1
+
5544c1
+uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
5544c1
+                 uint64_t vr)
5544c1
+{
5544c1
+    return do_calc_cc(env, cc_op, src, dst, vr);
5544c1
+}
5544c1
+
5544c1
+uint32_t HELPER(calc_cc)(uint32_t cc_op, uint64_t src, uint64_t dst,
5544c1
+                         uint64_t vr)
5544c1
+{
5544c1
+    return do_calc_cc(env, cc_op, src, dst, vr);
5544c1
+}
5544c1
+
5544c1
+/* insert psw mask and condition code into r1 */
5544c1
+void HELPER(ipm)(uint32_t cc, uint32_t r1)
5544c1
+{
5544c1
+    uint64_t r = env->regs[r1];
5544c1
+
5544c1
+    r &= 0xffffffff00ffffffULL;
5544c1
+    r |= (cc << 28) | ((env->psw.mask >> 40) & 0xf);
5544c1
+    env->regs[r1] = r;
5544c1
+    HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__,
5544c1
+               cc, env->psw.mask, r);
5544c1
+}
5544c1
+
5544c1
+#ifndef CONFIG_USER_ONLY
5544c1
+void HELPER(load_psw)(uint64_t mask, uint64_t addr)
5544c1
+{
5544c1
+    load_psw(env, mask, addr);
5544c1
+    cpu_loop_exit(env);
5544c1
+}
5544c1
+
5544c1
+void HELPER(sacf)(uint64_t a1)
5544c1
+{
5544c1
+    HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1);
5544c1
+
5544c1
+    switch (a1 & 0xf00) {
5544c1
+    case 0x000:
5544c1
+        env->psw.mask &= ~PSW_MASK_ASC;
5544c1
+        env->psw.mask |= PSW_ASC_PRIMARY;
5544c1
+        break;
5544c1
+    case 0x100:
5544c1
+        env->psw.mask &= ~PSW_MASK_ASC;
5544c1
+        env->psw.mask |= PSW_ASC_SECONDARY;
5544c1
+        break;
5544c1
+    case 0x300:
5544c1
+        env->psw.mask &= ~PSW_MASK_ASC;
5544c1
+        env->psw.mask |= PSW_ASC_HOME;
5544c1
+        break;
5544c1
+    default:
5544c1
+        qemu_log("unknown sacf mode: %" PRIx64 "\n", a1);
5544c1
+        program_interrupt(env, PGM_SPECIFICATION, 2);
5544c1
+        break;
5544c1
+    }
5544c1
+}
5544c1
+#endif
5544c1
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
5544c1
index b4620c5..97fde5e 100644
5544c1
--- a/target-s390x/cpu.h
5544c1
+++ b/target-s390x/cpu.h
5544c1
@@ -1005,4 +1005,7 @@ uint32_t set_cc_f64(float64 v1, float64 v2);
5544c1
 uint32_t set_cc_nz_f32(float32 v);
5544c1
 uint32_t set_cc_nz_f64(float64 v);
5544c1
 
5544c1
+/* op_helper.c */
5544c1
+void program_interrupt(CPUS390XState *env, uint32_t code, int ilc);
5544c1
+
5544c1
 #endif
5544c1
diff --git a/target-s390x/op_helper.c b/target-s390x/op_helper.c
5544c1
index 270bf14..eced890 100644
5544c1
--- a/target-s390x/op_helper.c
5544c1
+++ b/target-s390x/op_helper.c
5544c1
@@ -779,18 +779,6 @@ uint32_t HELPER(icmh)(uint32_t r1, uint64_t address, uint32_t mask)
5544c1
     return cc;
5544c1
 }
5544c1
 
5544c1
-/* insert psw mask and condition code into r1 */
5544c1
-void HELPER(ipm)(uint32_t cc, uint32_t r1)
5544c1
-{
5544c1
-    uint64_t r = env->regs[r1];
5544c1
-
5544c1
-    r &= 0xffffffff00ffffffULL;
5544c1
-    r |= (cc << 28) | ((env->psw.mask >> 40) & 0xf);
5544c1
-    env->regs[r1] = r;
5544c1
-    HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__,
5544c1
-               cc, env->psw.mask, r);
5544c1
-}
5544c1
-
5544c1
 /* load access registers r1 to r3 from memory at a2 */
5544c1
 void HELPER(lam)(uint32_t r1, uint64_t a2, uint32_t r3)
5544c1
 {
5544c1
@@ -1038,483 +1026,6 @@ void HELPER(cksm)(uint32_t r1, uint32_t r2)
5544c1
         ((uint32_t)cksm + (cksm >> 32));
5544c1
 }
5544c1
 
5544c1
-static inline uint32_t cc_calc_ltgt_32(CPUS390XState *env, int32_t src,
5544c1
-                                       int32_t dst)
5544c1
-{
5544c1
-    if (src == dst) {
5544c1
-        return 0;
5544c1
-    } else if (src < dst) {
5544c1
-        return 1;
5544c1
-    } else {
5544c1
-        return 2;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_ltgt0_32(CPUS390XState *env, int32_t dst)
5544c1
-{
5544c1
-    return cc_calc_ltgt_32(env, dst, 0);
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_ltgt_64(CPUS390XState *env, int64_t src,
5544c1
-                                       int64_t dst)
5544c1
-{
5544c1
-    if (src == dst) {
5544c1
-        return 0;
5544c1
-    } else if (src < dst) {
5544c1
-        return 1;
5544c1
-    } else {
5544c1
-        return 2;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_ltgt0_64(CPUS390XState *env, int64_t dst)
5544c1
-{
5544c1
-    return cc_calc_ltgt_64(env, dst, 0);
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_ltugtu_32(CPUS390XState *env, uint32_t src,
5544c1
-                                         uint32_t dst)
5544c1
-{
5544c1
-    if (src == dst) {
5544c1
-        return 0;
5544c1
-    } else if (src < dst) {
5544c1
-        return 1;
5544c1
-    } else {
5544c1
-        return 2;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_ltugtu_64(CPUS390XState *env, uint64_t src,
5544c1
-                                         uint64_t dst)
5544c1
-{
5544c1
-    if (src == dst) {
5544c1
-        return 0;
5544c1
-    } else if (src < dst) {
5544c1
-        return 1;
5544c1
-    } else {
5544c1
-        return 2;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_tm_32(CPUS390XState *env, uint32_t val,
5544c1
-                                     uint32_t mask)
5544c1
-{
5544c1
-    uint16_t r = val & mask;
5544c1
-
5544c1
-    HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__, val, mask);
5544c1
-    if (r == 0 || mask == 0) {
5544c1
-        return 0;
5544c1
-    } else if (r == mask) {
5544c1
-        return 3;
5544c1
-    } else {
5544c1
-        return 1;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-/* set condition code for test under mask */
5544c1
-static inline uint32_t cc_calc_tm_64(CPUS390XState *env, uint64_t val,
5544c1
-                                     uint32_t mask)
5544c1
-{
5544c1
-    uint16_t r = val & mask;
5544c1
-
5544c1
-    HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__, val, mask, r);
5544c1
-    if (r == 0 || mask == 0) {
5544c1
-        return 0;
5544c1
-    } else if (r == mask) {
5544c1
-        return 3;
5544c1
-    } else {
5544c1
-        while (!(mask & 0x8000)) {
5544c1
-            mask <<= 1;
5544c1
-            val <<= 1;
5544c1
-        }
5544c1
-        if (val & 0x8000) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 1;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_nz(CPUS390XState *env, uint64_t dst)
5544c1
-{
5544c1
-    return !!dst;
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_add_64(CPUS390XState *env, int64_t a1,
5544c1
-                                      int64_t a2, int64_t ar)
5544c1
-{
5544c1
-    if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
5544c1
-        return 3; /* overflow */
5544c1
-    } else {
5544c1
-        if (ar < 0) {
5544c1
-            return 1;
5544c1
-        } else if (ar > 0) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 0;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_addu_64(CPUS390XState *env, uint64_t a1,
5544c1
-                                       uint64_t a2, uint64_t ar)
5544c1
-{
5544c1
-    if (ar == 0) {
5544c1
-        if (a1) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 0;
5544c1
-        }
5544c1
-    } else {
5544c1
-        if (ar < a1 || ar < a2) {
5544c1
-            return 3;
5544c1
-        } else {
5544c1
-            return 1;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_sub_64(CPUS390XState *env, int64_t a1,
5544c1
-                                      int64_t a2, int64_t ar)
5544c1
-{
5544c1
-    if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
5544c1
-        return 3; /* overflow */
5544c1
-    } else {
5544c1
-        if (ar < 0) {
5544c1
-            return 1;
5544c1
-        } else if (ar > 0) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 0;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_subu_64(CPUS390XState *env, uint64_t a1,
5544c1
-                                       uint64_t a2, uint64_t ar)
5544c1
-{
5544c1
-    if (ar == 0) {
5544c1
-        return 2;
5544c1
-    } else {
5544c1
-        if (a2 > a1) {
5544c1
-            return 1;
5544c1
-        } else {
5544c1
-            return 3;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_abs_64(CPUS390XState *env, int64_t dst)
5544c1
-{
5544c1
-    if ((uint64_t)dst == 0x8000000000000000ULL) {
5544c1
-        return 3;
5544c1
-    } else if (dst) {
5544c1
-        return 1;
5544c1
-    } else {
5544c1
-        return 0;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_nabs_64(CPUS390XState *env, int64_t dst)
5544c1
-{
5544c1
-    return !!dst;
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_comp_64(CPUS390XState *env, int64_t dst)
5544c1
-{
5544c1
-    if ((uint64_t)dst == 0x8000000000000000ULL) {
5544c1
-        return 3;
5544c1
-    } else if (dst < 0) {
5544c1
-        return 1;
5544c1
-    } else if (dst > 0) {
5544c1
-        return 2;
5544c1
-    } else {
5544c1
-        return 0;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-
5544c1
-static inline uint32_t cc_calc_add_32(CPUS390XState *env, int32_t a1,
5544c1
-                                      int32_t a2, int32_t ar)
5544c1
-{
5544c1
-    if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
5544c1
-        return 3; /* overflow */
5544c1
-    } else {
5544c1
-        if (ar < 0) {
5544c1
-            return 1;
5544c1
-        } else if (ar > 0) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 0;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_addu_32(CPUS390XState *env, uint32_t a1,
5544c1
-                                       uint32_t a2, uint32_t ar)
5544c1
-{
5544c1
-    if (ar == 0) {
5544c1
-        if (a1) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 0;
5544c1
-        }
5544c1
-    } else {
5544c1
-        if (ar < a1 || ar < a2) {
5544c1
-            return 3;
5544c1
-        } else {
5544c1
-            return 1;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_sub_32(CPUS390XState *env, int32_t a1,
5544c1
-                                      int32_t a2, int32_t ar)
5544c1
-{
5544c1
-    if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
5544c1
-        return 3; /* overflow */
5544c1
-    } else {
5544c1
-        if (ar < 0) {
5544c1
-            return 1;
5544c1
-        } else if (ar > 0) {
5544c1
-            return 2;
5544c1
-        } else {
5544c1
-            return 0;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_subu_32(CPUS390XState *env, uint32_t a1,
5544c1
-                                       uint32_t a2, uint32_t ar)
5544c1
-{
5544c1
-    if (ar == 0) {
5544c1
-        return 2;
5544c1
-    } else {
5544c1
-        if (a2 > a1) {
5544c1
-            return 1;
5544c1
-        } else {
5544c1
-            return 3;
5544c1
-        }
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_abs_32(CPUS390XState *env, int32_t dst)
5544c1
-{
5544c1
-    if ((uint32_t)dst == 0x80000000UL) {
5544c1
-        return 3;
5544c1
-    } else if (dst) {
5544c1
-        return 1;
5544c1
-    } else {
5544c1
-        return 0;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_nabs_32(CPUS390XState *env, int32_t dst)
5544c1
-{
5544c1
-    return !!dst;
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_comp_32(CPUS390XState *env, int32_t dst)
5544c1
-{
5544c1
-    if ((uint32_t)dst == 0x80000000UL) {
5544c1
-        return 3;
5544c1
-    } else if (dst < 0) {
5544c1
-        return 1;
5544c1
-    } else if (dst > 0) {
5544c1
-        return 2;
5544c1
-    } else {
5544c1
-        return 0;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
-/* calculate condition code for insert character under mask insn */
5544c1
-static inline uint32_t cc_calc_icm_32(CPUS390XState *env, uint32_t mask,
5544c1
-                                      uint32_t val)
5544c1
-{
5544c1
-    uint32_t cc;
5544c1
-
5544c1
-    HELPER_LOG("%s: mask 0x%x val %d\n", __func__, mask, val);
5544c1
-    if (mask == 0xf) {
5544c1
-        if (!val) {
5544c1
-            return 0;
5544c1
-        } else if (val & 0x80000000) {
5544c1
-            return 1;
5544c1
-        } else {
5544c1
-            return 2;
5544c1
-        }
5544c1
-    }
5544c1
-
5544c1
-    if (!val || !mask) {
5544c1
-        cc = 0;
5544c1
-    } else {
5544c1
-        while (mask != 1) {
5544c1
-            mask >>= 1;
5544c1
-            val >>= 8;
5544c1
-        }
5544c1
-        if (val & 0x80) {
5544c1
-            cc = 1;
5544c1
-        } else {
5544c1
-            cc = 2;
5544c1
-        }
5544c1
-    }
5544c1
-    return cc;
5544c1
-}
5544c1
-
5544c1
-static inline uint32_t cc_calc_slag(CPUS390XState *env, uint64_t src,
5544c1
-                                    uint64_t shift)
5544c1
-{
5544c1
-    uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
5544c1
-    uint64_t match, r;
5544c1
-
5544c1
-    /* check if the sign bit stays the same */
5544c1
-    if (src & (1ULL << 63)) {
5544c1
-        match = mask;
5544c1
-    } else {
5544c1
-        match = 0;
5544c1
-    }
5544c1
-
5544c1
-    if ((src & mask) != match) {
5544c1
-        /* overflow */
5544c1
-        return 3;
5544c1
-    }
5544c1
-
5544c1
-    r = ((src << shift) & ((1ULL << 63) - 1)) | (src & (1ULL << 63));
5544c1
-
5544c1
-    if ((int64_t)r == 0) {
5544c1
-        return 0;
5544c1
-    } else if ((int64_t)r < 0) {
5544c1
-        return 1;
5544c1
-    }
5544c1
-
5544c1
-    return 2;
5544c1
-}
5544c1
-
5544c1
-
5544c1
-static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
5544c1
-                                  uint64_t src, uint64_t dst, uint64_t vr)
5544c1
-{
5544c1
-    uint32_t r = 0;
5544c1
-
5544c1
-    switch (cc_op) {
5544c1
-    case CC_OP_CONST0:
5544c1
-    case CC_OP_CONST1:
5544c1
-    case CC_OP_CONST2:
5544c1
-    case CC_OP_CONST3:
5544c1
-        /* cc_op value _is_ cc */
5544c1
-        r = cc_op;
5544c1
-        break;
5544c1
-    case CC_OP_LTGT0_32:
5544c1
-        r = cc_calc_ltgt0_32(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_LTGT0_64:
5544c1
-        r =  cc_calc_ltgt0_64(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_LTGT_32:
5544c1
-        r =  cc_calc_ltgt_32(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_LTGT_64:
5544c1
-        r =  cc_calc_ltgt_64(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_LTUGTU_32:
5544c1
-        r =  cc_calc_ltugtu_32(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_LTUGTU_64:
5544c1
-        r =  cc_calc_ltugtu_64(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_TM_32:
5544c1
-        r =  cc_calc_tm_32(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_TM_64:
5544c1
-        r =  cc_calc_tm_64(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_NZ:
5544c1
-        r =  cc_calc_nz(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_ADD_64:
5544c1
-        r =  cc_calc_add_64(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_ADDU_64:
5544c1
-        r =  cc_calc_addu_64(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_SUB_64:
5544c1
-        r =  cc_calc_sub_64(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_SUBU_64:
5544c1
-        r =  cc_calc_subu_64(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_ABS_64:
5544c1
-        r =  cc_calc_abs_64(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_NABS_64:
5544c1
-        r =  cc_calc_nabs_64(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_COMP_64:
5544c1
-        r =  cc_calc_comp_64(env, dst);
5544c1
-        break;
5544c1
-
5544c1
-    case CC_OP_ADD_32:
5544c1
-        r =  cc_calc_add_32(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_ADDU_32:
5544c1
-        r =  cc_calc_addu_32(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_SUB_32:
5544c1
-        r =  cc_calc_sub_32(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_SUBU_32:
5544c1
-        r =  cc_calc_subu_32(env, src, dst, vr);
5544c1
-        break;
5544c1
-    case CC_OP_ABS_32:
5544c1
-        r =  cc_calc_abs_64(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_NABS_32:
5544c1
-        r =  cc_calc_nabs_64(env, dst);
5544c1
-        break;
5544c1
-    case CC_OP_COMP_32:
5544c1
-        r =  cc_calc_comp_32(env, dst);
5544c1
-        break;
5544c1
-
5544c1
-    case CC_OP_ICM:
5544c1
-        r =  cc_calc_icm_32(env, src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_SLAG:
5544c1
-        r =  cc_calc_slag(env, src, dst);
5544c1
-        break;
5544c1
-
5544c1
-    case CC_OP_LTGT_F32:
5544c1
-        r = set_cc_f32(src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_LTGT_F64:
5544c1
-        r = set_cc_f64(src, dst);
5544c1
-        break;
5544c1
-    case CC_OP_NZ_F32:
5544c1
-        r = set_cc_nz_f32(dst);
5544c1
-        break;
5544c1
-    case CC_OP_NZ_F64:
5544c1
-        r = set_cc_nz_f64(dst);
5544c1
-        break;
5544c1
-
5544c1
-    default:
5544c1
-        cpu_abort(env, "Unknown CC operation: %s\n", cc_name(cc_op));
5544c1
-    }
5544c1
-
5544c1
-    HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
5544c1
-               cc_name(cc_op), src, dst, vr, r);
5544c1
-    return r;
5544c1
-}
5544c1
-
5544c1
-uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
5544c1
-                 uint64_t vr)
5544c1
-{
5544c1
-    return do_calc_cc(env, cc_op, src, dst, vr);
5544c1
-}
5544c1
-
5544c1
-uint32_t HELPER(calc_cc)(uint32_t cc_op, uint64_t src, uint64_t dst,
5544c1
-                         uint64_t vr)
5544c1
-{
5544c1
-    return do_calc_cc(env, cc_op, src, dst, vr);
5544c1
-}
5544c1
-
5544c1
 uint64_t HELPER(cvd)(int32_t bin)
5544c1
 {
5544c1
     /* positive 0 */
5544c1
@@ -1594,14 +1105,7 @@ void HELPER(tr)(uint32_t len, uint64_t array, uint64_t trans)
5544c1
 }
5544c1
 
5544c1
 #ifndef CONFIG_USER_ONLY
5544c1
-
5544c1
-void HELPER(load_psw)(uint64_t mask, uint64_t addr)
5544c1
-{
5544c1
-    load_psw(env, mask, addr);
5544c1
-    cpu_loop_exit(env);
5544c1
-}
5544c1
-
5544c1
-static void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
5544c1
+void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
5544c1
 {
5544c1
     qemu_log("program interrupt at %#" PRIx64 "\n", env->psw.addr);
5544c1
 
5544c1
@@ -2175,30 +1679,6 @@ uint32_t HELPER(sigp)(uint64_t order_code, uint32_t r1, uint64_t cpu_addr)
5544c1
     return cc;
5544c1
 }
5544c1
 
5544c1
-void HELPER(sacf)(uint64_t a1)
5544c1
-{
5544c1
-    HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1);
5544c1
-
5544c1
-    switch (a1 & 0xf00) {
5544c1
-    case 0x000:
5544c1
-        env->psw.mask &= ~PSW_MASK_ASC;
5544c1
-        env->psw.mask |= PSW_ASC_PRIMARY;
5544c1
-        break;
5544c1
-    case 0x100:
5544c1
-        env->psw.mask &= ~PSW_MASK_ASC;
5544c1
-        env->psw.mask |= PSW_ASC_SECONDARY;
5544c1
-        break;
5544c1
-    case 0x300:
5544c1
-        env->psw.mask &= ~PSW_MASK_ASC;
5544c1
-        env->psw.mask |= PSW_ASC_HOME;
5544c1
-        break;
5544c1
-    default:
5544c1
-        qemu_log("unknown sacf mode: %" PRIx64 "\n", a1);
5544c1
-        program_interrupt(env, PGM_SPECIFICATION, 2);
5544c1
-        break;
5544c1
-    }
5544c1
-}
5544c1
-
5544c1
 /* invalidate pte */
5544c1
 void HELPER(ipte)(uint64_t pte_addr, uint64_t vaddr)
5544c1
 {
5544c1
-- 
5544c1
1.7.12.1
5544c1