From a2765b13bbe4a4d5978cd25f451b35dbb137ab6e Mon Sep 17 00:00:00 2001 From: "plai@redhat.com" Date: Tue, 26 Nov 2019 19:36:49 +0000 Subject: [PATCH 05/11] x86/cpu: Enable MOVDIRI cpu feature RH-Author: plai@redhat.com Message-id: <1574797015-32564-2-git-send-email-plai@redhat.com> Patchwork-id: 92696 O-Subject: [RHEL8.2 qemu-kvm PATCH 1/7] x86/cpu: Enable MOVDIRI cpu feature Bugzilla: 1634827 RH-Acked-by: Eduardo Habkost RH-Acked-by: Michael S. Tsirkin RH-Acked-by: Igor Mammedov From: Liu Jingqi MOVDIRI moves doubleword or quadword from register to memory through direct store which is implemented by using write combining (WC) for writing data directly into memory without caching the data. The bit definition: CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI The release document ref below link: https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf Cc: Xu Tao Signed-off-by: Liu Jingqi Message-Id: <1541488407-17045-2-git-send-email-jingqi.liu@intel.com> Signed-off-by: Eduardo Habkost (cherry picked from commit 24261de4916596d8ab5f5fee67e9e7a19e8325a5) Signed-off-by: Paul Lai Resolved Conflicts: target/i386/cpu.c target/i386/cpu.h Signed-off-by: Danilo C. L. de Paula --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ef6b958..f2ab558 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1021,7 +1021,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { "avx512bitalg", NULL, "avx512-vpopcntdq", NULL, "la57", NULL, NULL, NULL, NULL, NULL, "rdpid", NULL, - NULL, "cldemote", NULL, NULL, + NULL, "cldemote", NULL, "movdiri", NULL, NULL, NULL, NULL, }, .cpuid = { diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8d8814e..6ba0b1e 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -718,6 +718,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_ECX_LA57 (1U << 16) #define CPUID_7_0_ECX_RDPID (1U << 22) #define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */ +#define CPUID_7_0_ECX_MOVDIRI (1U << 27) /* MOVDIRI Instruction */ #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */ #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */ -- 1.8.3.1