diff --git a/SOURCES/kvm-target-i386-Export-TAA_NO-bit-to-guests.patch b/SOURCES/kvm-target-i386-Export-TAA_NO-bit-to-guests.patch
new file mode 100644
index 0000000..f40021e
--- /dev/null
+++ b/SOURCES/kvm-target-i386-Export-TAA_NO-bit-to-guests.patch
@@ -0,0 +1,48 @@
+From 89c4aa9839e314a3ed45b377c8fb9a3b3fd78147 Mon Sep 17 00:00:00 2001
+From: Eduardo Habkost <ehabkost@redhat.com>
+Date: Tue, 3 Dec 2019 22:51:40 +0000
+Subject: [PATCH 1/2] target/i386: Export TAA_NO bit to guests
+
+RH-Author: Eduardo Habkost <ehabkost@redhat.com>
+Message-id: <20191203225141.501191-2-ehabkost@redhat.com>
+Patchwork-id: 92842
+O-Subject: [RHEL-8.1.0 qemu-kvm PATCH 1/2] target/i386: Export TAA_NO bit to guests
+Bugzilla: 1771970
+RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
+RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
+RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
+
+From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
+
+TSX Async Abort (TAA) is a side channel attack on internal buffers in
+some Intel processors similar to Microachitectural Data Sampling (MDS).
+
+Some future Intel processors will use the ARCH_CAP_TAA_NO bit in the
+IA32_ARCH_CAPABILITIES MSR to report that they are not vulnerable to
+TAA. Make this bit available to guests.
+
+Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+(cherry picked from commit 7fac38635e1cc5ebae34eb6530da1009bd5808e4)
+Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
+Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
+---
+ target/i386/cpu.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/target/i386/cpu.c b/target/i386/cpu.c
+index c8f50a7..7baa5d2 100644
+--- a/target/i386/cpu.c
++++ b/target/i386/cpu.c
+@@ -1148,7 +1148,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
+ .feat_names = {
+ "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
+ "ssb-no", "mds-no", NULL, NULL,
+- NULL, NULL, NULL, NULL,
++ "taa-no", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+--
+1.8.3.1
+
diff --git a/SOURCES/kvm-target-i386-add-support-for-MSR_IA32_TSX_CTRL.patch b/SOURCES/kvm-target-i386-add-support-for-MSR_IA32_TSX_CTRL.patch
new file mode 100644
index 0000000..395e481
--- /dev/null
+++ b/SOURCES/kvm-target-i386-add-support-for-MSR_IA32_TSX_CTRL.patch
@@ -0,0 +1,161 @@
+From 4adba22c823ecc91cca5aeb835834b3393d5f50b Mon Sep 17 00:00:00 2001
+From: Eduardo Habkost <ehabkost@redhat.com>
+Date: Tue, 3 Dec 2019 22:51:41 +0000
+Subject: [PATCH 2/2] target/i386: add support for MSR_IA32_TSX_CTRL
+
+RH-Author: Eduardo Habkost <ehabkost@redhat.com>
+Message-id: <20191203225141.501191-3-ehabkost@redhat.com>
+Patchwork-id: 92841
+O-Subject: [RHEL-8.1.0 qemu-kvm PATCH 2/2] target/i386: add support for MSR_IA32_TSX_CTRL
+Bugzilla: 1771970
+RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
+RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
+RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
+
+From: Paolo Bonzini <pbonzini@redhat.com>
+
+The MSR_IA32_TSX_CTRL MSR can be used to hide TSX (also known as the
+Trusty Side-channel Extension). By virtualizing the MSR, KVM guests
+can disable TSX and avoid paying the price of mitigating TSX-based
+attacks on microarchitectural side channels.
+
+Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+(cherry picked from commit 2a9758c51e2c2d13fc3845c3d603c11df98b8823)
+Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
+Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
+---
+ target/i386/cpu.c | 2 +-
+ target/i386/cpu.h | 4 ++++
+ target/i386/kvm.c | 13 +++++++++++++
+ target/i386/machine.c | 20 ++++++++++++++++++++
+ 4 files changed, 38 insertions(+), 1 deletion(-)
+
+diff --git a/target/i386/cpu.c b/target/i386/cpu.c
+index 7baa5d2..591ebf3 100644
+--- a/target/i386/cpu.c
++++ b/target/i386/cpu.c
+@@ -1147,7 +1147,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
+ .type = MSR_FEATURE_WORD,
+ .feat_names = {
+ "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
+- "ssb-no", "mds-no", NULL, NULL,
++ "ssb-no", "mds-no", NULL, "tsx-ctrl",
+ "taa-no", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+diff --git a/target/i386/cpu.h b/target/i386/cpu.h
+index 273c90b..b6bef27 100644
+--- a/target/i386/cpu.h
++++ b/target/i386/cpu.h
+@@ -354,6 +354,9 @@ typedef enum X86Seg {
+ #define MSR_VIRT_SSBD 0xc001011f
+ #define MSR_IA32_PRED_CMD 0x49
+ #define MSR_IA32_ARCH_CAPABILITIES 0x10a
++#define ARCH_CAP_TSX_CTRL_MSR (1<<7)
++
++#define MSR_IA32_TSX_CTRL 0x122
+ #define MSR_IA32_TSCDEADLINE 0x6e0
+
+ #define FEATURE_CONTROL_LOCKED (1<<0)
+@@ -1229,6 +1232,7 @@ typedef struct CPUX86State {
+ uint64_t msr_smi_count;
+
+ uint32_t pkru;
++ uint32_t tsx_ctrl;
+
+ uint64_t spec_ctrl;
+ uint64_t virt_ssbd;
+diff --git a/target/i386/kvm.c b/target/i386/kvm.c
+index da5f07e..06144f0 100644
+--- a/target/i386/kvm.c
++++ b/target/i386/kvm.c
+@@ -92,6 +92,7 @@ static bool has_msr_hv_stimer;
+ static bool has_msr_hv_frequencies;
+ static bool has_msr_xss;
+ static bool has_msr_spec_ctrl;
++static bool has_msr_tsx_ctrl;
+ static bool has_msr_virt_ssbd;
+ static bool has_msr_smi_count;
+ static bool has_msr_arch_capabs;
+@@ -1422,6 +1423,9 @@ static int kvm_get_supported_msrs(KVMState *s)
+ case MSR_IA32_SPEC_CTRL:
+ has_msr_spec_ctrl = true;
+ break;
++ case MSR_IA32_TSX_CTRL:
++ has_msr_tsx_ctrl = true;
++ break;
+ case MSR_VIRT_SSBD:
+ has_msr_virt_ssbd = true;
+ break;
+@@ -1928,6 +1932,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
+ if (has_msr_spec_ctrl) {
+ kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl);
+ }
++ if (has_msr_tsx_ctrl) {
++ kvm_msr_entry_add(cpu, MSR_IA32_TSX_CTRL, env->tsx_ctrl);
++ }
+ if (has_msr_virt_ssbd) {
+ kvm_msr_entry_add(cpu, MSR_VIRT_SSBD, env->virt_ssbd);
+ }
+@@ -2310,6 +2317,9 @@ static int kvm_get_msrs(X86CPU *cpu)
+ if (has_msr_spec_ctrl) {
+ kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0);
+ }
++ if (has_msr_tsx_ctrl) {
++ kvm_msr_entry_add(cpu, MSR_IA32_TSX_CTRL, 0);
++ }
+ if (has_msr_virt_ssbd) {
+ kvm_msr_entry_add(cpu, MSR_VIRT_SSBD, 0);
+ }
+@@ -2681,6 +2691,9 @@ static int kvm_get_msrs(X86CPU *cpu)
+ case MSR_IA32_SPEC_CTRL:
+ env->spec_ctrl = msrs[i].data;
+ break;
++ case MSR_IA32_TSX_CTRL:
++ env->tsx_ctrl = msrs[i].data;
++ break;
+ case MSR_VIRT_SSBD:
+ env->virt_ssbd = msrs[i].data;
+ break;
+diff --git a/target/i386/machine.c b/target/i386/machine.c
+index fa8d1cc..76b173c 100644
+--- a/target/i386/machine.c
++++ b/target/i386/machine.c
+@@ -1226,6 +1226,25 @@ static const VMStateDescription vmstate_efer32 = {
+ };
+ #endif
+
++static bool msr_tsx_ctrl_needed(void *opaque)
++{
++ X86CPU *cpu = opaque;
++ CPUX86State *env = &cpu->env;
++
++ return env->features[FEAT_ARCH_CAPABILITIES] & ARCH_CAP_TSX_CTRL_MSR;
++}
++
++static const VMStateDescription vmstate_msr_tsx_ctrl = {
++ .name = "cpu/msr_tsx_ctrl",
++ .version_id = 1,
++ .minimum_version_id = 1,
++ .needed = msr_tsx_ctrl_needed,
++ .fields = (VMStateField[]) {
++ VMSTATE_UINT32(env.tsx_ctrl, X86CPU),
++ VMSTATE_END_OF_LIST()
++ }
++};
++
+ VMStateDescription vmstate_x86_cpu = {
+ .name = "cpu",
+ .version_id = 12,
+@@ -1357,6 +1376,7 @@ VMStateDescription vmstate_x86_cpu = {
+ #ifdef CONFIG_KVM
+ &vmstate_nested_state,
+ #endif
++ &vmstate_msr_tsx_ctrl,
+ NULL
+ }
+ };
+--
+1.8.3.1
+
diff --git a/SPECS/qemu-kvm.spec b/SPECS/qemu-kvm.spec
index c708fb8..b19a415 100644
--- a/SPECS/qemu-kvm.spec
+++ b/SPECS/qemu-kvm.spec
@@ -67,7 +67,7 @@ Obsoletes: %1-rhev
Summary: QEMU is a machine emulator and virtualizer
Name: qemu-kvm
Version: 2.12.0
-Release: 88%{?dist}.1
+Release: 88%{?dist}.2
# Epoch because we pushed a qemu-1.0 package. AIUI this can't ever be dropped
Epoch: 15
License: GPLv2 and GPLv2+ and CC-BY
@@ -1683,6 +1683,10 @@ Patch821: kvm-block-posix-Always-allocate-the-first-block.patch
Patch822: kvm-iotests-Test-allocate_first_block-with-O_DIRECT.patch
# For bz#1764829 - RHEL8.1 Snapshot3 - Passthrough PCI card goes into error state if used in domain (kvm) [rhel-8.1.0.z]
Patch823: kvm-s390-PCI-fix-IOMMU-region-init.patch
+# For bz#1771970 - CVE-2019-11135 virt:rhel/qemu-kvm: hw: TSX Transaction Asynchronous Abort (TAA) [rhel-8.1.0.z]
+Patch824: kvm-target-i386-Export-TAA_NO-bit-to-guests.patch
+# For bz#1771970 - CVE-2019-11135 virt:rhel/qemu-kvm: hw: TSX Transaction Asynchronous Abort (TAA) [rhel-8.1.0.z]
+Patch825: kvm-target-i386-add-support-for-MSR_IA32_TSX_CTRL.patch
BuildRequires: zlib-devel
BuildRequires: glib2-devel
@@ -2569,6 +2573,12 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \
%changelog
+* Tue Dec 10 2019 Danilo Cesar Lemes de Paula <ddepaula@redhat.com> - 2.12.0-88.el8_1_0.2
+- kvm-target-i386-Export-TAA_NO-bit-to-guests.patch [bz#1771970]
+- kvm-target-i386-add-support-for-MSR_IA32_TSX_CTRL.patch [bz#1771970]
+- Resolves: bz#1771970
+ (CVE-2019-11135 virt:rhel/qemu-kvm: hw: TSX Transaction Asynchronous Abort (TAA) [rhel-8.1.0.z])
+
* Mon Dec 02 2019 Danilo Cesar Lemes de Paula <ddepaula@redhat.com> - 2.12.0-88.el8_1_0.1
- kvm-s390-PCI-fix-IOMMU-region-init.patch [bz#1764829]
- Resolves: bz#1764829