From e5b6053e3055a79d9275e1cc4b48f12beaa851dc Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Thu, 13 Jul 2017 16:36:29 +0200 Subject: [PATCH 5/6] target/ppc: Refactor tcg radix mmu code RH-Author: Laurent Vivier Message-id: <20170713163630.24848-4-lvivier@redhat.com> Patchwork-id: 75765 O-Subject: [RHEL-ALT-7.4 qemu-kvm PATCH 3/4] target/ppc: Refactor tcg radix mmu code Bugzilla: 1470558 RH-Acked-by: David Gibson RH-Acked-by: Thomas Huth RH-Acked-by: Suraj Jitindar Singh From: Suraj Jitindar Singh The mmu-radix64.c file implements functions to enable the radix mmu emulation in tcg mode. There is a function ppc_radix64_walk_tree() which performs the radix tree walk and also implicitly checks the pte protection. Move the protection checking of the pte from the ppc_radix64_walk_tree() function into the caller. This means the ppc_radix64_walk_tree() function can be used without protection checking which is useful for debugging. ppc_radix64_walk_tree() no longer needs to take the rwx and prot variables. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson (cherry picked from commit 6a042827b638dc73da6a72c72596f5be80bd4581) Signed-off-by: Laurent Vivier BZ: https://bugzilla.redhat.com/show_bug.cgi?id=1470558 BREW: https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=13654102 Signed-off-by: Miroslav Rezanina --- target/ppc/mmu-radix64.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 69fde65..1a650fd 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -147,11 +147,10 @@ static void ppc_radix64_set_rc(PowerPCCPU *cpu, int rwx, uint64_t pte, } } -static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eaddr, +static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, vaddr eaddr, uint64_t base_addr, uint64_t nls, hwaddr *raddr, int *psize, - int *fault_cause, int *prot, - hwaddr *pte_addr) + int *fault_cause, hwaddr *pte_addr) { CPUState *cs = CPU(cpu); uint64_t index, pde; @@ -177,10 +176,6 @@ static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eaddr, uint64_t rpn = pde & R_PTE_RPN; uint64_t mask = (1UL << *psize) - 1; - if (ppc_radix64_check_prot(cpu, rwx, pde, fault_cause, prot)) { - return 0; /* Protection Denied Access */ - } - /* Or high bits of rpn and low bits to ea to form whole real addr */ *raddr = (rpn & ~mask) | (eaddr & mask); *pte_addr = base_addr + (index * sizeof(pde)); @@ -188,9 +183,8 @@ static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eaddr, } /* Next Level of Radix Tree */ - return ppc_radix64_walk_tree(cpu, rwx, eaddr, pde & R_PDE_NLB, - pde & R_PDE_NLS, raddr, psize, - fault_cause, prot, pte_addr); + return ppc_radix64_walk_tree(cpu, eaddr, pde & R_PDE_NLB, pde & R_PDE_NLS, + raddr, psize, fault_cause, pte_addr); } int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, @@ -241,11 +235,11 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, /* Walk Radix Tree from Process Table Entry to Convert EA to RA */ page_size = PRTBE_R_GET_RTS(prtbe0); - pte = ppc_radix64_walk_tree(cpu, rwx, eaddr & R_EADDR_MASK, + pte = ppc_radix64_walk_tree(cpu, eaddr & R_EADDR_MASK, prtbe0 & PRTBE_R_RPDB, prtbe0 & PRTBE_R_RPDS, - &raddr, &page_size, &fault_cause, &prot, - &pte_addr); - if (!pte) { + &raddr, &page_size, &fault_cause, &pte_addr); + if (!pte || ppc_radix64_check_prot(cpu, rwx, pte, &fault_cause, &prot)) { + /* Couldn't get pte or access denied due to protection */ ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause); return 1; } -- 1.8.3.1