From ce561d78c7199821beae26112f41da5733fab5bb Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 6 Jul 2016 20:47:53 +0200 Subject: [PATCH 2/2] target-i386: add Skylake-Client cpu model RH-Author: Eduardo Habkost Message-id: <1467838073-23873-3-git-send-email-ehabkost@redhat.com> Patchwork-id: 71052 O-Subject: [RHEL-7.3 qemu-kvm PATCH 2/2] target-i386: add Skylake-Client cpu model Bugzilla: 1327599 RH-Acked-by: Paolo Bonzini RH-Acked-by: Igor Mammedov RH-Acked-by: Bandan Das Introduce Skylake-Client cpu mode which inherits the features from Broadwell and supports some additional features that are: MPX, XSAVEC, and XGETBV1. Backport notes: * ARAT feature not included, as it is not available in the qemu-kvm-1.5.3 tree (and disabled by compat code in pc-i440fx-rhel7.2.0 and older on qemu-kvm-rhev) Signed-off-by: Eduardo Habkost Signed-off-by: Xiao Guangrong Reviewed-by: Paolo Bonzini Reviewed-by: Xiao Guangrong Signed-off-by: Eduardo Habkost (cherry picked from commit f6f949e9295889fb272698aea763dcea77d616ce) Signed-off-by: Eduardo Habkost Signed-off-by: Miroslav Rezanina --- target-i386/cpu.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 6650c72..80106ba 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -927,6 +927,49 @@ static x86_def_t builtin_x86_defs[] = { .model_id = "Intel Core Processor (Broadwell)", }, { + .name = "Skylake-Client", + .level = 0xd, + .vendor = CPUID_VENDOR_INTEL, + .family = 6, + .model = 94, + .stepping = 3, + .features[FEAT_1_EDX] = + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] = + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] = + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] = + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH, + .features[FEAT_7_0_EBX] = + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.6). + * KVM doesn't yet expose any XSAVES state save component, + * and the only one defined in Skylake (processor tracing) + * probably will block migration anyway. + */ + .features[FEAT_XSAVE] = + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .xlevel = 0x80000008, + .model_id = "Intel Core Processor (Skylake)", + }, + { .name = "Opteron_G1", .level = 5, .vendor = CPUID_VENDOR_AMD, -- 1.8.3.1