From d07bebfe0f9a1e1cf3f25449d9c20d4c21c6e2a0 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com> References: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com> From: "Michael S. Tsirkin" Date: Tue, 17 Dec 2013 15:17:37 +0100 Subject: [PATCH 19/56] q35: make pci window address/size match guest cfg RH-Author: Michael S. Tsirkin Message-id: <1387293161-4085-20-git-send-email-mst@redhat.com> Patchwork-id: 56325 O-Subject: [PATCH qemu-kvm RHEL7.0 v2 19/57] q35: make pci window address/size match guest cfg Bugzilla: 1034876 RH-Acked-by: Igor Mammedov RH-Acked-by: Marcel Apfelbaum RH-Acked-by: Laszlo Ersek For Q35, MMCFG address and size are guest configurable. Update w32 property to make it behave accordingly. Signed-off-by: Michael S. Tsirkin (cherry picked from commit 636228a887c4d5c0dc313bbf936de969b420a91a) Conflicts: hw/pci-host/q35.c --- hw/pci-host/q35.c | 10 ++++++++++ 1 file changed, 10 insertions(+) Signed-off-by: Michal Novotny --- hw/pci-host/q35.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index be12eee..70ad01f 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -207,6 +207,16 @@ static void mch_update_pciexbar(MCHPCIState *mch) } addr = pciexbar & addr_mask; pcie_host_mmcfg_update(&s->host, enable, addr, length); + /* Leave enough space for the MCFG BAR */ + /* + * TODO: this matches current bios behaviour, but it's not a power of two, + * which means an MTRR can't cover it exactly. + */ + if (enable) { + mch->pci_info.w32.begin = addr + length; + } else { + mch->pci_info.w32.begin = MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT; + } } /* PAM */ -- 1.7.11.7