From 8b64571f3ce90fc14c571ea588f608bce4328d34 Mon Sep 17 00:00:00 2001
From: "plai@redhat.com" <plai@redhat.com>
Date: Wed, 3 Apr 2019 15:54:32 +0100
Subject: [PATCH 08/10] x86: define a new MSR based feature word --
FEATURE_WORDS_ARCH_CAPABILITIES
RH-Author: plai@redhat.com
Message-id: <1554306874-28796-9-git-send-email-plai@redhat.com>
Patchwork-id: 85385
O-Subject: [RHEL8.1 qemu-kvm PATCH resend 08/10] x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIES
Bugzilla: 1561761
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
From: Robert Hoo <robert.hu@linux.intel.com>
Note RSBA is specially treated -- no matter host support it or not, qemu
pretends it is supported.
Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
Message-Id: <1539578845-37944-4-git-send-email-robert.hu@linux.intel.com>
[ehabkost: removed automatic enabling of RSBA]
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
(cherry picked from commit d86f963694df27f11b3681ffd225c9362de1b634)
Signed-off-by: Paul Lai <plai@redhat.com>
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
---
target/i386/cpu.c | 24 +++++++++++++++++++++++-
target/i386/cpu.h | 8 ++++++++
target/i386/kvm.c | 11 +++++++++++
3 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a0fdd3a..8750f64 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1143,6 +1143,27 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.tcg_features = ~0U,
},
+ /*Below are MSR exposed features*/
+ [FEAT_ARCH_CAPABILITIES] = {
+ .type = MSR_FEATURE_WORD,
+ .feat_names = {
+ "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
+ "ssb-no", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ },
+ .msr = {
+ .index = MSR_IA32_ARCH_CAPABILITIES,
+ .cpuid_dep = {
+ FEAT_7_0_EDX,
+ CPUID_7_0_EDX_ARCH_CAPABILITIES
+ }
+ },
+ },
};
typedef struct X86RegisterInfo32 {
@@ -3665,7 +3686,8 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,
wi->cpuid.reg);
break;
case MSR_FEATURE_WORD:
- r = kvm_arch_get_supported_msr_feature(kvm_state, wi->msr.index);
+ r = kvm_arch_get_supported_msr_feature(kvm_state,
+ wi->msr.index);
break;
}
} else if (hvf_enabled()) {
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index dd4493e..63f692f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -500,6 +500,7 @@ typedef enum FeatureWord {
FEAT_6_EAX, /* CPUID[6].EAX */
FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
+ FEAT_ARCH_CAPABILITIES,
FEATURE_WORDS,
} FeatureWord;
@@ -729,6 +730,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_TOPOLOGY_LEVEL_SMT (1U << 8)
#define CPUID_TOPOLOGY_LEVEL_CORE (2U << 8)
+/* MSR Feature Bits */
+#define MSR_ARCH_CAP_RDCL_NO (1U << 0)
+#define MSR_ARCH_CAP_IBRS_ALL (1U << 1)
+#define MSR_ARCH_CAP_RSBA (1U << 2)
+#define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)
+#define MSR_ARCH_CAP_SSB_NO (1U << 4)
+
#ifndef HYPERV_SPINLOCK_NEVER_RETRY
#define HYPERV_SPINLOCK_NEVER_RETRY 0xFFFFFFFF
#endif
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 096ed24..f1626a4 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -1833,6 +1833,17 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
}
#endif
+ /* If host supports feature MSR, write down. */
+ if (kvm_feature_msrs) {
+ int i;
+ for (i = 0; i < kvm_feature_msrs->nmsrs; i++)
+ if (kvm_feature_msrs->indices[i] == MSR_IA32_ARCH_CAPABILITIES) {
+ kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,
+ env->features[FEAT_ARCH_CAPABILITIES]);
+ break;
+ }
+ }
+
/*
* The following MSRs have side effects on the guest or are too heavy
* for normal writeback. Limit them to reset or full state updates.
--
1.8.3.1