Blame SOURCES/kvm-x86-add-AVX512_4VNNIW-and-AVX512_4FMAPS-features.patch

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From 7b43b5139f8e919203d3ed20fbba6cb143fde6d7 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Thu, 23 Feb 2017 14:29:32 +0100
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Subject: [PATCH 02/17] x86: add AVX512_4VNNIW and AVX512_4FMAPS features
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20170223142945.17790-2-ehabkost@redhat.com>
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Patchwork-id: 74033
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O-Subject: [RHEL-7.4 qemu-kvm PATCH v2 01/14] x86: add AVX512_4VNNIW and AVX512_4FMAPS features
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Bugzilla: 1382122
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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From: Luwei Kang <luwei.kang@intel.com>
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1382122
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The spec can be found in Intel Software Developer Manual or in
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Instruction Set Extensions Programming Reference.
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Backport notes:
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Changes v1 -> v2:
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* Fixed build error, moved feat_names to a separate static array
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  variable
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* Fixed backport mistakes (I had forgotten to add
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  features[FEAT_7_0_EDX] initialization and filtering code)
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Signed-off-by: Piotr Luc <piotr.luc@intel.com>
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Signed-off-by: Luwei Kang <luwei.kang@intel.com>
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Message-Id: <1477902446-5932-1-git-send-email-he.chen@linux.intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 95ea69fb46266aaa46d0c8b7f0ba8c4903dbe4e3)
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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 target-i386/cpu.c | 31 ++++++++++++++++++++++++++++++-
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 target-i386/cpu.h |  4 ++++
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 2 files changed, 34 insertions(+), 1 deletion(-)
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diff --git a/target-i386/cpu.c b/target-i386/cpu.c
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index c3c8306..789e687 100644
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--- a/target-i386/cpu.c
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+++ b/target-i386/cpu.c
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@@ -165,6 +165,17 @@ static const char *cpuid_7_0_ecx_feature_name[] = {
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     NULL, NULL, NULL, NULL,
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 };
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+static const char *cpuid_7_0_edx_feature_name[] = {
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+    NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+};
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+
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 static const char *cpuid_xsave_feature_name[] = {
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     "xsaveopt", "xsavec", "xgetbv1", NULL,
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     NULL, NULL, NULL, NULL,
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@@ -225,6 +236,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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         .cpuid_needs_ecx = true, .cpuid_ecx = 0,
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         .cpuid_reg = R_ECX,
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     },
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+    [FEAT_7_0_EDX] = {
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+        .feat_names = cpuid_7_0_edx_feature_name,
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+        .cpuid_eax = 7,
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+        .cpuid_needs_ecx = true, .cpuid_ecx = 0,
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+        .cpuid_reg = R_EDX,
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+    },
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     [FEAT_XSAVE] = {
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         .feat_names = cpuid_xsave_feature_name,
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         .cpuid_eax = 0xd,
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@@ -484,6 +501,7 @@ typedef struct x86_def_t {
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           CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
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           CPUID_7_0_EBX_RDSEED */
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 #define TCG_7_0_ECX_FEATURES 0
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+#define TCG_7_0_EDX_FEATURES 0
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 /* built-in CPU model definitions
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  */
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@@ -1254,9 +1272,12 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
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                     kvm_arch_get_supported_cpuid(s, 0x7, 0, R_EBX);
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         x86_cpu_def->features[FEAT_7_0_ECX] =
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                     kvm_arch_get_supported_cpuid(s, 0x7, 0, R_ECX);
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+        x86_cpu_def->features[FEAT_7_0_EDX] =
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+                    kvm_arch_get_supported_cpuid(s, 0x7, 0, R_EDX);
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     } else {
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         x86_cpu_def->features[FEAT_7_0_EBX] = 0;
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         x86_cpu_def->features[FEAT_7_0_ECX] = 0;
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+        x86_cpu_def->features[FEAT_7_0_EDX] = 0;
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     }
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     x86_cpu_def->features[FEAT_XSAVE] =
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                 kvm_arch_get_supported_cpuid(s, 0xd, 1, R_EAX);
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@@ -1343,6 +1364,9 @@ static int kvm_check_features_against_host(X86CPU *cpu)
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         {&env->features[FEAT_7_0_ECX],
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             &host_def.features[FEAT_7_0_ECX],
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             FEAT_7_0_ECX },
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+        {&env->features[FEAT_7_0_EDX],
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+            &host_def.features[FEAT_7_0_EDX],
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+            FEAT_7_0_EDX },
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         {&env->features[FEAT_XSAVE],
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             &host_def.features[FEAT_XSAVE],
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             FEAT_XSAVE },
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@@ -1885,6 +1909,7 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char *features, Error **errp)
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     env->features[FEAT_SVM] |= plus_features[FEAT_SVM];
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     env->features[FEAT_7_0_EBX] |= plus_features[FEAT_7_0_EBX];
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     env->features[FEAT_7_0_ECX] |= plus_features[FEAT_7_0_ECX];
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+    env->features[FEAT_7_0_EDX] |= plus_features[FEAT_7_0_EDX];
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     env->features[FEAT_XSAVE] |= plus_features[FEAT_XSAVE];
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     env->features[FEAT_1_EDX] &= ~minus_features[FEAT_1_EDX];
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     env->features[FEAT_1_ECX] &= ~minus_features[FEAT_1_ECX];
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@@ -1895,6 +1920,7 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char *features, Error **errp)
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     env->features[FEAT_SVM] &= ~minus_features[FEAT_SVM];
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     env->features[FEAT_7_0_EBX] &= ~minus_features[FEAT_7_0_EBX];
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     env->features[FEAT_7_0_ECX] &= ~minus_features[FEAT_7_0_ECX];
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+    env->features[FEAT_7_0_EDX] &= ~minus_features[FEAT_7_0_EDX];
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     env->features[FEAT_XSAVE] &= ~minus_features[FEAT_XSAVE];
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 out:
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@@ -2032,6 +2058,7 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp)
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     env->features[FEAT_C000_0001_EDX] = def->features[FEAT_C000_0001_EDX];
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     env->features[FEAT_7_0_EBX] = def->features[FEAT_7_0_EBX];
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     env->features[FEAT_7_0_ECX] = def->features[FEAT_7_0_ECX];
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+    env->features[FEAT_7_0_EDX] = def->features[FEAT_7_0_EDX];
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     env->features[FEAT_XSAVE] = def->features[FEAT_XSAVE];
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     env->cpuid_xlevel2 = def->xlevel2;
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@@ -2270,7 +2297,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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             *eax = 0; /* Maximum ECX value for sub-leaves */
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             *ebx = env->features[FEAT_7_0_EBX]; /* Feature flags */
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             *ecx = env->features[FEAT_7_0_ECX]; /* Feature flags */
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-            *edx = 0; /* Reserved */
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+            *edx = env->features[FEAT_7_0_EDX]; /* Feature flags */
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         } else {
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             *eax = 0;
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             *ebx = 0;
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@@ -2680,6 +2707,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
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         env->features[FEAT_8000_0001_ECX] &= TCG_EXT3_FEATURES;
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         env->features[FEAT_SVM] &= TCG_SVM_FEATURES;
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         env->features[FEAT_XSAVE] = 0;
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+        env->features[FEAT_7_0_ECX] &= TCG_7_0_ECX_FEATURES;
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+        env->features[FEAT_7_0_EDX] &= TCG_7_0_EDX_FEATURES;
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     } else {
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         if ((cpu->check_cpuid || cpu->enforce_cpuid)
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             && kvm_check_features_against_host(cpu) && cpu->enforce_cpuid) {
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diff --git a/target-i386/cpu.h b/target-i386/cpu.h
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index d541809..eec5c49 100644
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--- a/target-i386/cpu.h
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+++ b/target-i386/cpu.h
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@@ -401,6 +401,7 @@ typedef enum FeatureWord {
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     FEAT_1_ECX,         /* CPUID[1].ECX */
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     FEAT_7_0_EBX,       /* CPUID[EAX=7,ECX=0].EBX */
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     FEAT_7_0_ECX,       /* CPUID[EAX=7,ECX=0].ECX */
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+    FEAT_7_0_EDX,       /* CPUID[EAX=7,ECX=0].EDX */
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     FEAT_8000_0001_EDX, /* CPUID[8000_0001].EDX */
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     FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */
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     FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */
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@@ -580,6 +581,9 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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 #define CPUID_7_0_ECX_OSPKE    (1U << 4)
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 #define CPUID_7_0_ECX_RDPID    (1U << 22)
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+#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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+#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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+
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 #define CPUID_XSAVE_XSAVEOPT   (1U << 0)
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 #define CPUID_XSAVE_XSAVEC     (1U << 1)
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 #define CPUID_XSAVE_XGETBV1    (1U << 2)
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-- 
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1.8.3.1
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