Blame SOURCES/kvm-target-i386-Support-invariant-tsc-flag.patch

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From 4e903b8594bb59a953e66ca0fb422079f6f6b573 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Wed, 21 Aug 2019 14:30:05 +0200
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Subject: [PATCH 1/3] target-i386: Support "invariant tsc" flag
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20190821143006.23516-2-ehabkost@redhat.com>
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Patchwork-id: 90101
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O-Subject: [RHEL-7.8 qemu-kvm PATCH 1/2] target-i386: Support "invariant tsc" flag
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Bugzilla: 1626871
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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From: Marcelo Tosatti <mtosatti@redhat.com>
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Expose "Invariant TSC" flag, if KVM is enabled. From Intel documentation:
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17.13.1 Invariant TSC The time stamp counter in newer processors may
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support an enhancement, referred to as invariant TSC. Processor’s
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support for invariant TSC is indicated by CPUID.80000007H:EDX[8].
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The invariant TSC will run at a constant rate in all ACPI P-, C-.
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and T-states. This is the architectural behavior moving forward. On
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processors with invariant TSC support, the OS may use the TSC for wall
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clock timer services (instead of ACPI or HPET timers). TSC reads are
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much more efficient and do not incur the overhead associated with a ring
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transition or access to a platform resource.
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Backport notes:
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  One extra line to remove invtsc was added to
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  kvm_cpu_fill_host(), to replace the unmigratable_flags field,
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  and fix the same issue fixed by upstream commit 120eee7d1fdb
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  ("target-i386: Set migratable=yes by default on "host" CPU
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  mooel").
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Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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[ehabkost: redo feature filtering to use .tcg_features]
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[ehabkost: add CPUID_APM_INVTSC macro, add it to .unmigratable_flags]
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Andreas Färber <afaerber@suse.de>
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(cherry picked from commit 303752a9068bfe84b9b05f1cd5ad5ff65b7f3ea6)
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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 target-i386/cpu.c | 26 ++++++++++++++++++++++++++
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 target-i386/cpu.h |  4 ++++
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 2 files changed, 30 insertions(+)
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diff --git a/target-i386/cpu.c b/target-i386/cpu.c
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index c2fcd1e..c74f597 100644
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--- a/target-i386/cpu.c
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+++ b/target-i386/cpu.c
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@@ -199,6 +199,17 @@ static const char *cpuid_xsave_feature_name[] = {
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     NULL, NULL, NULL, NULL,
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 };
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+static const char *cpuid_apm_edx_feature_name[] = {
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    "invtsc", NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+    NULL, NULL, NULL, NULL,
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+};
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+
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 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
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 #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
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           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
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@@ -258,6 +269,7 @@ static const char *cpuid_xsave_feature_name[] = {
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           CPUID_7_0_EBX_RDSEED */
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 #define TCG_7_0_ECX_FEATURES 0
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 #define TCG_7_0_EDX_FEATURES 0
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+#define TCG_APM_FEATURES 0
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 typedef struct FeatureWordInfo {
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@@ -326,6 +338,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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         .cpuid_reg = R_EDX,
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         .tcg_features = TCG_7_0_EDX_FEATURES,
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     },
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+    [FEAT_8000_0007_EDX] = {
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+        .feat_names = cpuid_apm_edx_feature_name,
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+        .cpuid_eax = 0x80000007,
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+        .cpuid_reg = R_EDX,
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+        .tcg_features = TCG_APM_FEATURES,
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+    },
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     [FEAT_8000_0008_EBX] = {
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         .feat_names = cpuid_80000008_ebx_feature_name,
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         .cpuid_eax = 0x80000008,
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@@ -1750,6 +1768,8 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
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     /* arch-facilities: deprecated (see comment on x86_cpu_realizefn()) */
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     x86_cpu_def->features[FEAT_7_0_EDX] &= ~CPUID_7_0_EDX_ARCH_CAPABILITIES;
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+    /* invtsc: not migratable, so not enabled by default */
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+    x86_cpu_def->features[FEAT_8000_0007_EDX] &= ~CPUID_APM_INVTSC;
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 #endif /* CONFIG_KVM */
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 }
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@@ -2805,6 +2825,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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         *ecx = 0x02008140;
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         *edx = 0;
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         break;
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+    case 0x80000007:
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+        *eax = 0;
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+        *ebx = 0;
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+        *ecx = 0;
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+        *edx = env->features[FEAT_8000_0007_EDX];
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+        break;
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     case 0x80000008:
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         /* virtual & phys address size in low 2 bytes. */
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 /* XXX: This value must match the one used in the MMU code. */
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diff --git a/target-i386/cpu.h b/target-i386/cpu.h
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index 5d47ab8..cbbc34f 100644
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--- a/target-i386/cpu.h
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+++ b/target-i386/cpu.h
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@@ -408,6 +408,7 @@ typedef enum FeatureWord {
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     FEAT_7_0_EDX,       /* CPUID[EAX=7,ECX=0].EDX */
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     FEAT_8000_0001_EDX, /* CPUID[8000_0001].EDX */
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     FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */
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+    FEAT_8000_0007_EDX, /* CPUID[8000_0007].EDX */
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     FEAT_8000_0008_EBX, /* CPUID[8000_0008].EBX */
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     FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */
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     FEAT_KVM,           /* CPUID[4000_0001].EAX (KVM_CPUID_FEATURES) */
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@@ -613,6 +614,9 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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 #define CPUID_XSAVE_XGETBV1    (1U << 2)
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 #define CPUID_XSAVE_XSAVES     (1U << 3)
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+/* CPUID[0x80000007].EDX flags: */
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+#define CPUID_APM_INVTSC       (1U << 8)
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+
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 #define CPUID_VENDOR_SZ      12
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 #define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */
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-- 
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1.8.3.1
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