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From 7d2e8f9662feb64c0b15b6fd53e06e3c56921f27 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Fri, 9 Jun 2017 11:43:58 +0200
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Subject: [PATCH 3/6] serial: fixing vmstate for save/restore
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RH-Author: Paolo Bonzini <pbonzini@redhat.com>
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Message-id: <20170609114359.13036-3-pbonzini@redhat.com>
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Patchwork-id: 75567
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O-Subject: [RHEL7.4 qemu-kvm PATCH v2 2/3] serial: fixing vmstate for save/restore
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Bugzilla: 1452067
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RH-Acked-by: David Hildenbrand <david@redhat.com>
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RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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From: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
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Some fields were added to VMState by this patch to preserve correct
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loading of the serial port controller state.
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Updating FCR value while loading was also modified to disable generating
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an interrupt by loadvm.
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Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 7385b275d9ae8bdf3c012bc4e2ae9779fcea6312)
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[RHEL: omit some subsections.  thr_ipending can be reconstructed fairly
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       reliably by serial_post_load.  The others are features that are
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       unlikely to be used in RHEL, respectively receive timeout (Linux
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       does not even have the UART_IIR_CTI symbol in the driver) and
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       physical serial ports connected to a modem]
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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 hw/char/serial.c | 245 ++++++++++++++++++++++++++++++++++++++++++++++++-------
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 1 file changed, 215 insertions(+), 30 deletions(-)
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diff --git a/hw/char/serial.c b/hw/char/serial.c
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index 39de1ca..0518a6f 100644
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--- a/hw/char/serial.c
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+++ b/hw/char/serial.c
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@@ -275,6 +275,36 @@ static void serial_xmit(SerialState *s)
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     s->lsr |= UART_LSR_TEMT;
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 }
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+/* Setter for FCR.
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+   is_load flag means, that value is set while loading VM state
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+   and interrupt should not be invoked */
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+static void serial_write_fcr(SerialState *s, uint8_t val)
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+{
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+    /* Set fcr - val only has the bits that are supposed to "stick" */
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+    s->fcr = val;
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+
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+    if (val & UART_FCR_FE) {
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+        s->iir |= UART_IIR_FE;
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+        /* Set recv_fifo trigger Level */
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+        switch (val & 0xC0) {
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+        case UART_FCR_ITL_1:
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+            s->recv_fifo_itl = 1;
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+            break;
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+        case UART_FCR_ITL_2:
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+            s->recv_fifo_itl = 4;
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+            break;
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+        case UART_FCR_ITL_3:
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+            s->recv_fifo_itl = 8;
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+            break;
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+        case UART_FCR_ITL_4:
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+            s->recv_fifo_itl = 14;
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+            break;
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+        }
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+    } else {
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+        s->iir &= ~UART_IIR_FE;
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+    }
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+}
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+
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 static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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                                 unsigned size)
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 {
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@@ -351,21 +381,17 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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         }
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         break;
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     case 2:
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-        val = val & 0xFF;
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-
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-        if (s->fcr == val)
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-            break;
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-
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         /* Did the enable/disable flag change? If so, make sure FIFOs get flushed */
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-        if ((val ^ s->fcr) & UART_FCR_FE)
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+        if ((val ^ s->fcr) & UART_FCR_FE) {
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             val |= UART_FCR_XFR | UART_FCR_RFR;
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+        }
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         /* FIFO clear */
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         if (val & UART_FCR_RFR) {
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             s->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
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             qemu_del_timer(s->fifo_timeout_timer);
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-            s->timeout_ipending=0;
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+            s->timeout_ipending = 0;
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             fifo8_reset(&s->recv_fifo);
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         }
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@@ -375,28 +401,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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             fifo8_reset(&s->xmit_fifo);
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         }
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-        if (val & UART_FCR_FE) {
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-            s->iir |= UART_IIR_FE;
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-            /* Set recv_fifo trigger Level */
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-            switch (val & 0xC0) {
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-            case UART_FCR_ITL_1:
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-                s->recv_fifo_itl = 1;
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-                break;
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-            case UART_FCR_ITL_2:
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-                s->recv_fifo_itl = 4;
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-                break;
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-            case UART_FCR_ITL_3:
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-                s->recv_fifo_itl = 8;
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-                break;
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-            case UART_FCR_ITL_4:
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-                s->recv_fifo_itl = 14;
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-                break;
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-            }
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-        } else
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-            s->iir &= ~UART_IIR_FE;
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-
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-        /* Set fcr - or at least the bits in it that are supposed to "stick" */
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-        s->fcr = val & 0xC9;
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+        serial_write_fcr(s, val & 0xC9);
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         serial_update_irq(s);
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         break;
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     case 3:
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@@ -617,6 +622,14 @@ static void serial_pre_save(void *opaque)
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     s->fcr_vmstate = s->fcr;
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 }
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+static int serial_pre_load(void *opaque)
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+{
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+    SerialState *s = opaque;
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+    s->thr_ipending = -1;
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+    s->poll_msl = -1;
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+    return 0;
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+}
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+
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 static int serial_post_load(void *opaque, int version_id)
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 {
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     SerialState *s = opaque;
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@@ -628,17 +641,159 @@ static int serial_post_load(void *opaque, int version_id)
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         s->tsr_retry = MAX_XMIT_RETRY;
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     }
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+    if (s->thr_ipending == -1) {
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+        s->thr_ipending = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
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+    }
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+    s->last_break_enable = (s->lcr >> 6) & 1;
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     /* Initialize fcr via setter to perform essential side-effects */
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-    serial_ioport_write(s, 0x02, s->fcr_vmstate, 1);
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+    serial_write_fcr(s, s->fcr_vmstate);
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     serial_update_parameters(s);
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     return 0;
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 }
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+static bool serial_thr_ipending_needed(void *opaque)
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+{
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+#if 0
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+    SerialState *s = opaque;
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+    bool expected_value = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
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+    return s->thr_ipending != expected_value;
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+#else
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+    /* for migration compatibility with RHEL <= 7.3 */
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+    return 0;
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+#endif
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+}
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+
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+const VMStateDescription vmstate_serial_thr_ipending = {
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+    .name = "serial/thr_ipending",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_INT32(thr_ipending, SerialState),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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+static bool serial_tsr_needed(void *opaque)
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+{
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+    SerialState *s = (SerialState *)opaque;
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+    return s->tsr_retry != 0;
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+}
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+
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+const VMStateDescription vmstate_serial_tsr = {
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+    .name = "serial/tsr",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_UINT32(tsr_retry, SerialState),
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+        VMSTATE_UINT8(thr, SerialState),
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+        VMSTATE_UINT8(tsr, SerialState),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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+static bool serial_recv_fifo_needed(void *opaque)
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+{
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+    SerialState *s = (SerialState *)opaque;
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+    return !fifo8_is_empty(&s->recv_fifo);
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+
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+}
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+
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+const VMStateDescription vmstate_serial_recv_fifo = {
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+    .name = "serial/recv_fifo",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_STRUCT(recv_fifo, SerialState, 1, vmstate_fifo8, Fifo8),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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+static bool serial_xmit_fifo_needed(void *opaque)
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+{
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+    SerialState *s = (SerialState *)opaque;
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+    return !fifo8_is_empty(&s->xmit_fifo);
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+}
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+
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+const VMStateDescription vmstate_serial_xmit_fifo = {
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+    .name = "serial/xmit_fifo",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_STRUCT(xmit_fifo, SerialState, 1, vmstate_fifo8, Fifo8),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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+static bool serial_fifo_timeout_timer_needed(void *opaque)
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+{
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+#if 0
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+    SerialState *s = (SerialState *)opaque;
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+    return timer_pending(s->fifo_timeout_timer);
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+#else
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+    /* for migration compatibility with RHEL <= 7.3 */
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+    return 0;
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+#endif
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+}
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+
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+const VMStateDescription vmstate_serial_fifo_timeout_timer = {
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+    .name = "serial/fifo_timeout_timer",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_TIMER(fifo_timeout_timer, SerialState),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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+static bool serial_timeout_ipending_needed(void *opaque)
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+{
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+#if 0
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+    SerialState *s = (SerialState *)opaque;
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+    return s->timeout_ipending != 0;
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+#else
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+    /* for migration compatibility with RHEL <= 7.3 */
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+    return 0;
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+#endif
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+}
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+
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+const VMStateDescription vmstate_serial_timeout_ipending = {
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+    .name = "serial/timeout_ipending",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_INT32(timeout_ipending, SerialState),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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+static bool serial_poll_needed(void *opaque)
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+{
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+#if 0
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+    SerialState *s = (SerialState *)opaque;
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+    return s->poll_msl >= 0;
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+#else
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+    /* for migration compatibility with RHEL <= 7.3 */
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+    return 0;
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+#endif
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+}
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+
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+const VMStateDescription vmstate_serial_poll = {
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+    .name = "serial/poll",
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+    .version_id = 1,
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+    .minimum_version_id = 1,
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+    .fields = (VMStateField[]) {
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+        VMSTATE_INT32(poll_msl, SerialState),
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+        VMSTATE_TIMER(modem_status_poll, SerialState),
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+        VMSTATE_END_OF_LIST()
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+    }
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+};
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+
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 const VMStateDescription vmstate_serial = {
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     .name = "serial",
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     .version_id = 3,
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     .minimum_version_id = 2,
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     .pre_save = serial_pre_save,
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+    .pre_load = serial_pre_load,
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     .post_load = serial_post_load,
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     .fields      = (VMStateField []) {
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         VMSTATE_UINT16_V(divider, SerialState, 2),
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@@ -652,6 +807,32 @@ const VMStateDescription vmstate_serial = {
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         VMSTATE_UINT8(scr, SerialState),
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         VMSTATE_UINT8_V(fcr_vmstate, SerialState, 3),
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         VMSTATE_END_OF_LIST()
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+    },
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+    .subsections = (VMStateSubsection[]) {
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+        {
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+            .vmsd = &vmstate_serial_thr_ipending,
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+            .needed = &serial_thr_ipending_needed,
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+        } , {
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+            .vmsd = &vmstate_serial_tsr,
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+            .needed = &serial_tsr_needed,
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+        } , {
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+            .vmsd = &vmstate_serial_recv_fifo,
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+            .needed = &serial_recv_fifo_needed,
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+        } , {
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+            .vmsd = &vmstate_serial_xmit_fifo,
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+            .needed = &serial_xmit_fifo_needed,
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+        } , {
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+            .vmsd = &vmstate_serial_fifo_timeout_timer,
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+            .needed = &serial_fifo_timeout_timer_needed,
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+        } , {
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+            .vmsd = &vmstate_serial_timeout_ipending,
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+            .needed = &serial_timeout_ipending_needed,
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+        } , {
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+            .vmsd = &vmstate_serial_poll,
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+            .needed = &serial_poll_needed,
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+        } , {
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+            /* empty */
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+        }
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     }
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 };
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@@ -678,6 +859,10 @@ static void serial_reset(void *opaque)
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     s->char_transmit_time = (get_ticks_per_sec() / 9600) * 10;
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     s->poll_msl = 0;
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+    s->timeout_ipending = 0;
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+    qemu_del_timer(s->fifo_timeout_timer);
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+    qemu_del_timer(s->modem_status_poll);
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+
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     fifo8_reset(&s->recv_fifo);
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     fifo8_reset(&s->xmit_fifo);
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-- 
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1.8.3.1
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