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From bdad28b11e36f657cb8909e7223a7d8fc0948c2e Mon Sep 17 00:00:00 2001
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From: Thomas Huth <thuth@redhat.com>
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Date: Fri, 29 May 2020 05:53:51 -0400
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Subject: [PATCH 09/42] s390x: Fix cpu normal reset ri clearing
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Thomas Huth <thuth@redhat.com>
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Message-id: <20200529055420.16855-10-thuth@redhat.com>
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Patchwork-id: 97029
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O-Subject: [RHEL-8.3.0 qemu-kvm PATCH v2 09/38] s390x: Fix cpu normal reset ri clearing
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Bugzilla: 1828317
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RH-Acked-by: Claudio Imbrenda <cimbrend@redhat.com>
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RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
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RH-Acked-by: David Hildenbrand <david@redhat.com>
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From: Janosch Frank <frankja@linux.ibm.com>
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As it turns out we need to clear the ri controls and PSW enablement
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bit to be architecture compliant.
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Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
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Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
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Message-Id: <20191203132813.2734-4-frankja@linux.ibm.com>
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Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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(cherry picked from commit e893baee70149896d1e43e341da4d6c614037d5d)
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/s390x/cpu.c | 7 ++++++-
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target/s390x/cpu.h | 7 ++++++-
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2 files changed, 12 insertions(+), 2 deletions(-)
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diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
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index bd39cb54b7..99ea09085a 100644
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--- a/target/s390x/cpu.c
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+++ b/target/s390x/cpu.c
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@@ -100,7 +100,7 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
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case S390_CPU_RESET_INITIAL:
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/* initial reset does not clear everything! */
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memset(&env->start_initial_reset_fields, 0,
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- offsetof(CPUS390XState, end_reset_fields) -
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+ offsetof(CPUS390XState, start_normal_reset_fields) -
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offsetof(CPUS390XState, start_initial_reset_fields));
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/* architectured initial value for Breaking-Event-Address register */
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@@ -123,6 +123,11 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
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&env->fpu_status);
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/* fall through */
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case S390_CPU_RESET_NORMAL:
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+ env->psw.mask &= ~PSW_MASK_RI;
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+ memset(&env->start_normal_reset_fields, 0,
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+ offsetof(CPUS390XState, end_reset_fields) -
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+ offsetof(CPUS390XState, start_normal_reset_fields));
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+
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env->pfault_token = -1UL;
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env->bpbc = false;
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break;
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diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
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index d2af13b345..7e1c18d596 100644
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--- a/target/s390x/cpu.h
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+++ b/target/s390x/cpu.h
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@@ -58,7 +58,6 @@ struct CPUS390XState {
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*/
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uint64_t vregs[32][2] QEMU_ALIGNED(16); /* vector registers */
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uint32_t aregs[16]; /* access registers */
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- uint8_t riccb[64]; /* runtime instrumentation control */
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uint64_t gscb[4]; /* guarded storage control */
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uint64_t etoken; /* etoken */
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uint64_t etoken_extension; /* etoken extension */
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@@ -114,6 +113,10 @@ struct CPUS390XState {
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uint64_t gbea;
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uint64_t pp;
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+ /* Fields up to this point are not cleared by normal CPU reset */
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+ struct {} start_normal_reset_fields;
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+ uint8_t riccb[64]; /* runtime instrumentation control */
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+
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/* Fields up to this point are cleared by a CPU reset */
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struct {} end_reset_fields;
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@@ -252,6 +255,7 @@ extern const VMStateDescription vmstate_s390_cpu;
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#undef PSW_SHIFT_ASC
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#undef PSW_MASK_CC
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#undef PSW_MASK_PM
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+#undef PSW_MASK_RI
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#undef PSW_SHIFT_MASK_PM
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#undef PSW_MASK_64
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#undef PSW_MASK_32
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@@ -273,6 +277,7 @@ extern const VMStateDescription vmstate_s390_cpu;
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#define PSW_MASK_CC 0x0000300000000000ULL
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#define PSW_MASK_PM 0x00000F0000000000ULL
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#define PSW_SHIFT_MASK_PM 40
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+#define PSW_MASK_RI 0x0000008000000000ULL
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#define PSW_MASK_64 0x0000000100000000ULL
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#define PSW_MASK_32 0x0000000080000000ULL
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#define PSW_MASK_ESA_ADDR 0x000000007fffffffULL
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--
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2.27.0
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