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From d625effaaebcc744531947209db5a4ec5aca0b0a Mon Sep 17 00:00:00 2001
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From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
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Date: Fri, 14 Dec 2018 18:20:55 +0000
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Subject: [PATCH 3/5] i386: do not migrate MSR_SMI_COUNT on machine types <2.12
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RH-Author: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Message-id: <20181214182056.20233-2-dgilbert@redhat.com>
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Patchwork-id: 83520
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O-Subject: [RHEL8 qemu-kvm PATCH 1/2] i386: do not migrate MSR_SMI_COUNT on machine types <2.12
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Bugzilla: 1659565
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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From: Paolo Bonzini <pbonzini@redhat.com>
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MSR_SMI_COUNT started being migrated in QEMU 2.12. Do not migrate it
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on older machine types, or the subsection causes a load failure for
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guests that use SMM.
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 990e0be2603511560168e1ad61f68294d951c39e)
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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include/hw/i386/pc.h | 4 ++++
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target/i386/cpu.c | 2 ++
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target/i386/cpu.h | 1 +
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target/i386/machine.c | 2 +-
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4 files changed, 8 insertions(+), 1 deletion(-)
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diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
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index c29176d..dd473ca 100644
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--- a/include/hw/i386/pc.h
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+++ b/include/hw/i386/pc.h
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@@ -311,6 +311,10 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
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#define PC_COMPAT_2_11 \
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HW_COMPAT_2_11 \
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{\
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+ .driver = TYPE_X86_CPU,\
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+ .property = "x-migrate-smi-count",\
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+ .value = "off",\
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+ },{\
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.driver = "Skylake-Server" "-" TYPE_X86_CPU,\
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.property = "clflushopt",\
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.value = "off",\
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index c37cd1e..c979feb 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -5398,6 +5398,8 @@ static Property x86_cpu_properties[] = {
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false),
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DEFINE_PROP_BOOL("vmware-cpuid-freq", X86CPU, vmware_cpuid_freq, true),
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DEFINE_PROP_BOOL("tcg-cpuid", X86CPU, expose_tcg, true),
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+ DEFINE_PROP_BOOL("x-migrate-smi-count", X86CPU, migrate_smi_count,
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+ true),
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/*
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* lecacy_cache defaults to true unless the CPU model provides its
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* own cache information (see x86_cpu_load_def()).
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 58d5430..fb6caf4 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -1369,6 +1369,7 @@ struct X86CPU {
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bool expose_kvm;
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bool expose_tcg;
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bool migratable;
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+ bool migrate_smi_count;
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bool max_features; /* Enable all supported features automatically */
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uint32_t apic_id;
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diff --git a/target/i386/machine.c b/target/i386/machine.c
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index 5e9a19b..2a85c91 100644
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--- a/target/i386/machine.c
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+++ b/target/i386/machine.c
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@@ -400,7 +400,7 @@ static bool msr_smi_count_needed(void *opaque)
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X86CPU *cpu = opaque;
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CPUX86State *env = &cpu->env;
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- return env->msr_smi_count != 0;
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+ return cpu->migrate_smi_count && env->msr_smi_count != 0;
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}
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static const VMStateDescription vmstate_msr_smi_count = {
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--
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1.8.3.1
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