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From a05bef7298f7d30da342ef1a3f6d12bb33377fc5 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Thu, 26 Jul 2018 17:18:55 +0100
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Subject: [PATCH 05/14] i386: Add cache information in X86CPUDefinition
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20180726171904.27418-3-ehabkost@redhat.com>
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Patchwork-id: 81523
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O-Subject: [qemu-kvm RHEL8/virt212 PATCH v2 02/11] i386: Add cache information in X86CPUDefinition
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Bugzilla: 1597739
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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From: Babu Moger <babu.moger@amd.com>
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Add cache information in X86CPUDefinition and CPUX86State.
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Signed-off-by: Babu Moger <babu.moger@amd.com>
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Tested-by: Geoffrey McRae <geoff@hostfission.com>
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Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
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Message-Id: <20180510204148.11687-3-babu.moger@amd.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 6aaeb05492ef668f415324f43e7d875c0f1e90b3)
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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 target/i386/cpu.c | 1 +
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 target/i386/cpu.h | 7 +++++++
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 2 files changed, 8 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 6c57b2f..50af741 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1105,6 +1105,7 @@ struct X86CPUDefinition {
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     int stepping;
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     FeatureWordArray features;
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     const char *model_id;
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+    CPUCaches *cache_info;
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 };
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 static X86CPUDefinition builtin_x86_defs[] = {
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index fa03e2c..372f8b7 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -1096,6 +1096,12 @@ typedef struct CPUCacheInfo {
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 } CPUCacheInfo;
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+typedef struct CPUCaches {
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+        CPUCacheInfo l1d_cache;
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+        CPUCacheInfo l1i_cache;
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+        CPUCacheInfo l2_cache;
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+        CPUCacheInfo l3_cache;
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+} CPUCaches;
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 typedef struct CPUX86State {
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     /* standard registers */
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@@ -1282,6 +1288,7 @@ typedef struct CPUX86State {
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     /* Features that were explicitly enabled/disabled */
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     FeatureWordArray user_features;
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     uint32_t cpuid_model[12];
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+    CPUCaches *cache_info;
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     /* MTRRs */
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     uint64_t mtrr_fixed[11];
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-- 
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1.8.3.1
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