Blame SOURCES/kvm-apic-set-APIC-base-as-part-of-kvm_apic_put.patch

169b9a
From 4142f7546da561898f15169f6e8085167601e878 Mon Sep 17 00:00:00 2001
6e672b
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
169b9a
Date: Tue, 15 May 2018 11:56:34 +0200
169b9a
Subject: [PATCH 08/10] kvm: apic: set APIC base as part of kvm_apic_put
6e672b
6e672b
RH-Author: Dr. David Alan Gilbert <dgilbert@redhat.com>
6e672b
Message-id: <20180515115634.24469-6-dgilbert@redhat.com>
6e672b
Patchwork-id: 80271
6e672b
O-Subject: [RHEL-7.6 qemu-kvm PATCH v2 5/5] kvm: apic: set APIC base as part of kvm_apic_put
169b9a
Bugzilla: 1577680
6e672b
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
6e672b
RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
6e672b
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
6e672b
6e672b
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
6e672b
6e672b
The parsing of KVM_SET_LAPIC's input depends on the current value of the
6e672b
APIC base MSR---which indeed is stored in APICCommonState---but for historical
6e672b
reasons APIC base is set through KVM_SET_SREGS together with cr8 (which is
6e672b
really just the APIC TPR) and the actual "special CPU registers".
6e672b
6e672b
APIC base must now be set before the actual LAPIC registers, so do that
6e672b
in kvm_apic_put.  It will be set again to the same value with KVM_SET_SREGS,
6e672b
but that's not a big issue.
6e672b
6e672b
This only happens since Linux 4.8, which checks for x2apic mode in
6e672b
KVM_SET_LAPIC.  However it's really a QEMU bug; until the recent
6e672b
commit 78d6a05 ("x86/lapic: Load LAPIC state at post_load", 2016-09-13)
6e672b
QEMU was indeed setting APIC base (via KVM_SET_SREGS) before the other
6e672b
LAPIC registers.
6e672b
6e672b
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
6e672b
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
6e672b
(cherry picked from commit f8d9ccf8d5f9f4b7d364100871c4c7303b546de5)
6e672b
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
6e672b
---
6e672b
 hw/i386/kvm/apic.c     | 2 ++
6e672b
 target-i386/kvm.c      | 8 ++++++++
6e672b
 target-i386/kvm_i386.h | 2 ++
6e672b
 3 files changed, 12 insertions(+)
6e672b
6e672b
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
6e672b
index d47d8da..77d2999 100644
6e672b
--- a/hw/i386/kvm/apic.c
6e672b
+++ b/hw/i386/kvm/apic.c
6e672b
@@ -12,6 +12,7 @@
6e672b
 #include "hw/i386/apic_internal.h"
6e672b
 #include "hw/pci/msi.h"
6e672b
 #include "sysemu/kvm.h"
6e672b
+#include "target-i386/kvm_i386.h"
6e672b
 
6e672b
 static inline void kvm_apic_set_reg(struct kvm_lapic_state *kapic,
6e672b
                                     int reg_id, uint32_t val)
6e672b
@@ -127,6 +128,7 @@ static void kvm_apic_put(void *data)
6e672b
     struct kvm_lapic_state kapic;
6e672b
     int ret;
6e672b
 
6e672b
+    kvm_put_apicbase(s->cpu, s->apicbase);
6e672b
     kvm_put_apic_state(s, &kapic);
6e672b
 
6e672b
     ret = kvm_vcpu_ioctl(CPU(s->cpu), KVM_SET_LAPIC, &kapic);
6e672b
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
169b9a
index 71f1573..a1a49d8 100644
6e672b
--- a/target-i386/kvm.c
6e672b
+++ b/target-i386/kvm.c
169b9a
@@ -1152,6 +1152,14 @@ static int kvm_put_one_msr(X86CPU *cpu, int index, uint64_t value)
6e672b
     return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, &msr_data);
6e672b
 }
6e672b
 
6e672b
+void kvm_put_apicbase(X86CPU *cpu, uint64_t value)
6e672b
+{
6e672b
+    int ret;
6e672b
+
6e672b
+    ret = kvm_put_one_msr(cpu, MSR_IA32_APICBASE, value);
6e672b
+    assert(ret == 1);
6e672b
+}
6e672b
+
6e672b
 static int kvm_put_tscdeadline_msr(X86CPU *cpu)
6e672b
 {
6e672b
     CPUX86State *env = &cpu->env;
6e672b
diff --git a/target-i386/kvm_i386.h b/target-i386/kvm_i386.h
6e672b
index 4392ab4..b260b31 100644
6e672b
--- a/target-i386/kvm_i386.h
6e672b
+++ b/target-i386/kvm_i386.h
6e672b
@@ -35,4 +35,6 @@ int kvm_device_msix_set_vector(KVMState *s, uint32_t dev_id, uint32_t vector,
6e672b
 int kvm_device_msix_assign(KVMState *s, uint32_t dev_id);
6e672b
 int kvm_device_msix_deassign(KVMState *s, uint32_t dev_id);
6e672b
 
6e672b
+void kvm_put_apicbase(X86CPU *cpu, uint64_t value);
6e672b
+
6e672b
 #endif
6e672b
-- 
6e672b
1.8.3.1
6e672b