05bba0
From 7ed89963702e6c53c20864b564a5b43712a38ccd Mon Sep 17 00:00:00 2001
05bba0
From: Eduardo Habkost <ehabkost@redhat.com>
05bba0
Date: Thu, 25 Jun 2015 19:31:24 +0200
05bba0
Subject: [PATCH 04/10] kvm: always update the MPX model specific register
05bba0
05bba0
Message-id: <1435260689-9556-4-git-send-email-ehabkost@redhat.com>
05bba0
Patchwork-id: 66501
05bba0
O-Subject: [RHEL-7.2 qemu-kvm PATCH 3/8] kvm: always update the MPX model specific register
05bba0
Bugzilla: 1233350
05bba0
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
05bba0
RH-Acked-by: Bandan Das <bsd@redhat.com>
05bba0
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
05bba0
05bba0
From: Paolo Bonzini <pbonzini@redhat.com>
05bba0
05bba0
The original patch from Liu Jinsong restricted them to reset or full
05bba0
state updates, but that's unnecessary (and wrong) since the BNDCFGS
05bba0
MSR has no side effects.
05bba0
05bba0
Cc: Liu Jinsong <jinsong.liu@intel.com>
05bba0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
05bba0
(cherry picked from commit 439d19f2922ac409ee224bc1e5522cee7009d829)
05bba0
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
05bba0
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
05bba0
05bba0
Conflicts:
05bba0
	target-i386/kvm.c
05bba0
---
05bba0
 target-i386/kvm.c | 6 +++---
05bba0
 1 file changed, 3 insertions(+), 3 deletions(-)
05bba0
05bba0
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
05bba0
index 6d9aa63..bbbbac0 100644
05bba0
--- a/target-i386/kvm.c
05bba0
+++ b/target-i386/kvm.c
05bba0
@@ -1155,6 +1155,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
05bba0
         kvm_msr_entry_set(&msrs[n++], MSR_IA32_MISC_ENABLE,
05bba0
                           env->msr_ia32_misc_enable);
05bba0
     }
05bba0
+    if (has_msr_bndcfgs) {
05bba0
+        kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs);
05bba0
+    }
05bba0
 #ifdef TARGET_X86_64
05bba0
     if (lm_capable_kernel) {
05bba0
         kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
05bba0
@@ -1266,9 +1269,6 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
05bba0
                                   MSR_MTRRphysMask(i), env->mtrr_var[i].mask);
05bba0
             }
05bba0
         }
05bba0
-        if (has_msr_bndcfgs) {
05bba0
-            kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs);
05bba0
-        }
05bba0
     }
05bba0
     if (env->mcg_cap) {
05bba0
         int i;
05bba0
-- 
05bba0
1.8.3.1
05bba0