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From 2d595bc1744fc764ef506fd6ed6555f267d01ea4 Mon Sep 17 00:00:00 2001
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From: Miroslav Rezanina <mrezanin@redhat.com>
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Date: Fri, 19 Oct 2018 13:27:13 +0200
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Subject: Add ppc64 machine types
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Adding changes to add RHEL machine types for ppc64 architecture.
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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Rebase notes (6.2.0 rc1):
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- Fixed rebase conflict relicts
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- Update machine type compat for 6.2 (from MR 66)
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Merged patches (6.1.0):
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- c438c25ac3 redhat: Define pseries-rhel8.5.0 machine type
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- a3995e2eff Remove RHEL 7.0.0 machine type (only ppc64 changes)
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- ad3190a79b Remove RHEL 7.1.0 machine type (only ppc64 changes)
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- 84bbe15d4e Remove RHEL 7.2.0 machine type (only ppc64 changes)
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- 0215eb3356 Remove RHEL 7.3.0 machine types (only ppc64 changes)
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- af69d1ca6e Remove RHEL 7.4.0 machine types (only ppc64 changes)
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- 8f7a74ab78 Remove RHEL 7.5.0 machine types (only ppc64 changes)
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---
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 hw/ppc/spapr.c          | 243 ++++++++++++++++++++++++++++++++++++++++
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 hw/ppc/spapr_cpu_core.c |  13 +++
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 include/hw/ppc/spapr.h  |   4 +
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 target/ppc/compat.c     |  13 ++-
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 target/ppc/cpu.h        |   1 +
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 target/ppc/kvm.c        |  27 +++++
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 target/ppc/kvm_ppc.h    |  13 +++
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 7 files changed, 313 insertions(+), 1 deletion(-)
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diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
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index 3b5fd749be..f4bb5f15f0 100644
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--- a/hw/ppc/spapr.c
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+++ b/hw/ppc/spapr.c
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@@ -1593,6 +1593,9 @@ static void spapr_machine_reset(MachineState *machine)
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     pef_kvm_reset(machine->cgs, &error_fatal);
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     spapr_caps_apply(spapr);
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+    if (spapr->svm_allowed) {
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+        kvmppc_svm_allow(&error_fatal);
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+    }
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     first_ppc_cpu = POWERPC_CPU(first_cpu);
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     if (kvm_enabled() && kvmppc_has_cap_mmu_radix() &&
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@@ -3288,6 +3291,20 @@ static void spapr_set_host_serial(Object *obj, const char *value, Error **errp)
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     spapr->host_serial = g_strdup(value);
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 }
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+static bool spapr_get_svm_allowed(Object *obj, Error **errp)
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+{
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+    SpaprMachineState *spapr = SPAPR_MACHINE(obj);
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+
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+    return spapr->svm_allowed;
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+}
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+
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+static void spapr_set_svm_allowed(Object *obj, bool value, Error **errp)
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+{
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+    SpaprMachineState *spapr = SPAPR_MACHINE(obj);
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+
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+    spapr->svm_allowed = value;
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+}
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+
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 static void spapr_instance_init(Object *obj)
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 {
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     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
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@@ -3366,6 +3383,12 @@ static void spapr_instance_init(Object *obj)
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         spapr_get_host_serial, spapr_set_host_serial);
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     object_property_set_description(obj, "host-serial",
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         "Host serial number to advertise in guest device tree");
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+    object_property_add_bool(obj, "x-svm-allowed",
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+                            spapr_get_svm_allowed,
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+                            spapr_set_svm_allowed);
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+    object_property_set_description(obj, "x-svm-allowed",
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+                                    "Allow the guest to become a Secure Guest"
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+                                    " (experimental only)");
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 }
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 static void spapr_machine_finalizefn(Object *obj)
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@@ -4614,6 +4637,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
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     vmc->client_architecture_support = spapr_vof_client_architecture_support;
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     vmc->quiesce = spapr_vof_quiesce;
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     vmc->setprop = spapr_vof_setprop;
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+    smc->has_power9_support = true;
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 }
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 static const TypeInfo spapr_machine_info = {
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@@ -4665,6 +4689,7 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
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     }                                                                \
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     type_init(spapr_machine_register_##suffix)
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 /*
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  * pseries-6.2
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  */
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@@ -4781,6 +4806,7 @@ static void spapr_machine_4_1_class_options(MachineClass *mc)
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 }
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 DEFINE_SPAPR_MACHINE(4_1, "4.1", false);
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+#endif
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 /*
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  * pseries-4.0
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@@ -4800,6 +4826,8 @@ static bool phb_placement_4_0(SpaprMachineState *spapr, uint32_t index,
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     *nv2atsd = 0;
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     return true;
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 }
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+
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 static void spapr_machine_4_0_class_options(MachineClass *mc)
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 {
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     SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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@@ -5127,6 +5155,221 @@ static void spapr_machine_2_1_class_options(MachineClass *mc)
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     compat_props_add(mc->compat_props, hw_compat_2_1, hw_compat_2_1_len);
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 }
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 DEFINE_SPAPR_MACHINE(2_1, "2.1", false);
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+#endif
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+
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+static void spapr_machine_rhel_default_class_options(MachineClass *mc)
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+{
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+    /*
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+     * Defaults for the latest behaviour inherited from the base class
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+     * can be overriden here for all pseries-rhel* machines.
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+     */
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+
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+    /* Maximum supported VCPU count */
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+    mc->max_cpus = 384;
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+}
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+
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+/*
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+ * pseries-rhel8.5.0
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+ * like pseries-6.0
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+ */
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+
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+static void spapr_machine_rhel850_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+
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+    /* The default machine type must apply the RHEL specific defaults */
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+    spapr_machine_rhel_default_class_options(mc);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_8_5,
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+                     hw_compat_rhel_8_5_len);
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+    smc->pre_6_2_numa_affinity = true;
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+    mc->smp_props.prefer_sockets = true;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel850, "rhel8.5.0", true);
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+
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+/*
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+ * pseries-rhel8.4.0
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+ * like pseries-5.2
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+ */
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+
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+static void spapr_machine_rhel840_class_options(MachineClass *mc)
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+{
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+    spapr_machine_rhel850_class_options(mc);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_8_4,
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+                     hw_compat_rhel_8_4_len);
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel840, "rhel8.4.0", false);
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+
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+/*
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+ * pseries-rhel8.3.0
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+ * like pseries-5.1
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+ */
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+
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+static void spapr_machine_rhel830_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+
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+    spapr_machine_rhel840_class_options(mc);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_8_3,
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+                     hw_compat_rhel_8_3_len);
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+
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+    /* from pseries-5.1 */
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+    smc->pre_5_2_numa_associativity = true;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel830, "rhel8.3.0", false);
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+
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+/*
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+ * pseries-rhel8.2.0
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+ * like pseries-4.2 + pseries-5.0
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+ * except SPAPR_CAP_CCF_ASSIST that has been backported to pseries-rhel8.1.0
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+ */
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+
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+static void spapr_machine_rhel820_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+    /* from pseries-5.0 */
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+    static GlobalProperty compat[] = {
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+        { TYPE_SPAPR_PCI_HOST_BRIDGE, "pre-5.1-associativity", "on" },
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+    };
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+
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+    spapr_machine_rhel830_class_options(mc);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_8_2,
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+                     hw_compat_rhel_8_2_len);
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+    compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
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+
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+    /* from pseries-4.2 */
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+    smc->default_caps.caps[SPAPR_CAP_FWNMI] = SPAPR_CAP_OFF;
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+    smc->rma_limit = 16 * GiB;
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+    mc->nvdimm_supported = false;
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+
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+    /* from pseries-5.0 */
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+    mc->numa_mem_supported = true;
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+    smc->pre_5_1_assoc_refpoints = true;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel820, "rhel8.2.0", false);
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+
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+/*
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+ * pseries-rhel8.1.0
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+ * like pseries-4.1
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+ */
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+
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+static void spapr_machine_rhel810_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+    static GlobalProperty compat[] = {
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+        /* Only allow 4kiB and 64kiB IOMMU pagesizes */
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+        { TYPE_SPAPR_PCI_HOST_BRIDGE, "pgsz", "0x11000" },
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+    };
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+
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+    spapr_machine_rhel820_class_options(mc);
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+
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+    /* from pseries-4.1 */
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+    smc->linux_pci_probe = false;
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+    smc->smp_threads_vsmt = false;
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+    compat_props_add(mc->compat_props, hw_compat_rhel_8_1,
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+                     hw_compat_rhel_8_1_len);
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+    compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
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+
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+    /* from pseries-4.2 */
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+    smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_OFF;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel810, "rhel8.1.0", false);
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+
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+/*
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+ * pseries-rhel8.0.0
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+ * like pseries-3.1 and pseries-4.0
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+ * except SPAPR_CAP_CFPC, SPAPR_CAP_SBBC and SPAPR_CAP_IBS
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+ * that have been backported to pseries-rhel8.0.0
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+ */
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+
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+static void spapr_machine_rhel800_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+
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+    spapr_machine_rhel810_class_options(mc);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_8_0,
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+                     hw_compat_rhel_8_0_len);
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+
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+    /* pseries-4.0 */
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+    smc->phb_placement = phb_placement_4_0;
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+    smc->irq = &spapr_irq_xics;
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+    smc->pre_4_1_migration = true;
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+
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+    /* pseries-3.1 */
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+    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
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+    smc->update_dt_enabled = false;
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+    smc->dr_phb_enabled = false;
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+    smc->broken_host_serial_model = true;
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+    smc->default_caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel800, "rhel8.0.0", false);
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+
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+/*
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+ * pseries-rhel7.6.0
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+ * like spapr_compat_2_12 and spapr_compat_3_0
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+ * spapr_compat_0 is empty
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+ */
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+GlobalProperty spapr_compat_rhel7_6[] = {
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+    { TYPE_POWERPC_CPU, "pre-3.0-migration", "on" },
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+    { TYPE_SPAPR_CPU_CORE, "pre-3.0-migration", "on" },
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+};
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+const size_t spapr_compat_rhel7_6_len = G_N_ELEMENTS(spapr_compat_rhel7_6);
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+
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+
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+static void spapr_machine_rhel760_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+
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+    spapr_machine_rhel800_class_options(mc);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_7_6, hw_compat_rhel_7_6_len);
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+    compat_props_add(mc->compat_props, spapr_compat_rhel7_6, spapr_compat_rhel7_6_len);
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+
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+    /* from spapr_machine_3_0_class_options() */
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+    smc->legacy_irq_allocation = true;
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+    smc->nr_xirqs = 0x400;
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+    smc->irq = &spapr_irq_xics_legacy;
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+
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+    /* from spapr_machine_2_12_class_options() */
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+    /* We depend on kvm_enabled() to choose a default value for the
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+     * hpt-max-page-size capability. Of course we can't do it here
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+     * because this is too early and the HW accelerator isn't initialzed
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+     * yet. Postpone this to machine init (see default_caps_with_cpu()).
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+     */
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+    smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = 0;
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+
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+    /* SPAPR_CAP_WORKAROUND enabled in pseries-rhel800 by
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+     * f21757edc554
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+     * "Enable mitigations by default for pseries-4.0 machine type")
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+     */
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+    smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
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+    smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
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+    smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel760, "rhel7.6.0", false);
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+
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+/*
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+ * pseries-rhel7.6.0-sxxm
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+ *
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+ * pseries-rhel7.6.0 with speculative execution exploit mitigations enabled by default
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+ */
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+
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+static void spapr_machine_rhel760sxxm_class_options(MachineClass *mc)
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+{
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+    SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
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+
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+    spapr_machine_rhel760_class_options(mc);
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+    smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_WORKAROUND;
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+    smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_WORKAROUND;
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+    smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_FIXED_CCD;
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+}
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+
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+DEFINE_SPAPR_MACHINE(rhel760sxxm, "rhel7.6.0-sxxm", false);
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 static void spapr_machine_register_types(void)
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 {
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diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
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index 8ba34f6a1d..78eca1c04a 100644
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--- a/hw/ppc/spapr_cpu_core.c
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+++ b/hw/ppc/spapr_cpu_core.c
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@@ -24,6 +24,7 @@
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 #include "sysemu/reset.h"
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 #include "sysemu/hw_accel.h"
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 #include "qemu/error-report.h"
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+#include "cpu-models.h"
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 static void spapr_reset_vcpu(PowerPCCPU *cpu)
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 {
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@@ -250,6 +251,7 @@ static bool spapr_realize_vcpu(PowerPCCPU *cpu, SpaprMachineState *spapr,
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 {
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     CPUPPCState *env = &cpu->env;
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     CPUState *cs = CPU(cpu);
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+    SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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     if (!qdev_realize(DEVICE(cpu), NULL, errp)) {
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         return false;
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@@ -261,6 +263,17 @@ static bool spapr_realize_vcpu(PowerPCCPU *cpu, SpaprMachineState *spapr,
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     cpu_ppc_set_vhyp(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
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     kvmppc_set_papr(cpu);
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+    if (!smc->has_power9_support &&
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+        (((spapr->max_compat_pvr &&
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+           ppc_compat_cmp(spapr->max_compat_pvr,
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+                          CPU_POWERPC_LOGICAL_3_00) >= 0)) ||
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+          (!spapr->max_compat_pvr &&
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+           ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 0)))) {
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+        error_set(errp, ERROR_CLASS_DEVICE_NOT_FOUND,
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+                  "POWER9 CPU is not supported by this machine class");
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+        return false;
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+    }
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+
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     if (spapr_irq_cpu_intc_create(spapr, cpu, errp) < 0) {
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         qdev_unrealize(DEVICE(cpu));
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         return false;
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diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
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index ee7504b976..fcd5bf9302 100644
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--- a/include/hw/ppc/spapr.h
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+++ b/include/hw/ppc/spapr.h
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@@ -154,6 +154,7 @@ struct SpaprMachineClass {
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     bool pre_5_2_numa_associativity;
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     bool pre_6_2_numa_affinity;
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+    bool has_power9_support;
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     bool (*phb_placement)(SpaprMachineState *spapr, uint32_t index,
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                           uint64_t *buid, hwaddr *pio,
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                           hwaddr *mmio32, hwaddr *mmio64,
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@@ -238,6 +239,9 @@ struct SpaprMachineState {
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     /* Set by -boot */
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     char *boot_device;
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+    /* Secure Guest support via x-svm-allowed */
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+    bool svm_allowed;
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+
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     /*< public >*/
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     char *kvm_type;
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     char *host_model;
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diff --git a/target/ppc/compat.c b/target/ppc/compat.c
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index 7949a24f5a..f207a9ba01 100644
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--- a/target/ppc/compat.c
a83cc2
+++ b/target/ppc/compat.c
a83cc2
@@ -114,8 +114,19 @@ static const CompatInfo *compat_by_pvr(uint32_t pvr)
a83cc2
     return NULL;
a83cc2
 }
a83cc2
 
a83cc2
+long ppc_compat_cmp(uint32_t pvr1, uint32_t pvr2)
a83cc2
+{
a83cc2
+    const CompatInfo *compat1 = compat_by_pvr(pvr1);
a83cc2
+    const CompatInfo *compat2 = compat_by_pvr(pvr2);
a83cc2
+
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+    g_assert(compat1);
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+    g_assert(compat2);
a83cc2
+
a83cc2
+    return compat1 - compat2;
a83cc2
+}
a83cc2
+
a83cc2
 static bool pcc_compat(PowerPCCPUClass *pcc, uint32_t compat_pvr,
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-                       uint32_t min_compat_pvr, uint32_t max_compat_pvr)
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+                      uint32_t min_compat_pvr, uint32_t max_compat_pvr)
a83cc2
 {
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     const CompatInfo *compat = compat_by_pvr(compat_pvr);
a83cc2
     const CompatInfo *min = compat_by_pvr(min_compat_pvr);
a83cc2
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
b697b4
index e946da5f3a..23e8b76c85 100644
a83cc2
--- a/target/ppc/cpu.h
a83cc2
+++ b/target/ppc/cpu.h
b697b4
@@ -1401,6 +1401,7 @@ static inline int cpu_mmu_index(CPUPPCState *env, bool ifetch)
a83cc2
 
a83cc2
 /* Compatibility modes */
a83cc2
 #if defined(TARGET_PPC64)
a83cc2
+long ppc_compat_cmp(uint32_t pvr1, uint32_t pvr2);
a83cc2
 bool ppc_check_compat(PowerPCCPU *cpu, uint32_t compat_pvr,
a83cc2
                       uint32_t min_compat_pvr, uint32_t max_compat_pvr);
a83cc2
 bool ppc_type_check_compat(const char *cputype, uint32_t compat_pvr,
a83cc2
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
b697b4
index dc93b99189..154888cce5 100644
a83cc2
--- a/target/ppc/kvm.c
a83cc2
+++ b/target/ppc/kvm.c
77609c
@@ -90,6 +90,7 @@ static int cap_ppc_nested_kvm_hv;
a83cc2
 static int cap_large_decr;
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 static int cap_fwnmi;
77609c
 static int cap_rpt_invalidate;
a83cc2
+static int cap_ppc_secure_guest;
a83cc2
 
a83cc2
 static uint32_t debug_inst_opcode;
a83cc2
 
77609c
@@ -137,6 +138,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
a83cc2
     cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT);
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     kvmppc_get_cpu_characteristics(s);
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     cap_ppc_nested_kvm_hv = kvm_vm_check_extension(s, KVM_CAP_PPC_NESTED_HV);
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+    cap_ppc_secure_guest = kvm_vm_check_extension(s, KVM_CAP_PPC_SECURE_GUEST);
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     cap_large_decr = kvmppc_get_dec_bits();
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     cap_fwnmi = kvm_vm_check_extension(s, KVM_CAP_PPC_FWNMI);
a83cc2
     /*
b697b4
@@ -2563,6 +2565,16 @@ int kvmppc_has_cap_rpt_invalidate(void)
b697b4
     return cap_rpt_invalidate;
a83cc2
 }
a83cc2
 
a83cc2
+bool kvmppc_has_cap_secure_guest(void)
a83cc2
+{
a83cc2
+    return !!cap_ppc_secure_guest;
a83cc2
+}
a83cc2
+
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+int kvmppc_enable_cap_secure_guest(void)
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+{
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+    return kvm_vm_enable_cap(kvm_state, KVM_CAP_PPC_SECURE_GUEST, 0, 1);
b697b4
+}
b697b4
+
a83cc2
 PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
b697b4
 {
b697b4
     uint32_t host_pvr = mfpvr();
b697b4
@@ -2959,3 +2971,18 @@ bool kvm_arch_cpu_check_are_resettable(void)
a83cc2
 {
a83cc2
     return true;
a83cc2
 }
a83cc2
+
a83cc2
+void kvmppc_svm_allow(Error **errp)
a83cc2
+{
a83cc2
+    if (!kvm_enabled()) {
a83cc2
+        error_setg(errp, "No PEF support in tcg, try x-svm-allowed=off");
a83cc2
+        return;
a83cc2
+    }
a83cc2
+
a83cc2
+    if (!kvmppc_has_cap_secure_guest()) {
a83cc2
+        error_setg(errp, "KVM implementation does not support secure guests, "
a83cc2
+                   "try x-svm-allowed=off");
a83cc2
+    } else if (kvmppc_enable_cap_secure_guest() < 0) {
a83cc2
+        error_setg(errp, "Error enabling x-svm-allowed, try x-svm-allowed=off");
a83cc2
+    }
a83cc2
+}
a83cc2
diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
77609c
index ee9325bf9a..20dbb95989 100644
a83cc2
--- a/target/ppc/kvm_ppc.h
a83cc2
+++ b/target/ppc/kvm_ppc.h
77609c
@@ -40,6 +40,7 @@ int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
a83cc2
 target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu,
a83cc2
                                      bool radix, bool gtse,
a83cc2
                                      uint64_t proc_tbl);
a83cc2
+void kvmppc_svm_allow(Error **errp);
a83cc2
 #ifndef CONFIG_USER_ONLY
a83cc2
 bool kvmppc_spapr_use_multitce(void);
a83cc2
 int kvmppc_spapr_enable_inkernel_multitce(void);
77609c
@@ -74,6 +75,8 @@ int kvmppc_get_cap_large_decr(void);
a83cc2
 int kvmppc_enable_cap_large_decr(PowerPCCPU *cpu, int enable);
77609c
 int kvmppc_has_cap_rpt_invalidate(void);
a83cc2
 int kvmppc_enable_hwrng(void);
a83cc2
+bool kvmppc_has_cap_secure_guest(void);
a83cc2
+int kvmppc_enable_cap_secure_guest(void);
a83cc2
 int kvmppc_put_books_sregs(PowerPCCPU *cpu);
a83cc2
 PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
a83cc2
 void kvmppc_check_papr_resize_hpt(Error **errp);
77609c
@@ -393,6 +396,16 @@ static inline int kvmppc_has_cap_rpt_invalidate(void)
77609c
     return false;
a83cc2
 }
a83cc2
 
a83cc2
+static inline bool kvmppc_has_cap_secure_guest(void)
a83cc2
+{
a83cc2
+    return false;
a83cc2
+}
a83cc2
+
a83cc2
+static inline int kvmppc_enable_cap_secure_guest(void)
a83cc2
+{
a83cc2
+    return -1;
a83cc2
+}
a83cc2
+
a83cc2
 static inline int kvmppc_enable_hwrng(void)
a83cc2
 {
a83cc2
     return -1;
a83cc2
-- 
a83cc2
2.27.0
a83cc2