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From 8501581c99760ed8a800d0c98eeb17a4bf450366 Mon Sep 17 00:00:00 2001
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From: Miroslav Rezanina <mrezanin@redhat.com>
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Date: Fri, 19 Oct 2018 12:53:31 +0200
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Subject: Add aarch64 machine types
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Adding changes to add RHEL machine types for aarch64 architecture.
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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Rebase notes (6.1.0):
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- Use CONFIG_TPM check when using TPM structures
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- Add support for default_bus_bypass_iommu
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- ea4c0b32d9 arm/virt: Register highmem and gic-version as class properties
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- 895e1fa86a hw/arm/virt: Add 8.5 and 9.0 machine types and remove older ones
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Rebase notes (7.0.0):
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- Added dtb-kaslr-seed option
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- Set no_tcg_lpa2 to true
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Rebase notes (7.1.0 rc0):
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- replace dtb_kaslr_seed by dtb_randomness
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Rebase notes (7.1.0 rc3):
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- Updated dtb_randomness comment
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Rebase notes (7.2.0 rc0):
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- Disabled cortex-a35
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Merged patches (6.2.0):
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- 9a3d4fde0e hw/arm/virt: Remove 9.0 machine type
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- f7d04d6695 hw: arm: virt: Add hw_compat_rhel_8_5 to 8.5 machine type
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Merged patches (7.0.0):
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- 3b82be3dd3 redhat: virt-rhel8.5.0: Update machine type compatibility for QEMU 6.2.0 update
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- c354a86c9b hw/arm/virt: Register "iommu" as a class property
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- c1a2630dc9 hw/arm/virt: Register "its" as a class property
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- 9d8c61dc93 hw/arm/virt: Rename default_bus_bypass_iommu
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- a1d1b6eeb6 hw/arm/virt: Expose the 'RAS' option
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- 47f8fe1b82 hw/arm/virt: Add 9.0 machine type and remove 8.5 one
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- ed2346788f hw/arm/virt: Check no_tcg_its and minor style changes
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Merged patches (7.0.0):
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- f79b31bdef hw/arm/virt: Remove the dtb-kaslr-seed machine option
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- b6fca85f4a hw/arm/virt: Fix missing initialization in instance/class_init()
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Merged patches (7.1.0 rc0):
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- ac97dd4f9f RHEL-only: AArch64: Drop unsupported CPU types
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- e9c0a70664 target/arm: deprecate named CPU models
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Merged patches (7.2.0 rc0):
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- 0be2889fa2 Introduce upstream 7.0 compat changes (only applicable parts)
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---
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 hw/arm/virt.c                  | 237 ++++++++++++++++++++++++++++++++-
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 include/hw/arm/virt.h          |   8 ++
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 target/arm/cpu-qom.h           |   1 +
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 target/arm/cpu.c               |   5 +
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 target/arm/cpu.h               |   2 +
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 target/arm/cpu64.c             |  16 ++-
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 target/arm/cpu_tcg.c           |  12 +-
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 target/arm/helper.c            |   2 +
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 tests/qtest/arm-cpu-features.c |   6 +
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 9 files changed, 277 insertions(+), 12 deletions(-)
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diff --git a/hw/arm/virt.c b/hw/arm/virt.c
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index d633300fdc..dfcab40a73 100644
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--- a/hw/arm/virt.c
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+++ b/hw/arm/virt.c
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@@ -80,6 +80,7 @@
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 #include "hw/char/pl011.h"
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 #include "qemu/guest-random.h"
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
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     static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
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                                                     void *data) \
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@@ -106,7 +107,48 @@
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     DEFINE_VIRT_MACHINE_LATEST(major, minor, true)
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 #define DEFINE_VIRT_MACHINE(major, minor) \
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     DEFINE_VIRT_MACHINE_LATEST(major, minor, false)
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-
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+#endif /* disabled for RHEL */
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+
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+#define DEFINE_RHEL_MACHINE_LATEST(m, n, s, latest)                     \
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+    static void rhel##m##n##s##_virt_class_init(ObjectClass *oc,        \
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+                                                void *data)             \
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+    {                                                                   \
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+        MachineClass *mc = MACHINE_CLASS(oc);                           \
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+        rhel##m##n##s##_virt_options(mc);                               \
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+        mc->desc = "RHEL " # m "." # n "." # s " ARM Virtual Machine";  \
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+        if (latest) {                                                   \
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+            mc->alias = "virt";                                         \
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+            mc->is_default = 1;                                         \
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+        }                                                               \
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+    }                                                                   \
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+    static const TypeInfo rhel##m##n##s##_machvirt_info = {             \
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+        .name = MACHINE_TYPE_NAME("virt-rhel" # m "." # n "." # s),     \
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+        .parent = TYPE_RHEL_MACHINE,                                    \
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+        .class_init = rhel##m##n##s##_virt_class_init,                  \
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+    };                                                                  \
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+    static void rhel##m##n##s##_machvirt_init(void)                     \
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+    {                                                                   \
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+        type_register_static(&rhel##m##n##s##_machvirt_info);           \
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+    }                                                                   \
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+    type_init(rhel##m##n##s##_machvirt_init);
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+
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+#define DEFINE_RHEL_MACHINE_AS_LATEST(major, minor, subminor)   \
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+    DEFINE_RHEL_MACHINE_LATEST(major, minor, subminor, true)
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+#define DEFINE_RHEL_MACHINE(major, minor, subminor)             \
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+    DEFINE_RHEL_MACHINE_LATEST(major, minor, subminor, false)
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+
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+/* This variable is for changes to properties that are RHEL specific,
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+ * different to the current upstream and to be applied to the latest
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+ * machine type.
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+ */
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+GlobalProperty arm_rhel_compat[] = {
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+    {
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+        .driver   = "virtio-net-pci",
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+        .property = "romfile",
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+        .value    = "",
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+    },
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+};
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+const size_t arm_rhel_compat_len = G_N_ELEMENTS(arm_rhel_compat);
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 /* Number of external interrupt lines to configure the GIC with */
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 #define NUM_IRQS 256
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@@ -197,15 +239,19 @@ static const int a15irqmap[] = {
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 };
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 static const char *valid_cpus[] = {
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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     ARM_CPU_TYPE_NAME("cortex-a7"),
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     ARM_CPU_TYPE_NAME("cortex-a15"),
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     ARM_CPU_TYPE_NAME("cortex-a35"),
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     ARM_CPU_TYPE_NAME("cortex-a53"),
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+#endif /* disabled for RHEL */
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     ARM_CPU_TYPE_NAME("cortex-a57"),
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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     ARM_CPU_TYPE_NAME("cortex-a72"),
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     ARM_CPU_TYPE_NAME("cortex-a76"),
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     ARM_CPU_TYPE_NAME("a64fx"),
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     ARM_CPU_TYPE_NAME("neoverse-n1"),
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+#endif /* disabled for RHEL */
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     ARM_CPU_TYPE_NAME("host"),
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     ARM_CPU_TYPE_NAME("max"),
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 };
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@@ -2290,6 +2336,7 @@ static void machvirt_init(MachineState *machine)
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     qemu_add_machine_init_done_notifier(&vms->machine_done);
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 }
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 static bool virt_get_secure(Object *obj, Error **errp)
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 {
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     VirtMachineState *vms = VIRT_MACHINE(obj);
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@@ -2317,6 +2364,7 @@ static void virt_set_virt(Object *obj, bool value, Error **errp)
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     vms->virt = value;
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 }
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+#endif /* disabled for RHEL */
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 static bool virt_get_highmem(Object *obj, Error **errp)
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 {
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@@ -2346,6 +2394,7 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
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     vms->its = value;
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 }
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 static bool virt_get_dtb_randomness(Object *obj, Error **errp)
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 {
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     VirtMachineState *vms = VIRT_MACHINE(obj);
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@@ -2359,6 +2408,7 @@ static void virt_set_dtb_randomness(Object *obj, bool value, Error **errp)
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     vms->dtb_randomness = value;
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 }
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+#endif /* disabled for RHEL */
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 static char *virt_get_oem_id(Object *obj, Error **errp)
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 {
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@@ -2442,6 +2492,7 @@ static void virt_set_ras(Object *obj, bool value, Error **errp)
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     vms->ras = value;
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 }
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 static bool virt_get_mte(Object *obj, Error **errp)
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 {
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     VirtMachineState *vms = VIRT_MACHINE(obj);
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@@ -2455,6 +2506,7 @@ static void virt_set_mte(Object *obj, bool value, Error **errp)
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     vms->mte = value;
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 }
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+#endif /* disabled for RHEL */
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 static char *virt_get_gic_version(Object *obj, Error **errp)
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 {
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@@ -2886,6 +2938,7 @@ static int virt_kvm_type(MachineState *ms, const char *type_str)
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     return fixed_ipa ? 0 : requested_pa_size;
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 }
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+#if 0 /* Disabled for Red Hat Enterprise Linux */
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 static void virt_machine_class_init(ObjectClass *oc, void *data)
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 {
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     MachineClass *mc = MACHINE_CLASS(oc);
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@@ -3294,3 +3347,185 @@ static void virt_machine_2_6_options(MachineClass *mc)
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     vmc->no_pmu = true;
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 }
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 DEFINE_VIRT_MACHINE(2, 6)
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+#endif /* disabled for RHEL */
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+
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+static void rhel_machine_class_init(ObjectClass *oc, void *data)
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+{
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+    MachineClass *mc = MACHINE_CLASS(oc);
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+    HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
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+
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+    mc->family = "virt-rhel-Z";
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+    mc->init = machvirt_init;
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+    /* Maximum supported VCPU count for all virt-rhel* machines */
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+    mc->max_cpus = 384;
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+#ifdef CONFIG_TPM
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+    machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
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+#endif
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+    mc->block_default_type = IF_VIRTIO;
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+    mc->no_cdrom = 1;
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+    mc->pci_allow_0_address = true;
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+    /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */
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+    mc->minimum_page_bits = 12;
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+    mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
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+    mc->cpu_index_to_instance_props = virt_cpu_index_to_props;
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+    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a57");
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+    mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
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+    mc->kvm_type = virt_kvm_type;
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+    assert(!mc->get_hotplug_handler);
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+    mc->get_hotplug_handler = virt_machine_get_hotplug_handler;
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+    hc->pre_plug = virt_machine_device_pre_plug_cb;
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+    hc->plug = virt_machine_device_plug_cb;
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+    hc->unplug_request = virt_machine_device_unplug_request_cb;
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+    hc->unplug = virt_machine_device_unplug_cb;
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+    mc->nvdimm_supported = true;
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+    mc->smp_props.clusters_supported = true;
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+    mc->auto_enable_numa_with_memhp = true;
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+    mc->auto_enable_numa_with_memdev = true;
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+    mc->default_ram_id = "mach-virt.ram";
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+
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+    object_class_property_add(oc, "acpi", "OnOffAuto",
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+        virt_get_acpi, virt_set_acpi,
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+        NULL, NULL);
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+    object_class_property_set_description(oc, "acpi",
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+        "Enable ACPI");
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+
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+    object_class_property_add_bool(oc, "highmem", virt_get_highmem,
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+                                   virt_set_highmem);
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+    object_class_property_set_description(oc, "highmem",
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+                                          "Set on/off to enable/disable using "
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+                                          "physical address space above 32 bits");
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+
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+    object_class_property_add_str(oc, "gic-version", virt_get_gic_version,
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+                                  virt_set_gic_version);
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+    object_class_property_set_description(oc, "gic-version",
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+                                          "Set GIC version. "
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+                                          "Valid values are 2, 3, host and max");
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+
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+    object_class_property_add_str(oc, "iommu", virt_get_iommu, virt_set_iommu);
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+    object_class_property_set_description(oc, "iommu",
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+                                          "Set the IOMMU type. "
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+                                          "Valid values are none and smmuv3");
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+
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+    object_class_property_add_bool(oc, "default-bus-bypass-iommu",
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+                                   virt_get_default_bus_bypass_iommu,
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+                                   virt_set_default_bus_bypass_iommu);
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+    object_class_property_set_description(oc, "default-bus-bypass-iommu",
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+                                          "Set on/off to enable/disable "
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+                                          "bypass_iommu for default root bus");
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+
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+    object_class_property_add_bool(oc, "ras", virt_get_ras,
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+                                   virt_set_ras);
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+    object_class_property_set_description(oc, "ras",
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+                                          "Set on/off to enable/disable reporting host memory errors "
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+                                          "to a KVM guest using ACPI and guest external abort exceptions");
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+
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+    object_class_property_add_bool(oc, "its", virt_get_its,
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+                                   virt_set_its);
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+    object_class_property_set_description(oc, "its",
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+                                          "Set on/off to enable/disable "
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+                                          "ITS instantiation");
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+
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+    object_class_property_add_str(oc, "x-oem-id",
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+                                  virt_get_oem_id,
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+                                  virt_set_oem_id);
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+    object_class_property_set_description(oc, "x-oem-id",
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+                                          "Override the default value of field OEMID "
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+                                          "in ACPI table header."
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+                                          "The string may be up to 6 bytes in size");
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+
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+
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+    object_class_property_add_str(oc, "x-oem-table-id",
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+                                  virt_get_oem_table_id,
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+                                  virt_set_oem_table_id);
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+    object_class_property_set_description(oc, "x-oem-table-id",
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+                                          "Override the default value of field OEM Table ID "
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+                                          "in ACPI table header."
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+                                          "The string may be up to 8 bytes in size");
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+}
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+
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+static void rhel_virt_instance_init(Object *obj)
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+{
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+    VirtMachineState *vms = VIRT_MACHINE(obj);
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+    VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
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+
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+    /* EL3 is disabled by default and non-configurable for RHEL */
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+    vms->secure = false;
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+
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+    /* EL2 is disabled by default and non-configurable for RHEL */
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+    vms->virt = false;
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+
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+    /* High memory is enabled by default */
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+    vms->highmem = true;
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+    vms->gic_version = VIRT_GIC_VERSION_NOSEL;
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+
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+    vms->highmem_ecam = !vmc->no_highmem_ecam;
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+    vms->highmem_mmio = true;
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+    vms->highmem_redists = true;
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+
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+    if (vmc->no_its) {
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+        vms->its = false;
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+    } else {
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+        /* Default allows ITS instantiation */
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+        vms->its = true;
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+
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+        if (vmc->no_tcg_its) {
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+            vms->tcg_its = false;
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+        } else {
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+            vms->tcg_its = true;
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+        }
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+    }
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+
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+    /* Default disallows iommu instantiation */
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+    vms->iommu = VIRT_IOMMU_NONE;
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+
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+    /* The default root bus is attached to iommu by default */
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+    vms->default_bus_bypass_iommu = false;
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+
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+    /* Default disallows RAS instantiation and is non-configurable for RHEL */
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+    vms->ras = false;
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+
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+    /* MTE is disabled by default and non-configurable for RHEL */
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+    vms->mte = false;
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+
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+    /* Supply kaslr-seed and rng-seed by default, non-configurable for RHEL */
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+    vms->dtb_randomness = true;
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+
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+    vms->irqmap = a15irqmap;
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+
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+    virt_flash_create(vms);
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+
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+    vms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
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+    vms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
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+}
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+
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+static const TypeInfo rhel_machine_info = {
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+    .name          = TYPE_RHEL_MACHINE,
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+    .parent        = TYPE_MACHINE,
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+    .abstract      = true,
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+    .instance_size = sizeof(VirtMachineState),
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+    .class_size    = sizeof(VirtMachineClass),
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+    .class_init    = rhel_machine_class_init,
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+    .instance_init = rhel_virt_instance_init,
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+    .interfaces = (InterfaceInfo[]) {
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+         { TYPE_HOTPLUG_HANDLER },
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+         { }
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+    },
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+};
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+
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+static void rhel_machine_init(void)
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+{
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+    type_register_static(&rhel_machine_info);
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+}
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+type_init(rhel_machine_init);
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+
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+static void rhel900_virt_options(MachineClass *mc)
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+{
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+    VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
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+
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+    compat_props_add(mc->compat_props, arm_rhel_compat, arm_rhel_compat_len);
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+    compat_props_add(mc->compat_props, hw_compat_rhel_9_1, hw_compat_rhel_9_1_len);
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+
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+    /* Disable FEAT_LPA2 since old kernels (<= v5.12) don't boot with that feature */
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+    vmc->no_tcg_lpa2 = true;
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+}
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+DEFINE_RHEL_MACHINE_AS_LATEST(9, 0, 0)
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diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
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index 6ec479ca2b..22b54ec510 100644
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--- a/include/hw/arm/virt.h
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+++ b/include/hw/arm/virt.h
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@@ -180,9 +180,17 @@ struct VirtMachineState {
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 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
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+#if 0 /* disabled for Red Hat Enterprise Linux */
a83cc2
 #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
a83cc2
 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
a83cc2
 
a83cc2
+#else
a83cc2
+#define TYPE_RHEL_MACHINE MACHINE_TYPE_NAME("virt-rhel")
a83cc2
+typedef struct VirtMachineClass VirtMachineClass;
a83cc2
+typedef struct VirtMachineState VirtMachineState;
a83cc2
+DECLARE_OBJ_CHECKERS(VirtMachineState, VirtMachineClass, VIRT_MACHINE, TYPE_RHEL_MACHINE)
a83cc2
+#endif
a83cc2
+
a83cc2
 void virt_acpi_setup(VirtMachineState *vms);
a83cc2
 bool virt_is_acpi_enabled(VirtMachineState *vms);
a83cc2
 
7f1c5b
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h
7f1c5b
index 64c44cef2d..82e97249bc 100644
7f1c5b
--- a/target/arm/cpu-qom.h
7f1c5b
+++ b/target/arm/cpu-qom.h
7f1c5b
@@ -35,6 +35,7 @@ typedef struct ARMCPUInfo {
7f1c5b
     const char *name;
7f1c5b
     void (*initfn)(Object *obj);
7f1c5b
     void (*class_init)(ObjectClass *oc, void *data);
7f1c5b
+    const char *deprecation_note;
7f1c5b
 } ARMCPUInfo;
7f1c5b
 
7f1c5b
 void arm_cpu_register(const ARMCPUInfo *info);
7f1c5b
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
7f1c5b
index 38d066c294..a845814bfb 100644
7f1c5b
--- a/target/arm/cpu.c
7f1c5b
+++ b/target/arm/cpu.c
7f1c5b
@@ -2250,8 +2250,13 @@ static void arm_cpu_instance_init(Object *obj)
7f1c5b
 static void cpu_register_class_init(ObjectClass *oc, void *data)
7f1c5b
 {
7f1c5b
     ARMCPUClass *acc = ARM_CPU_CLASS(oc);
7f1c5b
+    CPUClass *cc = CPU_CLASS(oc);
7f1c5b
 
7f1c5b
     acc->info = data;
7f1c5b
+
7f1c5b
+    if (acc->info->deprecation_note) {
7f1c5b
+        cc->deprecation_note = acc->info->deprecation_note;
7f1c5b
+    }
7f1c5b
 }
7f1c5b
 
7f1c5b
 void arm_cpu_register(const ARMCPUInfo *info)
7f1c5b
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
7f1c5b
index 9aeed3c848..f9f504d89e 100644
7f1c5b
--- a/target/arm/cpu.h
7f1c5b
+++ b/target/arm/cpu.h
7f1c5b
@@ -34,6 +34,8 @@
7f1c5b
 #define KVM_HAVE_MCE_INJECTION 1
7f1c5b
 #endif
7f1c5b
 
7f1c5b
+#define RHEL_CPU_DEPRECATION "use 'host' / 'max'"
7f1c5b
+
7f1c5b
 #define EXCP_UDEF            1   /* undefined instruction */
7f1c5b
 #define EXCP_SWI             2   /* software interrupt */
7f1c5b
 #define EXCP_PREFETCH_ABORT  3
7f1c5b
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
7f1c5b
index 3d74f134f5..4b330a52b5 100644
7f1c5b
--- a/target/arm/cpu64.c
7f1c5b
+++ b/target/arm/cpu64.c
7f1c5b
@@ -36,6 +36,7 @@
7f1c5b
 #include "hw/qdev-properties.h"
7f1c5b
 #include "internals.h"
7f1c5b
 
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
 static void aarch64_a35_initfn(Object *obj)
7f1c5b
 {
7f1c5b
     ARMCPU *cpu = ARM_CPU(obj);
7f1c5b
@@ -115,6 +116,7 @@ static void aarch64_a35_initfn(Object *obj)
7f1c5b
     /* These values are the same with A53/A57/A72. */
7f1c5b
     define_cortex_a72_a57_a53_cp_reginfo(cpu);
7f1c5b
 }
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
7f1c5b
 {
7f1c5b
@@ -735,6 +737,7 @@ static void aarch64_a57_initfn(Object *obj)
7f1c5b
     define_cortex_a72_a57_a53_cp_reginfo(cpu);
7f1c5b
 }
7f1c5b
 
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
 static void aarch64_a53_initfn(Object *obj)
7f1c5b
 {
7f1c5b
     ARMCPU *cpu = ARM_CPU(obj);
7f1c5b
@@ -1033,6 +1036,7 @@ static void aarch64_neoverse_n1_initfn(Object *obj)
7f1c5b
     /* From D5.1 AArch64 PMU register summary */
7f1c5b
     cpu->isar.reset_pmcr_el0 = 0x410c3000;
7f1c5b
 }
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
 static void aarch64_host_initfn(Object *obj)
7f1c5b
 {
7f1c5b
@@ -1240,13 +1244,18 @@ static void aarch64_max_initfn(Object *obj)
7f1c5b
 }
7f1c5b
 
7f1c5b
 static const ARMCPUInfo aarch64_cpus[] = {
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
     { .name = "cortex-a35",         .initfn = aarch64_a35_initfn },
7f1c5b
-    { .name = "cortex-a57",         .initfn = aarch64_a57_initfn },
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
+    { .name = "cortex-a57",         .initfn = aarch64_a57_initfn,
7f1c5b
+      .deprecation_note = RHEL_CPU_DEPRECATION },
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
     { .name = "cortex-a53",         .initfn = aarch64_a53_initfn },
7f1c5b
     { .name = "cortex-a72",         .initfn = aarch64_a72_initfn },
7f1c5b
     { .name = "cortex-a76",         .initfn = aarch64_a76_initfn },
7f1c5b
     { .name = "a64fx",              .initfn = aarch64_a64fx_initfn },
7f1c5b
     { .name = "neoverse-n1",        .initfn = aarch64_neoverse_n1_initfn },
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
     { .name = "max",                .initfn = aarch64_max_initfn },
7f1c5b
 #if defined(CONFIG_KVM) || defined(CONFIG_HVF)
7f1c5b
     { .name = "host",               .initfn = aarch64_host_initfn },
7f1c5b
@@ -1318,8 +1327,13 @@ static void aarch64_cpu_instance_init(Object *obj)
7f1c5b
 static void cpu_register_class_init(ObjectClass *oc, void *data)
7f1c5b
 {
7f1c5b
     ARMCPUClass *acc = ARM_CPU_CLASS(oc);
7f1c5b
+    CPUClass *cc = CPU_CLASS(oc);
7f1c5b
 
7f1c5b
     acc->info = data;
7f1c5b
+
7f1c5b
+    if (acc->info->deprecation_note) {
7f1c5b
+        cc->deprecation_note = acc->info->deprecation_note;
7f1c5b
+    }
7f1c5b
 }
7f1c5b
 
7f1c5b
 void aarch64_cpu_register(const ARMCPUInfo *info)
7f1c5b
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
7f1c5b
index a528ff9a3d..053f70e399 100644
7f1c5b
--- a/target/arm/cpu_tcg.c
7f1c5b
+++ b/target/arm/cpu_tcg.c
7f1c5b
@@ -148,10 +148,10 @@ void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu)
7f1c5b
 }
7f1c5b
 #endif /* !CONFIG_USER_ONLY */
7f1c5b
 
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
 /* CPU models. These are not needed for the AArch64 linux-user build. */
7f1c5b
 #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
7f1c5b
 
7f1c5b
-#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
 #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
7f1c5b
 static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
7f1c5b
 {
7f1c5b
@@ -505,7 +505,6 @@ static void cortex_a9_initfn(Object *obj)
7f1c5b
     cpu->isar.reset_pmcr_el0 = 0x41093000;
7f1c5b
     define_arm_cp_regs(cpu, cortexa9_cp_reginfo);
7f1c5b
 }
7f1c5b
-#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
 #ifndef CONFIG_USER_ONLY
7f1c5b
 static uint64_t a15_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
7f1c5b
@@ -530,7 +529,6 @@ static const ARMCPRegInfo cortexa15_cp_reginfo[] = {
7f1c5b
       .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
7f1c5b
 };
7f1c5b
 
7f1c5b
-#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
 static void cortex_a7_initfn(Object *obj)
7f1c5b
 {
7f1c5b
     ARMCPU *cpu = ARM_CPU(obj);
7f1c5b
@@ -579,7 +577,6 @@ static void cortex_a7_initfn(Object *obj)
7f1c5b
     cpu->isar.reset_pmcr_el0 = 0x41072000;
7f1c5b
     define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */
7f1c5b
 }
7f1c5b
-#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
 static void cortex_a15_initfn(Object *obj)
7f1c5b
 {
7f1c5b
@@ -628,7 +625,6 @@ static void cortex_a15_initfn(Object *obj)
7f1c5b
     define_arm_cp_regs(cpu, cortexa15_cp_reginfo);
7f1c5b
 }
7f1c5b
 
7f1c5b
-#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
 static void cortex_m0_initfn(Object *obj)
7f1c5b
 {
7f1c5b
     ARMCPU *cpu = ARM_CPU(obj);
7f1c5b
@@ -1070,7 +1066,6 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
7f1c5b
 
7f1c5b
     cc->gdb_core_xml_file = "arm-m-profile.xml";
7f1c5b
 }
7f1c5b
-#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
 #ifndef TARGET_AARCH64
7f1c5b
 /*
7f1c5b
@@ -1138,7 +1133,6 @@ static void arm_max_initfn(Object *obj)
7f1c5b
 #endif /* !TARGET_AARCH64 */
7f1c5b
 
7f1c5b
 static const ARMCPUInfo arm_tcg_cpus[] = {
7f1c5b
-#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
     { .name = "arm926",      .initfn = arm926_initfn },
7f1c5b
     { .name = "arm946",      .initfn = arm946_initfn },
7f1c5b
     { .name = "arm1026",     .initfn = arm1026_initfn },
7f1c5b
@@ -1154,9 +1148,7 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
7f1c5b
     { .name = "cortex-a7",   .initfn = cortex_a7_initfn },
7f1c5b
     { .name = "cortex-a8",   .initfn = cortex_a8_initfn },
7f1c5b
     { .name = "cortex-a9",   .initfn = cortex_a9_initfn },
7f1c5b
-#endif /* disabled for RHEL */
7f1c5b
     { .name = "cortex-a15",  .initfn = cortex_a15_initfn },
7f1c5b
-#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
     { .name = "cortex-m0",   .initfn = cortex_m0_initfn,
7f1c5b
                              .class_init = arm_v7m_class_init },
7f1c5b
     { .name = "cortex-m3",   .initfn = cortex_m3_initfn,
7f1c5b
@@ -1187,7 +1179,6 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
7f1c5b
     { .name = "pxa270-b1",   .initfn = pxa270b1_initfn },
7f1c5b
     { .name = "pxa270-c0",   .initfn = pxa270c0_initfn },
7f1c5b
     { .name = "pxa270-c5",   .initfn = pxa270c5_initfn },
7f1c5b
-#endif /* disabled for RHEL */
7f1c5b
 #ifndef TARGET_AARCH64
7f1c5b
     { .name = "max",         .initfn = arm_max_initfn },
7f1c5b
 #endif
7f1c5b
@@ -1215,3 +1206,4 @@ static void arm_tcg_cpu_register_types(void)
7f1c5b
 type_init(arm_tcg_cpu_register_types)
7f1c5b
 
7f1c5b
 #endif /* !CONFIG_USER_ONLY || !TARGET_AARCH64 */
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
diff --git a/target/arm/helper.c b/target/arm/helper.c
7f1c5b
index d8c8223ec3..ad9d235773 100644
7f1c5b
--- a/target/arm/helper.c
7f1c5b
+++ b/target/arm/helper.c
7f1c5b
@@ -8476,6 +8476,7 @@ void arm_cpu_list(void)
7f1c5b
 static void arm_cpu_add_definition(gpointer data, gpointer user_data)
7f1c5b
 {
7f1c5b
     ObjectClass *oc = data;
7f1c5b
+    CPUClass *cc = CPU_CLASS(oc);
7f1c5b
     CpuDefinitionInfoList **cpu_list = user_data;
7f1c5b
     CpuDefinitionInfo *info;
7f1c5b
     const char *typename;
7f1c5b
@@ -8485,6 +8486,7 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data)
7f1c5b
     info->name = g_strndup(typename,
7f1c5b
                            strlen(typename) - strlen("-" TYPE_ARM_CPU));
7f1c5b
     info->q_typename = g_strdup(typename);
7f1c5b
+    info->deprecated = !!cc->deprecation_note;
7f1c5b
 
7f1c5b
     QAPI_LIST_PREPEND(*cpu_list, info);
7f1c5b
 }
7f1c5b
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
7f1c5b
index 5a14527386..a3579fc303 100644
7f1c5b
--- a/tests/qtest/arm-cpu-features.c
7f1c5b
+++ b/tests/qtest/arm-cpu-features.c
7f1c5b
@@ -440,8 +440,10 @@ static void test_query_cpu_model_expansion(const void *data)
7f1c5b
     assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL);
7f1c5b
 
7f1c5b
     /* Test expected feature presence/absence for some cpu types */
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
     assert_has_feature_enabled(qts, "cortex-a15", "pmu");
7f1c5b
     assert_has_not_feature(qts, "cortex-a15", "aarch64");
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
     /* Enabling and disabling pmu should always work. */
7f1c5b
     assert_has_feature_enabled(qts, "max", "pmu");
7f1c5b
@@ -458,6 +460,7 @@ static void test_query_cpu_model_expansion(const void *data)
7f1c5b
         assert_has_feature_enabled(qts, "cortex-a57", "pmu");
7f1c5b
         assert_has_feature_enabled(qts, "cortex-a57", "aarch64");
7f1c5b
 
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
         assert_has_feature_enabled(qts, "a64fx", "pmu");
7f1c5b
         assert_has_feature_enabled(qts, "a64fx", "aarch64");
7f1c5b
         /*
7f1c5b
@@ -470,6 +473,7 @@ static void test_query_cpu_model_expansion(const void *data)
7f1c5b
                      "{ 'sve384': true }");
7f1c5b
         assert_error(qts, "a64fx", "cannot enable sve640",
7f1c5b
                      "{ 'sve640': true }");
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
         sve_tests_default(qts, "max");
7f1c5b
         pauth_tests_default(qts, "max");
7f1c5b
@@ -505,9 +509,11 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
7f1c5b
         QDict *resp;
7f1c5b
         char *error;
7f1c5b
 
7f1c5b
+#if 0 /* Disabled for Red Hat Enterprise Linux */
7f1c5b
         assert_error(qts, "cortex-a15",
7f1c5b
             "We cannot guarantee the CPU type 'cortex-a15' works "
7f1c5b
             "with KVM on this host", NULL);
7f1c5b
+#endif /* disabled for RHEL */
7f1c5b
 
7f1c5b
         assert_has_feature_enabled(qts, "host", "aarch64");
7f1c5b
 
a83cc2
-- 
29b115
2.31.1
a83cc2