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From e8388e92e3bb6dbdd69ada6d7939e06e15875eeb Mon Sep 17 00:00:00 2001
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From: Suraj Jitindar Singh <sursingh@redhat.com>
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Date: Tue, 13 Feb 2018 04:12:23 +0100
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Subject: [PATCH 06/15] target/ppc/kvm: Add
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cap_ppc_safe_[cache/bounds_check/indirect_branch]
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RH-Author: Suraj Jitindar Singh <sursingh@redhat.com>
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Message-id: <1518495150-24134-3-git-send-email-sursingh@redhat.com>
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Patchwork-id: 78984
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O-Subject: [RHEL7.5 qemu-kvm-rhev PATCH 2/9] target/ppc/kvm: Add cap_ppc_safe_[cache/bounds_check/indirect_branch]
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Bugzilla: 1532050
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RH-Acked-by: David Gibson <dgibson@redhat.com>
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Thomas Huth <thuth@redhat.com>
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From: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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Add three new kvm capabilities used to represent the level of host support
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for three corresponding workarounds.
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Host support for each of the capabilities is queried through the
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new ioctl KVM_PPC_GET_CPU_CHAR which returns four uint64 quantities. The
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first two, character and behaviour, represent the available
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characteristics of the cpu and the behaviour of the cpu respectively.
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The second two, c_mask and b_mask, represent the mask of known bits for
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the character and beheviour dwords respectively.
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Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
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[dwg: Correct some compile errors due to name change in final kernel
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patch version]
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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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(cherry picked from commit 8acc2ae5e91681ceda3ff4cf946ebf163f6012e9)
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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Conflicts:
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target/ppc/kvm.c
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Minor massage required due to lack of commit downstream:
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2e9c10eb (ppc: spapr: use generic cpu_model parsing)
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1532050
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Signed-off-by: Suraj Jitindar Singh <sursingh@redhat.com>
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---
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include/hw/ppc/spapr.h | 12 +++++++++++
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target/ppc/kvm.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++
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target/ppc/kvm_ppc.h | 18 ++++++++++++++++
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3 files changed, 88 insertions(+)
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diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
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index 7156a70..6090f3d 100644
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--- a/include/hw/ppc/spapr.h
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+++ b/include/hw/ppc/spapr.h
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@@ -297,6 +297,18 @@ struct sPAPRMachineState {
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#define H_DABRX_KERNEL (1ULL<<(63-62))
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#define H_DABRX_USER (1ULL<<(63-63))
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+/* Values for KVM_PPC_GET_CPU_CHAR & H_GET_CPU_CHARACTERISTICS */
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+#define H_CPU_CHAR_SPEC_BAR_ORI31 PPC_BIT(0)
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+#define H_CPU_CHAR_BCCTRL_SERIALISED PPC_BIT(1)
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+#define H_CPU_CHAR_L1D_FLUSH_ORI30 PPC_BIT(2)
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+#define H_CPU_CHAR_L1D_FLUSH_TRIG2 PPC_BIT(3)
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+#define H_CPU_CHAR_L1D_THREAD_PRIV PPC_BIT(4)
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+#define H_CPU_CHAR_HON_BRANCH_HINTS PPC_BIT(5)
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+#define H_CPU_CHAR_THR_RECONF_TRIG PPC_BIT(6)
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+#define H_CPU_BEHAV_FAVOUR_SECURITY PPC_BIT(0)
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+#define H_CPU_BEHAV_L1D_FLUSH_PR PPC_BIT(1)
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+#define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR PPC_BIT(2)
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+
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/* Each control block has to be on a 4K boundary */
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#define H_CB_ALIGNMENT 4096
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diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
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index ce7e2ec..7a7bc3b 100644
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--- a/target/ppc/kvm.c
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+++ b/target/ppc/kvm.c
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@@ -92,6 +92,9 @@ static int cap_mmu_radix;
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static int cap_mmu_hash_v3;
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static int cap_resize_hpt;
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static int cap_ppc_pvr_compat;
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+static int cap_ppc_safe_cache;
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+static int cap_ppc_safe_bounds_check;
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+static int cap_ppc_safe_indirect_branch;
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static uint32_t debug_inst_opcode;
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@@ -124,6 +127,7 @@ static bool kvmppc_is_pr(KVMState *ks)
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}
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static int kvm_ppc_register_host_cpu_type(void);
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+static void kvmppc_get_cpu_characteristics(KVMState *s);
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int kvm_arch_init(MachineState *ms, KVMState *s)
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{
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@@ -150,6 +154,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
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cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX);
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cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3);
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cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT);
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+ kvmppc_get_cpu_characteristics(s);
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/*
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* Note: setting it to false because there is not such capability
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* in KVM at this moment.
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@@ -2473,6 +2478,59 @@ bool kvmppc_has_cap_mmu_hash_v3(void)
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return cap_mmu_hash_v3;
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}
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+static void kvmppc_get_cpu_characteristics(KVMState *s)
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+{
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+ struct kvm_ppc_cpu_char c;
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+ int ret;
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+
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+ /* Assume broken */
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+ cap_ppc_safe_cache = 0;
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+ cap_ppc_safe_bounds_check = 0;
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+ cap_ppc_safe_indirect_branch = 0;
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+
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+ ret = kvm_vm_check_extension(s, KVM_CAP_PPC_GET_CPU_CHAR);
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+ if (!ret) {
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+ return;
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+ }
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+ ret = kvm_vm_ioctl(s, KVM_PPC_GET_CPU_CHAR, &c);
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+ if (ret < 0) {
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+ return;
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+ }
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+ /* Parse and set cap_ppc_safe_cache */
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+ if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_L1D_FLUSH_PR) {
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+ cap_ppc_safe_cache = 2;
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+ } else if ((c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) &&
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+ (c.character & c.character_mask
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+ & (H_CPU_CHAR_L1D_FLUSH_ORI30 | H_CPU_CHAR_L1D_FLUSH_TRIG2))) {
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+ cap_ppc_safe_cache = 1;
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+ }
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+ /* Parse and set cap_ppc_safe_bounds_check */
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+ if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR) {
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+ cap_ppc_safe_bounds_check = 2;
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+ } else if (c.character & c.character_mask & H_CPU_CHAR_SPEC_BAR_ORI31) {
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+ cap_ppc_safe_bounds_check = 1;
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+ }
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+ /* Parse and set cap_ppc_safe_indirect_branch */
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+ if (c.character & H_CPU_CHAR_BCCTRL_SERIALISED) {
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+ cap_ppc_safe_indirect_branch = 2;
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+ }
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+}
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+
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+int kvmppc_get_cap_safe_cache(void)
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+{
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+ return cap_ppc_safe_cache;
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+}
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+
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+int kvmppc_get_cap_safe_bounds_check(void)
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+{
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+ return cap_ppc_safe_bounds_check;
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+}
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+
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+int kvmppc_get_cap_safe_indirect_branch(void)
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+{
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+ return cap_ppc_safe_indirect_branch;
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+}
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+
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PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
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{
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uint32_t host_pvr = mfpvr();
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diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
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index e6711fc..9da92a9 100644
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--- a/target/ppc/kvm_ppc.h
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+++ b/target/ppc/kvm_ppc.h
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@@ -62,6 +62,9 @@ bool kvmppc_has_cap_fixup_hcalls(void);
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bool kvmppc_has_cap_htm(void);
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bool kvmppc_has_cap_mmu_radix(void);
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bool kvmppc_has_cap_mmu_hash_v3(void);
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+int kvmppc_get_cap_safe_cache(void);
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+int kvmppc_get_cap_safe_bounds_check(void);
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+int kvmppc_get_cap_safe_indirect_branch(void);
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int kvmppc_enable_hwrng(void);
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int kvmppc_put_books_sregs(PowerPCCPU *cpu);
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PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
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@@ -299,6 +302,21 @@ static inline bool kvmppc_has_cap_mmu_hash_v3(void)
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return false;
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}
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+static inline int kvmppc_get_cap_safe_cache(void)
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+{
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+ return 0;
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+}
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+
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+static inline int kvmppc_get_cap_safe_bounds_check(void)
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+{
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+ return 0;
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+}
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+
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+static inline int kvmppc_get_cap_safe_indirect_branch(void)
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+{
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+ return 0;
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+}
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+
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static inline int kvmppc_enable_hwrng(void)
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{
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return -1;
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--
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1.8.3.1
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