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From 9d53600d84c407efde9e186b814badca245cc6ab Mon Sep 17 00:00:00 2001
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From: Suraj Jitindar Singh <sursingh@redhat.com>
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Date: Thu, 21 Jun 2018 06:56:48 +0200
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Subject: [PATCH 53/54] target/ppc: Don't require private l1d cache on POWER8
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for cap_ppc_safe_cache
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RH-Author: Suraj Jitindar Singh <sursingh@redhat.com>
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Message-id: <1529564209-30369-3-git-send-email-sursingh@redhat.com>
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Patchwork-id: 80930
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O-Subject: [RHEL-7.6 qemu-kvm-rhev PATCH 2/3] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache
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Bugzilla: 1560847
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: David Gibson <dgibson@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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From: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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For cap_ppc_safe_cache to be set to workaround, we require both a l1d
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cache flush instruction and private l1d cache.
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On POWER8 don't require private l1d cache. This means a guest on a
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POWER8 machine can make use of the cache flush workarounds.
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Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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(cherry picked from commit 072f416a53ead5211c987cb2068ee9dbd7ba06cc)
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1560847
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Signed-off-by: Suraj Jitindar Singh <sursingh@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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target/ppc/kvm.c | 19 ++++++++++++++++++-
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1 file changed, 18 insertions(+), 1 deletion(-)
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diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
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index d787032..192c40d 100644
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--- a/target/ppc/kvm.c
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+++ b/target/ppc/kvm.c
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@@ -2461,11 +2461,28 @@ bool kvmppc_has_cap_mmu_hash_v3(void)
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return cap_mmu_hash_v3;
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}
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+static bool kvmppc_power8_host(void)
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+{
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+ bool ret = false;
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+#ifdef TARGET_PPC64
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+ {
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+ uint32_t base_pvr = CPU_POWERPC_POWER_SERVER_MASK & mfpvr();
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+ ret = (base_pvr == CPU_POWERPC_POWER8E_BASE) ||
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+ (base_pvr == CPU_POWERPC_POWER8NVL_BASE) ||
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+ (base_pvr == CPU_POWERPC_POWER8_BASE);
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+ }
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+#endif /* TARGET_PPC64 */
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+ return ret;
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+}
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+
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static int parse_cap_ppc_safe_cache(struct kvm_ppc_cpu_char c)
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{
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+ bool l1d_thread_priv_req = !kvmppc_power8_host();
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+
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if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_L1D_FLUSH_PR) {
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return 2;
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- } else if ((c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) &&
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+ } else if ((!l1d_thread_priv_req ||
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+ c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) &&
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(c.character & c.character_mask
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& (H_CPU_CHAR_L1D_FLUSH_ORI30 | H_CPU_CHAR_L1D_FLUSH_TRIG2))) {
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return 1;
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--
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1.8.3.1
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