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From 836c2251308bb9a3a8355e09c2d89c53526aa898 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Mon, 17 Feb 2020 16:23:21 -0500
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Subject: [PATCH 06/12] target/i386: fix TCG UCODE_REV access
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Paolo Bonzini <pbonzini@redhat.com>
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Message-id: <20200217162323.2572-5-pbonzini@redhat.com>
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Patchwork-id: 93906
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O-Subject: [RHEL7.9 qemu-kvm-rhev PATCH 4/6] target/i386: fix TCG UCODE_REV access
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Bugzilla: 1791653
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RH-Acked-by: Maxim Levitsky <mlevitsk@redhat.com>
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RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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This was a very interesting semantic conflict that caused git to move
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the MSR_IA32_UCODE_REV read to helper_wrmsr. Not a big deal, but
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still should be fixed...
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Fixes: 4e45aff398 ("target/i386: add a ucode-rev property", 2020-01-24)
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Message-id: <20200206171022.9289-1-pbonzini@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 9028c75c9d08be303ccc425bfe3d3b23d8f4cac7)
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[RHEL7: replace env_archcpu with x86_env_get_cpu]
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Signed-off-by: Jon Maloy <jmaloy.redhat.com>
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---
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target/i386/misc_helper.c | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/target/i386/misc_helper.c b/target/i386/misc_helper.c
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index f93e61f05d..42daf36764 100644
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--- a/target/i386/misc_helper.c
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+++ b/target/i386/misc_helper.c
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@@ -229,7 +229,6 @@ void helper_rdmsr(CPUX86State *env)
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#else
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void helper_wrmsr(CPUX86State *env)
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{
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- X86CPU *x86_cpu = x86_env_get_cpu(env);
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uint64_t val;
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cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 1, GETPC());
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@@ -372,9 +371,6 @@ void helper_wrmsr(CPUX86State *env)
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env->msr_bndcfgs = val;
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cpu_sync_bndcs_hflags(env);
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break;
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- case MSR_IA32_UCODE_REV:
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- val = x86_cpu->ucode_rev;
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- break;
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default:
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if ((uint32_t)env->regs[R_ECX] >= MSR_MC0_CTL
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&& (uint32_t)env->regs[R_ECX] < MSR_MC0_CTL +
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@@ -393,6 +389,7 @@ void helper_wrmsr(CPUX86State *env)
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void helper_rdmsr(CPUX86State *env)
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{
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+ X86CPU *x86_cpu = x86_env_get_cpu(env);
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uint64_t val;
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cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 0, GETPC());
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@@ -523,6 +520,9 @@ void helper_rdmsr(CPUX86State *env)
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case MSR_IA32_BNDCFGS:
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val = env->msr_bndcfgs;
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break;
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+ case MSR_IA32_UCODE_REV:
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+ val = x86_cpu->ucode_rev;
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+ break;
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default:
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if ((uint32_t)env->regs[R_ECX] >= MSR_MC0_CTL
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&& (uint32_t)env->regs[R_ECX] < MSR_MC0_CTL +
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--
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2.18.2
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