From 384d7ebbde836477e00c19dbe5f68ece3e0fad1e Mon Sep 17 00:00:00 2001

From: Laurent Vivier <lvivier@redhat.com>

Date: Mon, 22 Jan 2018 16:48:48 +0100

Subject: [PATCH 21/21] spapr: fix device tree properties when using

 compatibility mode

RH-Author: Laurent Vivier <lvivier@redhat.com>

Message-id: <20180122164848.20486-1-lvivier@redhat.com>

Patchwork-id: 78694

O-Subject: [RHV7.5 qemu-kvm-rhev PATCH v2] spapr: fix device tree properties when using compatibility mode

Bugzilla: 1535752

RH-Acked-by: Thomas Huth <thuth@redhat.com>

RH-Acked-by: David Gibson <dgibson@redhat.com>

RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>

From: Greg Kurz <groug@kaod.org>

Commit 51f84465dd98 changed the compatility mode setting logic:

- machine reset only sets compatibility mode for the boot CPU

- compatibility mode is set for other CPUs when they are put online

  by the guest with the "start-cpu" RTAS call

This causes a regression for machines started with max-compat-cpu:

the device tree nodes related to secondary CPU cores contain wrong

"cpu-version" and "ibm,pa-features" values, as shown below.

Guest started on a POWER8 host with:

     -smp cores=2 -machine pseries,max-cpu-compat=compat7

                        ibm,pa-features = [18 00 f6 3f c7 c0 80 f0 80 00

 00 00 00 00 00 00 00 00 80 00 80 00 80 00 00 00];

                        cpu-version = <0x4d0200>;

                               ^^^

                        second CPU core

                        ibm,pa-features = <0x600f63f 0xc70080c0>;

                        cpu-version = <0xf000003>;

                               ^^^

                          boot CPU core

The second core is advertised in raw POWER8 mode. This happens because

CAS assumes all CPUs to have the same compatibility mode. Since the

boot CPU already has the requested compatibility mode, the CAS code

does not set it for the secondary one, and exposes the bogus device

tree properties in in the CAS response to the guest.

A similar situation is observed when hot-plugging a CPU core. The

related device tree properties are generated and exposed to guest

with the "ibm,configure-connector" RTAS before "start-cpu" is called.

The CPU core is advertised to the guest in raw mode as well.

It both cases, it boils down to the fact that "start-cpu" happens too

late. This can be fixed globally by propagating the compatibility mode

of the boot CPU to the other CPUs during reset.  For this to work, the

compatibility mode of the boot CPU must be set before the machine code

actually resets all CPUs.

It is not needed to set the compatibility mode in "start-cpu" anymore,

so the code is dropped.

Fixes: 51f84465dd98

Signed-off-by: Greg Kurz <groug@kaod.org>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

(cherry picked from commit 9012a53f067a78022947e18050b145c34a3dc599)

Signed-off-by: Laurent Vivier <lvivier@redhat.com>

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>

Conflicts:

	hw/ppc/spapr_rtas.c

because of missing commit:

9a94ee5bb1 "spapr/rtas: disable the decrementer interrupt when a "

            CPU is unplugged"

---

 hw/ppc/spapr.c          | 18 +++++++++---------

 hw/ppc/spapr_cpu_core.c |  7 +++++++

 hw/ppc/spapr_rtas.c     |  9 ---------

 3 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c

index 2bb3b61..4f1ab14 100644

--- a/hw/ppc/spapr.c

+++ b/hw/ppc/spapr.c

@@ -1442,6 +1442,15 @@ static void ppc_spapr_reset(void)

         spapr_setup_hpt_and_vrma(spapr);

     }

+    /* if this reset wasn't generated by CAS, we should reset our

+     * negotiated options and start from scratch */

+    if (!spapr->cas_reboot) {

+        spapr_ovec_cleanup(spapr->ov5_cas);

+        spapr->ov5_cas = spapr_ovec_new();

+

+        ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal);

+    }

+

     qemu_devices_reset();

     /* DRC reset may cause a device to be unplugged. This will cause troubles

@@ -1462,15 +1471,6 @@ static void ppc_spapr_reset(void)

     rtas_addr = rtas_limit - RTAS_MAX_SIZE;

     fdt_addr = rtas_addr - FDT_MAX_SIZE;

-    /* if this reset wasn't generated by CAS, we should reset our

-     * negotiated options and start from scratch */

-    if (!spapr->cas_reboot) {

-        spapr_ovec_cleanup(spapr->ov5_cas);

-        spapr->ov5_cas = spapr_ovec_new();

-

-        ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal);

-    }

-

     fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size);

     spapr_load_rtas(spapr, fdt, rtas_addr);

diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c

index 30c15d5..fbabe49 100644

--- a/hw/ppc/spapr_cpu_core.c

+++ b/hw/ppc/spapr_cpu_core.c

@@ -101,6 +101,13 @@ static void spapr_cpu_reset(void *opaque)

             exit(1);

         }

     }

+

+    /* Set compatibility mode to match the boot CPU, which was either set

+     * by the machine reset code or by CAS. This should never fail.

+     */

+    if (cs != first_cpu) {

+        ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);

+    }

 }

 static void spapr_cpu_destroy(PowerPCCPU *cpu)

diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c

index 93f09a0..94a2799 100644

--- a/hw/ppc/spapr_rtas.c

+++ b/hw/ppc/spapr_rtas.c

@@ -162,7 +162,6 @@ static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr,

     if (cpu != NULL) {

         CPUState *cs = CPU(cpu);

         CPUPPCState *env = &cpu->env;

-        Error *local_err = NULL;

         if (!cs->halted) {

             rtas_st(rets, 0, RTAS_OUT_HW_ERROR);

@@ -174,14 +173,6 @@ static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr,

          * new cpu enters */

         kvm_cpu_synchronize_state(cs);

-        /* Set compatibility mode to match existing cpus */

-        ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &local_err);

-        if (local_err) {

-            error_report_err(local_err);

-            rtas_st(rets, 0, RTAS_OUT_HW_ERROR);

-            return;

-        }

-

         env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);

         env->nip = start;

         env->gpr[3] = r3;

-- 

1.8.3.1