Blame SOURCES/kvm-pflash-Rename-pflash_t-to-PFlashCFI01-PFlashCFI02.patch

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From d8578dd73598ffaa42a9fc7aeaeec8bcba11df42 Mon Sep 17 00:00:00 2001
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From: Markus Armbruster <armbru@redhat.com>
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Date: Fri, 17 May 2019 06:50:52 +0200
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Subject: [PATCH 25/53] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Markus Armbruster <armbru@redhat.com>
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Message-id: <20190517065120.12028-4-armbru@redhat.com>
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Patchwork-id: 87982
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O-Subject: [RHEL-7.7 qemu-kvm-rhev PATCH v3 03/31] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
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Bugzilla: 1624009
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RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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RH-Acked-by: Thomas Huth <thuth@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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flash.h's incomplete struct pflash_t is completed both in
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pflash_cfi01.c and in pflash_cfi02.c.  The complete types are
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incompatible.  This can hide type errors, such as passing a pflash_t
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created with pflash_cfi02_register() to pflash_cfi01_get_memory().
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Furthermore, POSIX reserves typedef names ending with _t.
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Rename the two structs to PFlashCFI01 and PFlashCFI02.
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Signed-off-by: Markus Armbruster <armbru@redhat.com>
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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Message-Id: <20190308094610.21210-2-armbru@redhat.com>
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(cherry picked from commit 1643406520f8ff6f4cc11062950f5f898b03b573)
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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 hw/arm/vexpress.c        |  8 ++---
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 hw/block/pflash_cfi01.c  | 89 +++++++++++++++++++++++++-----------------------
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 hw/block/pflash_cfi02.c  | 73 ++++++++++++++++++++-------------------
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 hw/i386/pc_sysfw.c       |  2 +-
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 hw/mips/mips_malta.c     |  2 +-
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 hw/xtensa/xtfpga.c       | 10 +++---
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 include/hw/block/flash.h | 51 +++++++++++++++------------
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 7 files changed, 125 insertions(+), 110 deletions(-)
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diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
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index 9fad791..5cca371 100644
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--- a/hw/arm/vexpress.c
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+++ b/hw/arm/vexpress.c
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@@ -501,8 +501,8 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt)
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 /* Open code a private version of pflash registration since we
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  * need to set non-default device width for VExpress platform.
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  */
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-static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
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-                                          DriveInfo *di)
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+static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name,
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+                                             DriveInfo *di)
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 {
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     DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
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@@ -525,7 +525,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
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     qdev_init_nofail(dev);
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     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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-    return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
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+    return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
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 }
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 static void vexpress_common_init(MachineState *machine)
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@@ -537,7 +537,7 @@ static void vexpress_common_init(MachineState *machine)
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     qemu_irq pic[64];
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     uint32_t sys_id;
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     DriveInfo *dinfo;
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-    pflash_t *pflash0;
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+    PFlashCFI01 *pflash0;
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     I2CBus *i2c;
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     ram_addr_t vram_size, sram_size;
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     MemoryRegion *sysmem = get_system_memory();
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diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
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index 2e82840..389bc60 100644
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--- a/hw/block/pflash_cfi01.c
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+++ b/hw/block/pflash_cfi01.c
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@@ -65,12 +65,13 @@ do {                                                        \
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 #define DPRINTF(fmt, ...) do { } while (0)
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 #endif
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-#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01)
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+#define CFI_PFLASH01(obj) \
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+    OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)
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 #define PFLASH_BE          0
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 #define PFLASH_SECURE      1
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-struct pflash_t {
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+struct PFlashCFI01 {
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     /*< private >*/
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     SysBusDevice parent_obj;
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     /*< public >*/
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@@ -109,17 +110,17 @@ static const VMStateDescription vmstate_pflash = {
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     .minimum_version_id = 1,
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     .post_load = pflash_post_load,
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     .fields = (VMStateField[]) {
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-        VMSTATE_UINT8(wcycle, pflash_t),
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-        VMSTATE_UINT8(cmd, pflash_t),
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-        VMSTATE_UINT8(status, pflash_t),
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-        VMSTATE_UINT64(counter, pflash_t),
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+        VMSTATE_UINT8(wcycle, PFlashCFI01),
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+        VMSTATE_UINT8(cmd, PFlashCFI01),
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+        VMSTATE_UINT8(status, PFlashCFI01),
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+        VMSTATE_UINT64(counter, PFlashCFI01),
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         VMSTATE_END_OF_LIST()
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     }
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 };
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 static void pflash_timer (void *opaque)
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 {
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-    pflash_t *pfl = opaque;
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+    PFlashCFI01 *pfl = opaque;
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     DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
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     /* Reset flash */
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@@ -133,7 +134,7 @@ static void pflash_timer (void *opaque)
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  * If this code is called we know we have a device_width set for
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  * this flash.
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  */
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-static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
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+static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset)
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 {
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     int i;
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     uint32_t resp = 0;
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@@ -193,7 +194,7 @@ static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
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 /* Perform a device id query based on the bank width of the flash. */
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-static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
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+static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset)
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 {
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     int i;
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     uint32_t resp;
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@@ -242,7 +243,7 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
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     return resp;
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 }
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-static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
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+static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset,
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                                  int width, int be)
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 {
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     uint8_t *p;
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@@ -288,8 +289,8 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
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     return ret;
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 }
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-static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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-                             int width, int be)
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+static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset,
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+                            int width, int be)
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 {
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     hwaddr boff;
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     uint32_t ret;
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@@ -407,7 +408,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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 }
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 /* update flash content on disk */
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-static void pflash_update(pflash_t *pfl, int offset,
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+static void pflash_update(PFlashCFI01 *pfl, int offset,
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                           int size)
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 {
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     int offset_end;
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@@ -421,7 +422,7 @@ static void pflash_update(pflash_t *pfl, int offset,
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     }
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 }
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-static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
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+static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset,
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                                      uint32_t value, int width, int be)
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 {
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     uint8_t *p = pfl->storage;
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@@ -459,7 +460,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
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 }
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-static void pflash_write(pflash_t *pfl, hwaddr offset,
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+static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
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                          uint32_t value, int width, int be)
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 {
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     uint8_t *p;
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@@ -667,7 +668,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
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 static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_t *value,
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                                               unsigned len, MemTxAttrs attrs)
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 {
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-    pflash_t *pfl = opaque;
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+    PFlashCFI01 *pfl = opaque;
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     bool be = !!(pfl->features & (1 << PFLASH_BE));
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     if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
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@@ -681,7 +682,7 @@ static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_
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 static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, uint64_t value,
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                                                unsigned len, MemTxAttrs attrs)
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 {
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-    pflash_t *pfl = opaque;
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+    PFlashCFI01 *pfl = opaque;
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     bool be = !!(pfl->features & (1 << PFLASH_BE));
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     if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
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@@ -700,7 +701,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
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 static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
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 {
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-    pflash_t *pfl = CFI_PFLASH01(dev);
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+    PFlashCFI01 *pfl = CFI_PFLASH01(dev);
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     uint64_t total_len;
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     int ret;
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     uint64_t blocks_per_device, sector_len_per_device, device_len;
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@@ -877,14 +878,14 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
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 }
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 static Property pflash_cfi01_properties[] = {
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-    DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
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+    DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
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     /* num-blocks is the number of blocks actually visible to the guest,
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      * ie the total size of the device divided by the sector length.
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      * If we're emulating flash devices wired in parallel the actual
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      * number of blocks per indvidual device will differ.
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      */
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-    DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
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-    DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
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+    DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0),
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+    DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0),
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     /* width here is the overall width of this QEMU device in bytes.
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      * The QEMU device may be emulating a number of flash devices
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      * wired up in parallel; the width of each individual flash
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@@ -901,17 +902,17 @@ static Property pflash_cfi01_properties[] = {
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      * 16 bit devices making up a 32 bit wide QEMU device. This
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      * is deprecated for new uses of this device.
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      */
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-    DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
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-    DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
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-    DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_width, 0),
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-    DEFINE_PROP_BIT("big-endian", struct pflash_t, features, PFLASH_BE, 0),
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-    DEFINE_PROP_BIT("secure", struct pflash_t, features, PFLASH_SECURE, 0),
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-    DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
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-    DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
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-    DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
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-    DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
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-    DEFINE_PROP_STRING("name", struct pflash_t, name),
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-    DEFINE_PROP_BOOL("old-multiple-chip-handling", struct pflash_t,
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+    DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0),
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+    DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0),
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+    DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0),
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+    DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0),
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+    DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0),
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+    DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0),
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+    DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0),
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+    DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0),
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+    DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0),
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+    DEFINE_PROP_STRING("name", PFlashCFI01, name),
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+    DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01,
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                      old_multiple_chip_handling, false),
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     DEFINE_PROP_END_OF_LIST(),
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 };
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@@ -930,7 +931,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
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 static const TypeInfo pflash_cfi01_info = {
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     .name           = TYPE_CFI_PFLASH01,
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     .parent         = TYPE_SYS_BUS_DEVICE,
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-    .instance_size  = sizeof(struct pflash_t),
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+    .instance_size  = sizeof(PFlashCFI01),
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     .class_init     = pflash_cfi01_class_init,
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 };
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@@ -941,13 +942,15 @@ static void pflash_cfi01_register_types(void)
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 type_init(pflash_cfi01_register_types)
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-pflash_t *pflash_cfi01_register(hwaddr base,
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-                                DeviceState *qdev, const char *name,
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-                                hwaddr size,
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-                                BlockBackend *blk,
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-                                uint32_t sector_len, int nb_blocs,
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-                                int bank_width, uint16_t id0, uint16_t id1,
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-                                uint16_t id2, uint16_t id3, int be)
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+PFlashCFI01 *pflash_cfi01_register(hwaddr base,
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+                                   DeviceState *qdev, const char *name,
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+                                   hwaddr size,
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+                                   BlockBackend *blk,
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+                                   uint32_t sector_len, int nb_blocs,
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+                                   int bank_width,
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+                                   uint16_t id0, uint16_t id1,
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+                                   uint16_t id2, uint16_t id3,
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+                                   int be)
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 {
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     DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
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@@ -969,14 +972,14 @@ pflash_t *pflash_cfi01_register(hwaddr base,
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     return CFI_PFLASH01(dev);
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 }
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-MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl)
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+MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
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 {
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     return &fl->mem;
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 }
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 static void postload_update_cb(void *opaque, int running, RunState state)
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 {
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-    pflash_t *pfl = opaque;
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+    PFlashCFI01 *pfl = opaque;
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     /* This is called after bdrv_invalidate_cache_all.  */
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     qemu_del_vm_change_state_handler(pfl->vmstate);
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@@ -988,7 +991,7 @@ static void postload_update_cb(void *opaque, int running, RunState state)
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 static int pflash_post_load(void *opaque, int version_id)
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 {
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-    pflash_t *pfl = opaque;
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+    PFlashCFI01 *pfl = opaque;
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     if (!pfl->ro) {
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         pfl->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
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diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
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index cbc3d4d..7fa02d2 100644
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--- a/hw/block/pflash_cfi02.c
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+++ b/hw/block/pflash_cfi02.c
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@@ -57,9 +57,10 @@ do {                                                       \
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 #define PFLASH_LAZY_ROMD_THRESHOLD 42
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-#define CFI_PFLASH02(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH02)
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+#define CFI_PFLASH02(obj) \
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+    OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02)
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-struct pflash_t {
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+struct PFlashCFI02 {
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     /*< private >*/
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     SysBusDevice parent_obj;
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     /*< public >*/
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@@ -101,7 +102,7 @@ struct pflash_t {
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 /*
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  * Set up replicated mappings of the same region.
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  */
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-static void pflash_setup_mappings(pflash_t *pfl)
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+static void pflash_setup_mappings(PFlashCFI02 *pfl)
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 {
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     unsigned i;
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     hwaddr size = memory_region_size(&pfl->orig_mem);
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@@ -115,7 +116,7 @@ static void pflash_setup_mappings(pflash_t *pfl)
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     }
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 }
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-static void pflash_register_memory(pflash_t *pfl, int rom_mode)
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+static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode)
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 {
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     memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode);
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     pfl->rom_mode = rom_mode;
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@@ -123,7 +124,7 @@ static void pflash_register_memory(pflash_t *pfl, int rom_mode)
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 static void pflash_timer (void *opaque)
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 {
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-    pflash_t *pfl = opaque;
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+    PFlashCFI02 *pfl = opaque;
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     DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
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     /* Reset flash */
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@@ -137,8 +138,8 @@ static void pflash_timer (void *opaque)
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     pfl->cmd = 0;
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 }
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-static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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-                             int width, int be)
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+static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr offset,
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+                            int width, int be)
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 {
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     hwaddr boff;
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     uint32_t ret;
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@@ -246,7 +247,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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 }
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 /* update flash content on disk */
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-static void pflash_update(pflash_t *pfl, int offset,
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+static void pflash_update(PFlashCFI02 *pfl, int offset,
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                           int size)
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 {
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     int offset_end;
7711c0
@@ -260,8 +261,8 @@ static void pflash_update(pflash_t *pfl, int offset,
7711c0
     }
7711c0
 }
7711c0
 
7711c0
-static void pflash_write (pflash_t *pfl, hwaddr offset,
7711c0
-                          uint32_t value, int width, int be)
7711c0
+static void pflash_write(PFlashCFI02 *pfl, hwaddr offset,
7711c0
+                         uint32_t value, int width, int be)
7711c0
 {
7711c0
     hwaddr boff;
7711c0
     uint8_t *p;
7711c0
@@ -595,7 +596,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le = {
7711c0
 
7711c0
 static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
7711c0
 {
7711c0
-    pflash_t *pfl = CFI_PFLASH02(dev);
7711c0
+    PFlashCFI02 *pfl = CFI_PFLASH02(dev);
7711c0
     uint32_t chip_len;
7711c0
     int ret;
7711c0
     Error *local_err = NULL;
7711c0
@@ -741,25 +742,25 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
7711c0
 }
7711c0
 
7711c0
 static Property pflash_cfi02_properties[] = {
7711c0
-    DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
7711c0
-    DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
7711c0
-    DEFINE_PROP_UINT32("sector-length", struct pflash_t, sector_len, 0),
7711c0
-    DEFINE_PROP_UINT8("width", struct pflash_t, width, 0),
7711c0
-    DEFINE_PROP_UINT8("mappings", struct pflash_t, mappings, 0),
7711c0
-    DEFINE_PROP_UINT8("big-endian", struct pflash_t, be, 0),
7711c0
-    DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
7711c0
-    DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
7711c0
-    DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
7711c0
-    DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
7711c0
-    DEFINE_PROP_UINT16("unlock-addr0", struct pflash_t, unlock_addr0, 0),
7711c0
-    DEFINE_PROP_UINT16("unlock-addr1", struct pflash_t, unlock_addr1, 0),
7711c0
-    DEFINE_PROP_STRING("name", struct pflash_t, name),
7711c0
+    DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk),
7711c0
+    DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, nb_blocs, 0),
7711c0
+    DEFINE_PROP_UINT32("sector-length", PFlashCFI02, sector_len, 0),
7711c0
+    DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0),
7711c0
+    DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0),
7711c0
+    DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0),
7711c0
+    DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0),
7711c0
+    DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0),
7711c0
+    DEFINE_PROP_UINT16("id2", PFlashCFI02, ident2, 0),
7711c0
+    DEFINE_PROP_UINT16("id3", PFlashCFI02, ident3, 0),
7711c0
+    DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0),
7711c0
+    DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0),
7711c0
+    DEFINE_PROP_STRING("name", PFlashCFI02, name),
7711c0
     DEFINE_PROP_END_OF_LIST(),
7711c0
 };
7711c0
 
7711c0
 static void pflash_cfi02_unrealize(DeviceState *dev, Error **errp)
7711c0
 {
7711c0
-    pflash_t *pfl = CFI_PFLASH02(dev);
7711c0
+    PFlashCFI02 *pfl = CFI_PFLASH02(dev);
7711c0
     timer_del(&pfl->timer);
7711c0
 }
7711c0
 
7711c0
@@ -776,7 +777,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
7711c0
 static const TypeInfo pflash_cfi02_info = {
7711c0
     .name           = TYPE_CFI_PFLASH02,
7711c0
     .parent         = TYPE_SYS_BUS_DEVICE,
7711c0
-    .instance_size  = sizeof(struct pflash_t),
7711c0
+    .instance_size  = sizeof(PFlashCFI02),
7711c0
     .class_init     = pflash_cfi02_class_init,
7711c0
 };
7711c0
 
7711c0
@@ -787,15 +788,17 @@ static void pflash_cfi02_register_types(void)
7711c0
 
7711c0
 type_init(pflash_cfi02_register_types)
7711c0
 
7711c0
-pflash_t *pflash_cfi02_register(hwaddr base,
7711c0
-                                DeviceState *qdev, const char *name,
7711c0
-                                hwaddr size,
7711c0
-                                BlockBackend *blk, uint32_t sector_len,
7711c0
-                                int nb_blocs, int nb_mappings, int width,
7711c0
-                                uint16_t id0, uint16_t id1,
7711c0
-                                uint16_t id2, uint16_t id3,
7711c0
-                                uint16_t unlock_addr0, uint16_t unlock_addr1,
7711c0
-                                int be)
7711c0
+PFlashCFI02 *pflash_cfi02_register(hwaddr base,
7711c0
+                                   DeviceState *qdev, const char *name,
7711c0
+                                   hwaddr size,
7711c0
+                                   BlockBackend *blk,
7711c0
+                                   uint32_t sector_len, int nb_blocs,
7711c0
+                                   int nb_mappings, int width,
7711c0
+                                   uint16_t id0, uint16_t id1,
7711c0
+                                   uint16_t id2, uint16_t id3,
7711c0
+                                   uint16_t unlock_addr0,
7711c0
+                                   uint16_t unlock_addr1,
7711c0
+                                   int be)
7711c0
 {
7711c0
     DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);
7711c0
 
7711c0
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
7711c0
index 2a6de35..d8a98f3 100644
7711c0
--- a/hw/i386/pc_sysfw.c
7711c0
+++ b/hw/i386/pc_sysfw.c
7711c0
@@ -110,7 +110,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
7711c0
     char *fatal_errmsg = NULL;
7711c0
     hwaddr phys_addr = 0x100000000ULL;
7711c0
     int sector_bits, sector_size;
7711c0
-    pflash_t *system_flash;
7711c0
+    PFlashCFI01 *system_flash;
7711c0
     MemoryRegion *flash_mem;
7711c0
     char name[64];
7711c0
     void *flash_ptr;
7711c0
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
7711c0
index f6513a4..88fd7d6 100644
7711c0
--- a/hw/mips/mips_malta.c
7711c0
+++ b/hw/mips/mips_malta.c
7711c0
@@ -986,7 +986,7 @@ void mips_malta_init(MachineState *machine)
7711c0
     const char *kernel_cmdline = machine->kernel_cmdline;
7711c0
     const char *initrd_filename = machine->initrd_filename;
7711c0
     char *filename;
7711c0
-    pflash_t *fl;
7711c0
+    PFlashCFI01 *fl;
7711c0
     MemoryRegion *system_memory = get_system_memory();
7711c0
     MemoryRegion *ram_high = g_new(MemoryRegion, 1);
7711c0
     MemoryRegion *ram_low_preio = g_new(MemoryRegion, 1);
7711c0
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
7711c0
index 70686a2..8f8c0b9 100644
7711c0
--- a/hw/xtensa/xtfpga.c
7711c0
+++ b/hw/xtensa/xtfpga.c
7711c0
@@ -159,9 +159,9 @@ static void xtfpga_net_init(MemoryRegion *address_space,
7711c0
     memory_region_add_subregion(address_space, buffers, ram);
7711c0
 }
7711c0
 
7711c0
-static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
7711c0
-                                   const XtfpgaBoardDesc *board,
7711c0
-                                   DriveInfo *dinfo, int be)
7711c0
+static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space,
7711c0
+                                      const XtfpgaBoardDesc *board,
7711c0
+                                      DriveInfo *dinfo, int be)
7711c0
 {
7711c0
     SysBusDevice *s;
7711c0
     DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
7711c0
@@ -178,7 +178,7 @@ static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
7711c0
     s = SYS_BUS_DEVICE(dev);
7711c0
     memory_region_add_subregion(address_space, board->flash->base,
7711c0
                                 sysbus_mmio_get_region(s, 0));
7711c0
-    return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
7711c0
+    return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
7711c0
 }
7711c0
 
7711c0
 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
7711c0
@@ -224,7 +224,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
7711c0
     CPUXtensaState *env = NULL;
7711c0
     MemoryRegion *system_io;
7711c0
     DriveInfo *dinfo;
7711c0
-    pflash_t *flash = NULL;
7711c0
+    PFlashCFI01 *flash = NULL;
7711c0
     QemuOpts *machine_opts = qemu_get_machine_opts();
7711c0
     const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
7711c0
     const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
7711c0
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
7711c0
index 67c3aa3..51d8f60 100644
7711c0
--- a/include/hw/block/flash.h
7711c0
+++ b/include/hw/block/flash.h
7711c0
@@ -5,32 +5,41 @@
7711c0
 
7711c0
 #include "exec/memory.h"
7711c0
 
7711c0
+/* pflash_cfi01.c */
7711c0
+
7711c0
 #define TYPE_CFI_PFLASH01 "cfi.pflash01"
7711c0
-#define TYPE_CFI_PFLASH02 "cfi.pflash02"
7711c0
 
7711c0
-typedef struct pflash_t pflash_t;
7711c0
+typedef struct PFlashCFI01 PFlashCFI01;
7711c0
 
7711c0
-/* pflash_cfi01.c */
7711c0
-pflash_t *pflash_cfi01_register(hwaddr base,
7711c0
-                                DeviceState *qdev, const char *name,
7711c0
-                                hwaddr size,
7711c0
-                                BlockBackend *blk,
7711c0
-                                uint32_t sector_len, int nb_blocs, int width,
7711c0
-                                uint16_t id0, uint16_t id1,
7711c0
-                                uint16_t id2, uint16_t id3, int be);
7711c0
+PFlashCFI01 *pflash_cfi01_register(hwaddr base,
7711c0
+                                   DeviceState *qdev, const char *name,
7711c0
+                                   hwaddr size,
7711c0
+                                   BlockBackend *blk,
7711c0
+                                   uint32_t sector_len, int nb_blocs,
7711c0
+                                   int width,
7711c0
+                                   uint16_t id0, uint16_t id1,
7711c0
+                                   uint16_t id2, uint16_t id3,
7711c0
+                                   int be);
7711c0
+MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
7711c0
 
7711c0
 /* pflash_cfi02.c */
7711c0
-pflash_t *pflash_cfi02_register(hwaddr base,
7711c0
-                                DeviceState *qdev, const char *name,
7711c0
-                                hwaddr size,
7711c0
-                                BlockBackend *blk, uint32_t sector_len,
7711c0
-                                int nb_blocs, int nb_mappings, int width,
7711c0
-                                uint16_t id0, uint16_t id1,
7711c0
-                                uint16_t id2, uint16_t id3,
7711c0
-                                uint16_t unlock_addr0, uint16_t unlock_addr1,
7711c0
-                                int be);
7711c0
-
7711c0
-MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl);
7711c0
+
7711c0
+#define TYPE_CFI_PFLASH02 "cfi.pflash02"
7711c0
+
7711c0
+typedef struct PFlashCFI02 PFlashCFI02;
7711c0
+
7711c0
+PFlashCFI02 *pflash_cfi02_register(hwaddr base,
7711c0
+                                   DeviceState *qdev, const char *name,
7711c0
+                                   hwaddr size,
7711c0
+                                   BlockBackend *blk,
7711c0
+                                   uint32_t sector_len, int nb_blocs,
7711c0
+                                   int nb_mappings,
7711c0
+                                   int width,
7711c0
+                                   uint16_t id0, uint16_t id1,
7711c0
+                                   uint16_t id2, uint16_t id3,
7711c0
+                                   uint16_t unlock_addr0,
7711c0
+                                   uint16_t unlock_addr1,
7711c0
+                                   int be);
7711c0
 
7711c0
 /* nand.c */
7711c0
 DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id);
7711c0
-- 
7711c0
1.8.3.1
7711c0