|
 |
4a2fec |
From 5657d9d31587d9e5e2e89ec5036af88dccb3a6a7 Mon Sep 17 00:00:00 2001
|
|
|
4a2fec |
From: Ladi Prosek <lprosek@redhat.com>
|
|
|
4a2fec |
Date: Tue, 10 Oct 2017 14:02:48 +0200
|
|
|
4a2fec |
Subject: [PATCH 10/69] i386/kvm: use a switch statement for MSR detection
|
|
|
4a2fec |
|
|
|
4a2fec |
RH-Author: Ladi Prosek <lprosek@redhat.com>
|
|
|
4a2fec |
Message-id: <20171010140251.23801-2-lprosek@redhat.com>
|
|
|
4a2fec |
Patchwork-id: 77059
|
|
|
4a2fec |
O-Subject: [RHV7.5 qemu-kvm-rhev PATCH 1/4] i386/kvm: use a switch statement for MSR detection
|
|
|
4a2fec |
Bugzilla: 1500347
|
|
|
4a2fec |
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
4a2fec |
RH-Acked-by: David Hildenbrand <david@redhat.com>
|
|
|
4a2fec |
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
|
|
|
4a2fec |
|
|
|
4a2fec |
Switch is easier on the eye and might lead to better codegen.
|
|
|
4a2fec |
|
|
|
4a2fec |
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
|
|
|
4a2fec |
Reviewed-by: David Hildenbrand <david@redhat.com>
|
|
|
4a2fec |
Message-Id: <20170807085703.32267-2-lprosek@redhat.com>
|
|
|
4a2fec |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
4a2fec |
(cherry picked from commit 1d268dece4991915c0dd0f882248cbcb22ae8ffc)
|
|
|
4a2fec |
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
|
|
|
4a2fec |
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
|
|
|
4a2fec |
---
|
|
|
4a2fec |
target/i386/kvm.c | 75 +++++++++++++++++++++++--------------------------------
|
|
|
4a2fec |
1 file changed, 31 insertions(+), 44 deletions(-)
|
|
|
4a2fec |
|
|
|
4a2fec |
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
|
|
|
4a2fec |
index 6db7783..b14a0db 100644
|
|
|
4a2fec |
--- a/target/i386/kvm.c
|
|
|
4a2fec |
+++ b/target/i386/kvm.c
|
|
|
4a2fec |
@@ -1081,65 +1081,52 @@ static int kvm_get_supported_msrs(KVMState *s)
|
|
|
4a2fec |
int i;
|
|
|
4a2fec |
|
|
|
4a2fec |
for (i = 0; i < kvm_msr_list->nmsrs; i++) {
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_STAR) {
|
|
|
4a2fec |
+ switch (kvm_msr_list->indices[i]) {
|
|
|
4a2fec |
+ case MSR_STAR:
|
|
|
4a2fec |
has_msr_star = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_VM_HSAVE_PA) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_VM_HSAVE_PA:
|
|
|
4a2fec |
has_msr_hsave_pa = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_TSC_AUX) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_TSC_AUX:
|
|
|
4a2fec |
has_msr_tsc_aux = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_TSC_ADJUST) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_TSC_ADJUST:
|
|
|
4a2fec |
has_msr_tsc_adjust = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_IA32_TSCDEADLINE:
|
|
|
4a2fec |
has_msr_tsc_deadline = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_IA32_SMBASE) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_IA32_SMBASE:
|
|
|
4a2fec |
has_msr_smbase = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_IA32_MISC_ENABLE:
|
|
|
4a2fec |
has_msr_misc_enable = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_IA32_BNDCFGS:
|
|
|
4a2fec |
has_msr_bndcfgs = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == MSR_IA32_XSS) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case MSR_IA32_XSS:
|
|
|
4a2fec |
has_msr_xss = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == HV_X64_MSR_CRASH_CTL) {
|
|
|
4a2fec |
+ break;;
|
|
|
4a2fec |
+ case HV_X64_MSR_CRASH_CTL:
|
|
|
4a2fec |
has_msr_hv_crash = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == HV_X64_MSR_RESET) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case HV_X64_MSR_RESET:
|
|
|
4a2fec |
has_msr_hv_reset = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_INDEX) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case HV_X64_MSR_VP_INDEX:
|
|
|
4a2fec |
has_msr_hv_vpindex = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_RUNTIME) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case HV_X64_MSR_VP_RUNTIME:
|
|
|
4a2fec |
has_msr_hv_runtime = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == HV_X64_MSR_SCONTROL) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case HV_X64_MSR_SCONTROL:
|
|
|
4a2fec |
has_msr_hv_synic = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
- }
|
|
|
4a2fec |
- if (kvm_msr_list->indices[i] == HV_X64_MSR_STIMER0_CONFIG) {
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
+ case HV_X64_MSR_STIMER0_CONFIG:
|
|
|
4a2fec |
has_msr_hv_stimer = true;
|
|
|
4a2fec |
- continue;
|
|
|
4a2fec |
+ break;
|
|
|
4a2fec |
}
|
|
|
4a2fec |
}
|
|
|
4a2fec |
}
|
|
|
4a2fec |
--
|
|
|
4a2fec |
1.8.3.1
|
|
|
4a2fec |
|