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From f710b114f0f1d3e742dddd93158a7592b5fa01a1 Mon Sep 17 00:00:00 2001
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From: John Snow <jsnow@redhat.com>
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Date: Fri, 25 Jan 2019 22:50:01 +0100
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Subject: [PATCH 01/23] exec: move memory access declarations to a common
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header, inline *_phys functions
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: John Snow <jsnow@redhat.com>
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Message-id: <20190125225007.8197-2-jsnow@redhat.com>
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Patchwork-id: 84119
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O-Subject: [RHEL-7.7 qemu-kvm-rhev PATCH v2 1/7] exec: move memory access declarations to a common header, inline *_phys functions
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Bugzilla: 1597482
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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RH-Acked-by: Peter Xu <peterx@redhat.com>
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RH-Acked-by: Stefano Garzarella <sgarzare@redhat.com>
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From: Paolo Bonzini <pbonzini@redhat.com>
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For now, this reduces the text size very slightly due to the newly-added
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inlining:
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text size before: 9301965
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text size after: 9300645
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Later, however, the declarations in include/exec/memory_ldst.inc.h will be
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reused for the MemoryRegionCache slow path functions.
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 4269c82bf72f7e171a03a09b9264b0db76ae0050)
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Signed-off-by: John Snow <jsnow@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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include/exec/cpu-all.h | 75 +++++++-----------
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include/exec/memory.h | 153 +++++++++++-------------------------
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include/exec/memory_ldst.inc.h | 71 +++++++++++++++++
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include/exec/memory_ldst_phys.inc.h | 147 ++++++++++++++++++++++++++++++++++
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memory_ldst.inc.c | 126 -----------------------------
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5 files changed, 292 insertions(+), 280 deletions(-)
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create mode 100644 include/exec/memory_ldst.inc.h
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create mode 100644 include/exec/memory_ldst_phys.inc.h
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diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
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index f4fa94e..173edd1 100644
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--- a/include/exec/cpu-all.h
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+++ b/include/exec/cpu-all.h
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@@ -168,51 +168,36 @@ extern unsigned long reserved_va;
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#else
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#include "exec/hwaddr.h"
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-uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
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-uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
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-uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
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7711c0 |
-void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
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-
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-uint32_t address_space_lduw(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint32_t address_space_ldl(AddressSpace *as, hwaddr addr,
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7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
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-uint64_t address_space_ldq(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stw(AddressSpace *as, hwaddr addr, uint32_t val,
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7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stl(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stq(AddressSpace *as, hwaddr addr, uint64_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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-
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-uint32_t lduw_phys_cached(MemoryRegionCache *cache, hwaddr addr);
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-uint32_t ldl_phys_cached(MemoryRegionCache *cache, hwaddr addr);
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-uint64_t ldq_phys_cached(MemoryRegionCache *cache, hwaddr addr);
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7711c0 |
-void stl_phys_notdirty_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
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7711c0 |
-void stw_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
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7711c0 |
-void stl_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
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7711c0 |
-void stq_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val);
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-
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-uint32_t address_space_lduw_cached(MemoryRegionCache *cache, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint32_t address_space_ldl_cached(MemoryRegionCache *cache, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint64_t address_space_ldq_cached(MemoryRegionCache *cache, hwaddr addr,
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7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stl_notdirty_cached(MemoryRegionCache *cache, hwaddr addr,
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- uint32_t val, MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stw_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stl_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
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7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stq_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val,
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7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
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+
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+#define SUFFIX
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+#define ARG1 as
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+#define ARG1_DECL AddressSpace *as
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+#define TARGET_ENDIANNESS
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+#include "exec/memory_ldst.inc.h"
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+
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+#define SUFFIX _cached
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+#define ARG1 cache
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+#define ARG1_DECL MemoryRegionCache *cache
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+#define TARGET_ENDIANNESS
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+#include "exec/memory_ldst.inc.h"
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+
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+static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
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+{
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+ address_space_stl_notdirty(as, addr, val,
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+ MEMTXATTRS_UNSPECIFIED, NULL);
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+}
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+
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+#define SUFFIX
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+#define ARG1 as
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+#define ARG1_DECL AddressSpace *as
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+#define TARGET_ENDIANNESS
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+#include "exec/memory_ldst_phys.inc.h"
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+
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+#define SUFFIX _cached
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+#define ARG1 cache
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+#define ARG1_DECL MemoryRegionCache *cache
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+#define TARGET_ENDIANNESS
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+#include "exec/memory_ldst_phys.inc.h"
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#endif
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/* page related stuff */
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diff --git a/include/exec/memory.h b/include/exec/memory.h
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index fd2c574..84de0d4 100644
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--- a/include/exec/memory.h
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+++ b/include/exec/memory.h
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@@ -1703,49 +1703,16 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
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* @result: location to write the success/failure of the transaction;
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* if NULL, this information is discarded
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*/
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-uint32_t address_space_ldub(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint32_t address_space_lduw_le(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint32_t address_space_lduw_be(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint32_t address_space_ldl_le(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint32_t address_space_ldl_be(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint64_t address_space_ldq_le(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-uint64_t address_space_ldq_be(AddressSpace *as, hwaddr addr,
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- MemTxAttrs attrs, MemTxResult *result);
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-void address_space_stb(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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-void address_space_stw_le(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stw_be(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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7711c0 |
-void address_space_stl_le(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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-void address_space_stl_be(AddressSpace *as, hwaddr addr, uint32_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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-void address_space_stq_le(AddressSpace *as, hwaddr addr, uint64_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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-void address_space_stq_be(AddressSpace *as, hwaddr addr, uint64_t val,
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- MemTxAttrs attrs, MemTxResult *result);
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-
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-uint32_t ldub_phys(AddressSpace *as, hwaddr addr);
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-uint32_t lduw_le_phys(AddressSpace *as, hwaddr addr);
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-uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr);
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-uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr);
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-uint32_t ldl_be_phys(AddressSpace *as, hwaddr addr);
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-uint64_t ldq_le_phys(AddressSpace *as, hwaddr addr);
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-uint64_t ldq_be_phys(AddressSpace *as, hwaddr addr);
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-void stb_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stw_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stw_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stl_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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-void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val);
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-void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
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+
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+#define SUFFIX
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+#define ARG1 as
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+#define ARG1_DECL AddressSpace *as
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+#include "exec/memory_ldst.inc.h"
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+
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+#define SUFFIX
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+#define ARG1 as
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+#define ARG1_DECL AddressSpace *as
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+#include "exec/memory_ldst_phys.inc.h"
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struct MemoryRegionCache {
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hwaddr xlat;
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@@ -1755,6 +1722,40 @@ struct MemoryRegionCache {
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#define MEMORY_REGION_CACHE_INVALID ((MemoryRegionCache) { .as = NULL })
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+/* address_space_ld*_cached: load from a cached #MemoryRegion
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+ * address_space_st*_cached: store into a cached #MemoryRegion
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+ *
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+ * These functions perform a load or store of the byte, word,
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+ * longword or quad to the specified address. The address is
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+ * a physical address in the AddressSpace, but it must lie within
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+ * a #MemoryRegion that was mapped with address_space_cache_init.
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+ *
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+ * The _le suffixed functions treat the data as little endian;
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+ * _be indicates big endian; no suffix indicates "same endianness
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+ * as guest CPU".
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+ *
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+ * The "guest CPU endianness" accessors are deprecated for use outside
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+ * target-* code; devices should be CPU-agnostic and use either the LE
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+ * or the BE accessors.
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+ *
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+ * @cache: previously initialized #MemoryRegionCache to be accessed
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+ * @addr: address within the address space
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+ * @val: data value, for stores
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+ * @attrs: memory transaction attributes
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+ * @result: location to write the success/failure of the transaction;
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+ * if NULL, this information is discarded
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+ */
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+
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+#define SUFFIX _cached
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+#define ARG1 cache
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+#define ARG1_DECL MemoryRegionCache *cache
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+#include "exec/memory_ldst.inc.h"
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+
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+#define SUFFIX _cached
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+#define ARG1 cache
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+#define ARG1_DECL MemoryRegionCache *cache
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+#include "exec/memory_ldst_phys.inc.h"
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+
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/* address_space_cache_init: prepare for repeated access to a physical
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* memory region
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*
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@@ -1799,72 +1800,6 @@ void address_space_cache_invalidate(MemoryRegionCache *cache,
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*/
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void address_space_cache_destroy(MemoryRegionCache *cache);
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-/* address_space_ld*_cached: load from a cached #MemoryRegion
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- * address_space_st*_cached: store into a cached #MemoryRegion
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- *
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- * These functions perform a load or store of the byte, word,
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- * longword or quad to the specified address. The address is
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- * a physical address in the AddressSpace, but it must lie within
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- * a #MemoryRegion that was mapped with address_space_cache_init.
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- *
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- * The _le suffixed functions treat the data as little endian;
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- * _be indicates big endian; no suffix indicates "same endianness
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- * as guest CPU".
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- *
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- * The "guest CPU endianness" accessors are deprecated for use outside
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- * target-* code; devices should be CPU-agnostic and use either the LE
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- * or the BE accessors.
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- *
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- * @cache: previously initialized #MemoryRegionCache to be accessed
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- * @addr: address within the address space
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- * @val: data value, for stores
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|
|
7711c0 |
- * @attrs: memory transaction attributes
|
|
|
7711c0 |
- * @result: location to write the success/failure of the transaction;
|
|
|
7711c0 |
- * if NULL, this information is discarded
|
|
|
7711c0 |
- */
|
|
|
7711c0 |
-uint32_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-uint32_t address_space_lduw_le_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-uint32_t address_space_lduw_be_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-uint32_t address_space_ldl_le_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-uint32_t address_space_ldl_be_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-uint64_t address_space_ldq_le_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-uint64_t address_space_ldq_be_cached(MemoryRegionCache *cache, hwaddr addr,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stb_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stw_le_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stw_be_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stl_le_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stl_be_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stq_le_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-void address_space_stq_be_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val,
|
|
|
7711c0 |
- MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint32_t ldub_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-uint32_t lduw_le_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-uint32_t lduw_be_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-uint32_t ldl_le_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-uint32_t ldl_be_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-uint64_t ldq_le_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-uint64_t ldq_be_phys_cached(MemoryRegionCache *cache, hwaddr addr);
|
|
|
7711c0 |
-void stb_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
|
|
|
7711c0 |
-void stw_le_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
|
|
|
7711c0 |
-void stw_be_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
|
|
|
7711c0 |
-void stl_le_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
|
|
|
7711c0 |
-void stl_be_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
|
|
|
7711c0 |
-void stq_le_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val);
|
|
|
7711c0 |
-void stq_be_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val);
|
|
|
7711c0 |
/* address_space_get_iotlb_entry: translate an address into an IOTLB
|
|
|
7711c0 |
* entry. Should be called from an RCU critical section.
|
|
|
7711c0 |
*/
|
|
|
7711c0 |
diff --git a/include/exec/memory_ldst.inc.h b/include/exec/memory_ldst.inc.h
|
|
|
7711c0 |
new file mode 100644
|
|
|
7711c0 |
index 0000000..272c20f
|
|
|
7711c0 |
--- /dev/null
|
|
|
7711c0 |
+++ b/include/exec/memory_ldst.inc.h
|
|
|
7711c0 |
@@ -0,0 +1,71 @@
|
|
|
7711c0 |
+/*
|
|
|
7711c0 |
+ * Physical memory access templates
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * Copyright (c) 2003 Fabrice Bellard
|
|
|
7711c0 |
+ * Copyright (c) 2015 Linaro, Inc.
|
|
|
7711c0 |
+ * Copyright (c) 2016 Red Hat, Inc.
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * This library is free software; you can redistribute it and/or
|
|
|
7711c0 |
+ * modify it under the terms of the GNU Lesser General Public
|
|
|
7711c0 |
+ * License as published by the Free Software Foundation; either
|
|
|
7711c0 |
+ * version 2 of the License, or (at your option) any later version.
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * This library is distributed in the hope that it will be useful,
|
|
|
7711c0 |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
7711c0 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
7711c0 |
+ * Lesser General Public License for more details.
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * You should have received a copy of the GNU Lesser General Public
|
|
|
7711c0 |
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
|
7711c0 |
+ */
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+#ifdef TARGET_ENDIANNESS
|
|
|
7711c0 |
+extern uint32_t glue(address_space_lduw, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stw, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stl, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stq, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+#else
|
|
|
7711c0 |
+extern uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint32_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint32_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stb, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stw_le, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+extern void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
+ hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
|
|
|
7711c0 |
+#endif
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+#undef ARG1_DECL
|
|
|
7711c0 |
+#undef ARG1
|
|
|
7711c0 |
+#undef SUFFIX
|
|
|
7711c0 |
+#undef TARGET_ENDIANNESS
|
|
|
7711c0 |
diff --git a/include/exec/memory_ldst_phys.inc.h b/include/exec/memory_ldst_phys.inc.h
|
|
|
7711c0 |
new file mode 100644
|
|
|
7711c0 |
index 0000000..91f7297
|
|
|
7711c0 |
--- /dev/null
|
|
|
7711c0 |
+++ b/include/exec/memory_ldst_phys.inc.h
|
|
|
7711c0 |
@@ -0,0 +1,147 @@
|
|
|
7711c0 |
+/*
|
|
|
7711c0 |
+ * Physical memory access templates
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * Copyright (c) 2003 Fabrice Bellard
|
|
|
7711c0 |
+ * Copyright (c) 2015 Linaro, Inc.
|
|
|
7711c0 |
+ * Copyright (c) 2016 Red Hat, Inc.
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * This library is free software; you can redistribute it and/or
|
|
|
7711c0 |
+ * modify it under the terms of the GNU Lesser General Public
|
|
|
7711c0 |
+ * License as published by the Free Software Foundation; either
|
|
|
7711c0 |
+ * version 2 of the License, or (at your option) any later version.
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * This library is distributed in the hope that it will be useful,
|
|
|
7711c0 |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
7711c0 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
7711c0 |
+ * Lesser General Public License for more details.
|
|
|
7711c0 |
+ *
|
|
|
7711c0 |
+ * You should have received a copy of the GNU Lesser General Public
|
|
|
7711c0 |
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
|
7711c0 |
+ */
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+#ifdef TARGET_ENDIANNESS
|
|
|
7711c0 |
+static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldl, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldq, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint32_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_lduw, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stl, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stw, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stq, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+#else
|
|
|
7711c0 |
+static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldl_le, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint32_t glue(ldl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldl_be, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldq_le, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldq_be, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint32_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_ldub, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint32_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_lduw_le, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline uint32_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ return glue(address_space_lduw_be, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stl_le, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stl_be, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stb, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stw_le, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stw_be, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stq_le, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
|
|
|
7711c0 |
+{
|
|
|
7711c0 |
+ glue(address_space_stq_be, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
+ MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
+}
|
|
|
7711c0 |
+#endif
|
|
|
7711c0 |
+
|
|
|
7711c0 |
+#undef ARG1_DECL
|
|
|
7711c0 |
+#undef ARG1
|
|
|
7711c0 |
+#undef SUFFIX
|
|
|
7711c0 |
+#undef TARGET_ENDIANNESS
|
|
|
7711c0 |
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
|
|
|
7711c0 |
index 5dbff9c..25d6125 100644
|
|
|
7711c0 |
--- a/memory_ldst.inc.c
|
|
|
7711c0 |
+++ b/memory_ldst.inc.c
|
|
|
7711c0 |
@@ -95,24 +95,6 @@ uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
DEVICE_BIG_ENDIAN);
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldl, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldl_le, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint32_t glue(ldl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldl_be, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
/* warning: addr must be aligned */
|
|
|
7711c0 |
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
|
|
|
7711c0 |
@@ -189,24 +171,6 @@ uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
DEVICE_BIG_ENDIAN);
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldq, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldq_le, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldq_be, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
|
|
|
7711c0 |
{
|
|
|
7711c0 |
@@ -241,12 +205,6 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
return val;
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-uint32_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_ldub, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
/* warning: addr must be aligned */
|
|
|
7711c0 |
static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
|
|
|
7711c0 |
@@ -323,24 +281,6 @@ uint32_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
DEVICE_BIG_ENDIAN);
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-uint32_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_lduw, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint32_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_lduw_le, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-uint32_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- return glue(address_space_lduw_be, SUFFIX)(ARG1, addr,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
/* warning: addr must be aligned. The ram page is not masked as dirty
|
|
|
7711c0 |
and the code inside is not invalidated. It is useful if the dirty
|
|
|
7711c0 |
bits are used to track modified PTEs */
|
|
|
7711c0 |
@@ -380,12 +320,6 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
RCU_READ_UNLOCK();
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-void glue(stl_phys_notdirty, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stl_notdirty, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
/* warning: addr must be aligned */
|
|
|
7711c0 |
static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, uint32_t val, MemTxAttrs attrs,
|
|
|
7711c0 |
@@ -460,24 +394,6 @@ void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
result, DEVICE_BIG_ENDIAN);
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stl, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stl_le, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-void glue(stl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stl_be, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
|
|
|
7711c0 |
{
|
|
|
7711c0 |
@@ -509,12 +425,6 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
RCU_READ_UNLOCK();
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stb, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
/* warning: addr must be aligned */
|
|
|
7711c0 |
static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, uint32_t val, MemTxAttrs attrs,
|
|
|
7711c0 |
@@ -589,24 +499,6 @@ void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
DEVICE_BIG_ENDIAN);
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stw, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stw_le, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stw_be, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
hwaddr addr, uint64_t val, MemTxAttrs attrs,
|
|
|
7711c0 |
MemTxResult *result, enum device_endian endian)
|
|
|
7711c0 |
@@ -680,24 +572,6 @@ void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
|
|
|
7711c0 |
DEVICE_BIG_ENDIAN);
|
|
|
7711c0 |
}
|
|
|
7711c0 |
|
|
|
7711c0 |
-void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stq, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stq_le, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
-void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
|
|
|
7711c0 |
-{
|
|
|
7711c0 |
- glue(address_space_stq_be, SUFFIX)(ARG1, addr, val,
|
|
|
7711c0 |
- MEMTXATTRS_UNSPECIFIED, NULL);
|
|
|
7711c0 |
-}
|
|
|
7711c0 |
-
|
|
|
7711c0 |
#undef ARG1_DECL
|
|
|
7711c0 |
#undef ARG1
|
|
|
7711c0 |
#undef SUFFIX
|
|
|
7711c0 |
--
|
|
|
7711c0 |
1.8.3.1
|
|
|
7711c0 |
|