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From ebba9a277c36df319d1ec59f25d8b8d596fb8ab4 Mon Sep 17 00:00:00 2001
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From: Wei Huang <wei@redhat.com>
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Date: Wed, 17 Jan 2018 22:13:23 +0100
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Subject: target-i386: sanitize x86 MSR_PAT loaded from another source
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RH-Author: Wei Huang <wei@redhat.com>
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Message-id: <20180117221323.1008-1-wei@redhat.com>
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Patchwork-id: 78659
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O-Subject: [RHEL-7.5 qemu-kvm-rhev PATCH 1/1] target-i386: sanitize x86 MSR_PAT loaded from another source
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Bugzilla: 1529461
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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The RHEL 7 downstream commit a94f33258 honors guest VM's writes of MSR_PAT
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for SVM machines. But this cause a problem when an x86 VM is migrated from
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an old host, such as RHEL 6.9. This is because older system doesn't save
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the guest's PAT field during migration; Instead 0x0 is saved and migrated.
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At the destination, it will use 0x0 as guest PAT because of a94f33258.
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This causes the guest VM's performance to drop significatly.
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This patch solves the problem by sanitizing the PAT field. If it is zero,
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we use the default MSR_PAT value (0x0007040600070406ULL) to prevent
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performance drop. This solution should work with different types of
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(old or new) VM sources.
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Signed-off-by: Wei Huang <wei@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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(cherry picked from commit 09fbed03321a5b7a2ecd55ba37bed53db552b0b9)
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(cherry picked from commit e883fc66d38107233b26acc588fb7af9a2afc8a2)
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(cherry picked from commit afd4296db6ae47e5f073a4dd07ea256b660f60de)
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---
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target/i386/cpu.c | 2 +-
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target/i386/cpu.h | 1 +
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target/i386/machine.c | 3 +++
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3 files changed, 5 insertions(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index a9db495..0fc7fb0 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -3785,7 +3785,7 @@ static void x86_cpu_reset(CPUState *s)
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/* All units are in INIT state. */
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env->xstate_bv = 0;
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- env->pat = 0x0007040600070406ULL;
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+ env->pat = MSR_PAT_DEFAULT;
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env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT;
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memset(env->dr, 0, sizeof(env->dr));
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 1b219fa..0c7a3d6 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -401,6 +401,7 @@ typedef enum X86Seg {
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#define MSR_MTRRfix4K_F8000 0x26f
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#define MSR_PAT 0x277
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+#define MSR_PAT_DEFAULT 0x0007040600070406ULL
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#define MSR_MTRRdefType 0x2ff
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diff --git a/target/i386/machine.c b/target/i386/machine.c
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index c9a3b5c..f86abe7 100644
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--- a/target/i386/machine.c
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+++ b/target/i386/machine.c
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@@ -277,6 +277,9 @@ static int cpu_post_load(void *opaque, int version_id)
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env->hflags &= ~HF_CPL_MASK;
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env->hflags |= (env->segs[R_SS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK;
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+ if (!(env->pat))
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+ env->pat = MSR_PAT_DEFAULT;
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+
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env->fpstt = (env->fpus_vmstate >> 11) & 7;
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env->fpus = env->fpus_vmstate & ~0x3800;
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env->fptag_vmstate ^= 0xff;
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--
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1.8.3.1
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