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commit ba5ef24a0c27c667a7de6d40eb396aeaa0f1cc41
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Author: Asim YarKhan <yarkhan@icl.utk.edu>
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Date: Wed Oct 22 13:35:43 2014 -0400
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PPC64, fix L1 data cache read, write and all access equations.
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Thanks to Carl Love for this patch and the following documentation:
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The current POWER 7 equations for all accesses over counts because it
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includes non load accesses to the cache. The equation was changed to
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be the sum of the reads and the writes. The read accesses to the two
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units, can be counted with the single event PM_LD_REF_L1 rather then
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counting the events to the two LSU units independently. The number of
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reads to the L1 must be adjusted by subtracting the misses as these
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become writes.
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Power 8 has four LSU units. The same equations can be used since
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PM_LD_REF_L1 counts across all four LSU units.
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diff --git a/src/papi_events.csv b/src/papi_events.csv
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index 73a72e7..d27a41d 100644
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--- a/src/papi_events.csv
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+++ b/src/papi_events.csv
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@@ -1307,10 +1307,9 @@ CPU,power7
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PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1
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PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1
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PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1
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-PRESET,PAPI_L1_DCW,DERIVED_POSTFIX,N0|N1|-|,PM_ST_FIN,PM_ST_MISS_L1
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-PRESET,PAPI_L1_DCA,NOT_DERIVED,PM_LSU_FIN
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-#PRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|-|N2|+|,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1
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-PRESET,PAPI_L1_DCR,DERIVED_ADD,PM_LD_REF_L1_LSU0,PM_LD_REF_L1_LSU1
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+PRESET,PAPI_L1_DCW,DERIVED_SUB,PM_ST_FIN,PM_ST_MISS_L1
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+PRESET,PAPI_L1_DCR,DERIVED_SUB,PM_LD_REF_L1,PM_LD_MISS_L1
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+PRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|+|N2|+|N3|+,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1,PM_LD_MISS_L1
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PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS
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PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_L2_LD_MISS
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PRESET,PAPI_L2_STM,NOT_DERIVED,PM_L2_ST_MISS
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@@ -1357,9 +1356,9 @@ CPU,power8
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PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1
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PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1
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PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1
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-PRESET,PAPI_L1_DCW,DERIVED_POSTFIX,N0|N1|-|,PM_ST_FIN,PM_ST_MISS_L1
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-#n/aPRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|-|N2|+|,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1
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-#n/aPRESET,PAPI_L1_DCR,DERIVED_ADD,PM_LD_REF_L1_LSU0,PM_LD_REF_L1_LSU1
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+PRESET,PAPI_L1_DCW,DERIVED_SUB,PM_ST_FIN,PM_ST_MISS_L1
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+PRESET,PAPI_L1_DCR,DERIVED_SUB,PM_LD_REF_L1,PM_LD_MISS_L1
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+PRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|+|N2|+|N3|+,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1,PM_LD_MISS_L1
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PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS
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#n/aPRESET,PAPI_L2_LDM,NOT_DERIVED,PM_L2_LD_MISS
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#n/aPRESET,PAPI_L2_STM,NOT_DERIVED,PM_L2_ST_MISS
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