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From eac51dc1b6eb89e00ed2294e39949ad056287d1e Mon Sep 17 00:00:00 2001
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From: Wim Taymans <wtaymans@redhat.com>
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Date: Fri, 19 Jul 2019 16:18:04 +0200
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Subject: [PATCH] x86: add endbr32 and endbr64 instructions
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Issue endbr instructions at the start of generated functions to
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make IBT (indirect branch tracking) work.
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Resolves #17
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---
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orc/orcx86.c | 4 ++++
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orc/orcx86insn.c | 2 ++
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orc/orcx86insn.h | 2 ++
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3 files changed, 8 insertions(+)
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diff --git a/orc/orcx86.c b/orc/orcx86.c
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index 02e6b34..d4cc086 100644
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--- a/orc/orcx86.c
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+++ b/orc/orcx86.c
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@@ -452,6 +452,9 @@ orc_x86_emit_prologue (OrcCompiler *compiler)
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orc_compiler_append_code(compiler,"%s:\n", compiler->program->name);
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if (compiler->is_64bit) {
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int i;
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+
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+ orc_x86_emit_cpuinsn_none (compiler, ORC_X86_endbr64);
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+
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for(i=0;i<16;i++){
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if (compiler->used_regs[ORC_GP_REG_BASE+i] &&
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compiler->save_regs[ORC_GP_REG_BASE+i]) {
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@@ -459,6 +462,7 @@ orc_x86_emit_prologue (OrcCompiler *compiler)
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}
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}
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} else {
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+ orc_x86_emit_cpuinsn_none (compiler, ORC_X86_endbr32);
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orc_x86_emit_push (compiler, 4, X86_EBP);
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if (compiler->use_frame_pointer) {
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orc_x86_emit_mov_reg_reg (compiler, 4, X86_ESP, X86_EBP);
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diff --git a/orc/orcx86insn.c b/orc/orcx86insn.c
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index 9d93197..a9bdd9f 100644
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--- a/orc/orcx86insn.c
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+++ b/orc/orcx86insn.c
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@@ -254,6 +254,8 @@ static const OrcSysOpcode orc_x86_opcodes[] = {
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{ "pshufw", ORC_X86_INSN_TYPE_IMM8_MMXM_MMX, 0, 0x00, 0x0f70 },
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{ "movq", ORC_X86_INSN_TYPE_MMXM_MMX, 0, 0x00, 0x0f6f },
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{ "movq", ORC_X86_INSN_TYPE_MMXM_MMX_REV, 0, 0x00, 0x0f7f },
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+ { "endbr32", ORC_X86_INSN_TYPE_NONE, 0, 0xf3, 0x0f1efb },
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+ { "endbr64", ORC_X86_INSN_TYPE_NONE, 0, 0xf3, 0x0f1efa },
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};
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static void
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diff --git a/orc/orcx86insn.h b/orc/orcx86insn.h
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index d109c95..864e5d6 100644
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--- a/orc/orcx86insn.h
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+++ b/orc/orcx86insn.h
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@@ -277,6 +277,8 @@ typedef enum {
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ORC_X86_pshufw,
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ORC_X86_movq_mmx_load,
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ORC_X86_movq_mmx_store,
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+ ORC_X86_endbr32,
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+ ORC_X86_endbr64,
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} OrcX86Opcode;
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enum {
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--
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2.21.0
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