Blame SOURCES/oprofile-rhbz1426426.patch

d5df0a
commit 6b4aaf9a6c810be7c696b9edb9ad232a02a83e0b
d5df0a
Author: Carl E. Love <cel@us.ibm.com>
d5df0a
Date:   Mon Dec 19 09:31:13 2016 -0800
d5df0a
d5df0a
    Add support for the IBM POWER 8 NV and NVL variants.
d5df0a
    
d5df0a
    Add support for the IBM POWER 8 NV and NVL variants.
d5df0a
    
d5df0a
    The processor performance counter unit is identical for the various
d5df0a
    variants of the POWER 8 processor.  The variants vary some for the
d5df0a
    non-cpu events.
d5df0a
    
d5df0a
    Signed-off-by: Carl Love <cel@us.ibm.com>
d5df0a
d5df0a
diff --git a/libop/op_cpu_type.c b/libop/op_cpu_type.c
d5df0a
index d03f9d6..0e1f6e4 100644
d5df0a
--- a/libop/op_cpu_type.c
d5df0a
+++ b/libop/op_cpu_type.c
d5df0a
@@ -330,6 +330,11 @@ static op_cpu _get_ppc64_cpu_type(void)
d5df0a
 	if (strncmp(cpu_name_lowercase, "power8e", 7) == 0)
d5df0a
 		cpu_name_lowercase[6] = '\0';
d5df0a
 
d5df0a
+	/* The POWER8NV and POWER8NVL variants have the same core PMU events as
d5df0a
+	 * POWER8. */
d5df0a
+	if (strncmp(cpu_name_lowercase, "power8nv", 8) == 0)
d5df0a
+		cpu_name_lowercase[6] = '\0';
d5df0a
+
d5df0a
 	cpu_type_str[0] = '\0';
d5df0a
 	strcat(cpu_type_str, "ppc64/");
d5df0a
 	strncat(cpu_type_str, cpu_name_lowercase, len);