|
 |
a5ef24 |
diff --git a/crypto/armcap.c b/crypto/armcap.c
|
|
|
a5ef24 |
index 5258d2f..efb4009 100644
|
|
|
a5ef24 |
--- a/crypto/armcap.c
|
|
|
a5ef24 |
+++ b/crypto/armcap.c
|
|
|
a5ef24 |
@@ -9,11 +9,6 @@
|
|
|
a5ef24 |
|
|
|
a5ef24 |
unsigned int OPENSSL_armcap_P;
|
|
|
a5ef24 |
|
|
|
a5ef24 |
-static sigset_t all_masked;
|
|
|
a5ef24 |
-
|
|
|
a5ef24 |
-static sigjmp_buf ill_jmp;
|
|
|
a5ef24 |
-static void ill_handler (int sig) { siglongjmp(ill_jmp,sig); }
|
|
|
a5ef24 |
-
|
|
|
a5ef24 |
/*
|
|
|
a5ef24 |
* Following subroutines could have been inlined, but it's not all
|
|
|
a5ef24 |
* ARM compilers support inline assembler...
|
|
|
a5ef24 |
@@ -29,24 +24,26 @@ unsigned int OPENSSL_rdtsc(void)
|
|
|
a5ef24 |
return 0;
|
|
|
a5ef24 |
}
|
|
|
a5ef24 |
|
|
|
a5ef24 |
-#if defined(__GNUC__) && __GNUC__>=2
|
|
|
a5ef24 |
-void OPENSSL_cpuid_setup(void) __attribute__((constructor));
|
|
|
a5ef24 |
-#endif
|
|
|
a5ef24 |
-void OPENSSL_cpuid_setup(void)
|
|
|
a5ef24 |
+#if defined(__GLIBC__) && __GLIBC__>=2 && __GLIBC_MINOR__>=16
|
|
|
a5ef24 |
+#include <sys/auxv.h>
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+void OPENSSL_cpuid_find(void)
|
|
|
a5ef24 |
+ {
|
|
|
a5ef24 |
+ unsigned long hwcap = getauxval(AT_HWCAP);
|
|
|
a5ef24 |
+ char *plat = (char *)getauxval(AT_PLATFORM);
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+ OPENSSL_armcap_P |= hwcap & HWCAP_ARM_NEON ? ARMV7_NEON : 0;
|
|
|
a5ef24 |
+ OPENSSL_armcap_P |= plat ? (plat[1] == '7' ? ARMV7_TICK : 0) : 0;
|
|
|
a5ef24 |
+ }
|
|
|
a5ef24 |
+#else
|
|
|
a5ef24 |
+static sigset_t all_masked;
|
|
|
a5ef24 |
+static sigjmp_buf ill_jmp;
|
|
|
a5ef24 |
+static void ill_handler (int sig) { siglongjmp(ill_jmp,sig); }
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+void OPENSSL_cpuid_find(void)
|
|
|
a5ef24 |
{
|
|
|
a5ef24 |
- char *e;
|
|
|
a5ef24 |
struct sigaction ill_oact,ill_act;
|
|
|
a5ef24 |
sigset_t oset;
|
|
|
a5ef24 |
- static int trigger=0;
|
|
|
a5ef24 |
-
|
|
|
a5ef24 |
- if (trigger) return;
|
|
|
a5ef24 |
- trigger=1;
|
|
|
a5ef24 |
-
|
|
|
a5ef24 |
- if ((e=getenv("OPENSSL_armcap")))
|
|
|
a5ef24 |
- {
|
|
|
a5ef24 |
- OPENSSL_armcap_P=strtoul(e,NULL,0);
|
|
|
a5ef24 |
- return;
|
|
|
a5ef24 |
- }
|
|
|
a5ef24 |
|
|
|
a5ef24 |
sigfillset(&all_masked);
|
|
|
a5ef24 |
sigdelset(&all_masked,SIGILL);
|
|
|
a5ef24 |
@@ -55,8 +52,6 @@ void OPENSSL_cpuid_setup(void)
|
|
|
a5ef24 |
sigdelset(&all_masked,SIGBUS);
|
|
|
a5ef24 |
sigdelset(&all_masked,SIGSEGV);
|
|
|
a5ef24 |
|
|
|
a5ef24 |
- OPENSSL_armcap_P = 0;
|
|
|
a5ef24 |
-
|
|
|
a5ef24 |
memset(&ill_act,0,sizeof(ill_act));
|
|
|
a5ef24 |
ill_act.sa_handler = ill_handler;
|
|
|
a5ef24 |
ill_act.sa_mask = all_masked;
|
|
|
a5ef24 |
@@ -78,3 +73,25 @@ void OPENSSL_cpuid_setup(void)
|
|
|
a5ef24 |
sigaction (SIGILL,&ill_oact,NULL);
|
|
|
a5ef24 |
sigprocmask(SIG_SETMASK,&oset,NULL);
|
|
|
a5ef24 |
}
|
|
|
a5ef24 |
+#endif
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+#if defined(__GNUC__) && __GNUC__>=2
|
|
|
a5ef24 |
+void OPENSSL_cpuid_setup(void) __attribute__((constructor));
|
|
|
a5ef24 |
+#endif
|
|
|
a5ef24 |
+void OPENSSL_cpuid_setup(void)
|
|
|
a5ef24 |
+ {
|
|
|
a5ef24 |
+ char *e;
|
|
|
a5ef24 |
+ static int trigger=0;
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+ if (trigger) return;
|
|
|
a5ef24 |
+ trigger=1;
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+ if ((e=getenv("OPENSSL_armcap")))
|
|
|
a5ef24 |
+ {
|
|
|
a5ef24 |
+ OPENSSL_armcap_P=strtoul(e,NULL,0);
|
|
|
a5ef24 |
+ return;
|
|
|
a5ef24 |
+ }
|
|
|
a5ef24 |
+
|
|
|
a5ef24 |
+ OPENSSL_armcap_P = 0;
|
|
|
a5ef24 |
+ OPENSSL_cpuid_find();
|
|
|
a5ef24 |
+ }
|