Blame SOURCES/openblas-0.3.3-power9.patch
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diff --git a/cpuid_power.c b/cpuid_power.c
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index 6c7baef..388ea18 100644
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--- a/cpuid_power.c
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+++ b/cpuid_power.c
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@@ -56,6 +56,7 @@
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#define CPUTYPE_CELL 6
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#define CPUTYPE_PPCG4 7
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#define CPUTYPE_POWER8 8
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+#define CPUTYPE_POWER9 9
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char *cpuname[] = {
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"UNKNOWN",
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@@ -66,7 +67,8 @@ char *cpuname[] = {
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"POWER6",
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"CELL",
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"PPCG4",
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- "POWER8"
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+ "POWER8",
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+ "POWER9"
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};
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char *lowercpuname[] = {
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@@ -78,7 +80,8 @@ char *lowercpuname[] = {
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"power6",
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"cell",
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"ppcg4",
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- "power8"
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+ "power8",
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+ "power9"
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};
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char *corename[] = {
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@@ -90,6 +93,7 @@ char *corename[] = {
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"POWER6",
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"CELL",
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"PPCG4",
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+ "POWER8",
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"POWER8"
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};
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@@ -120,6 +124,7 @@ int detect(void){
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if (!strncasecmp(p, "POWER6", 6)) return CPUTYPE_POWER6;
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if (!strncasecmp(p, "POWER7", 6)) return CPUTYPE_POWER6;
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if (!strncasecmp(p, "POWER8", 6)) return CPUTYPE_POWER8;
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+ if (!strncasecmp(p, "POWER9", 6)) return CPUTYPE_POWER8;
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if (!strncasecmp(p, "Cell", 4)) return CPUTYPE_CELL;
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if (!strncasecmp(p, "7447", 4)) return CPUTYPE_PPCG4;
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@@ -148,7 +153,7 @@ int id;
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id = __asm __volatile("mfpvr %0" : "=r"(id));
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switch ( id >> 16 ) {
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case 0x4e: // POWER9
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- return return CPUTYPE_POWER8;
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+ return CPUTYPE_POWER8;
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break;
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case 0x4d:
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case 0x4b: // POWER8/8E
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